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Searched refs:pil (Results 1 – 23 of 23) sorted by relevance

/arch/sparc/kernel/
Dirq_32.c123 unsigned int irq_alloc(unsigned int real_irq, unsigned int pil) in irq_alloc() argument
130 if (irq_table[i].real_irq == real_irq && irq_table[i].pil == pil) in irq_alloc()
142 irq_table[i].pil = pil; in irq_alloc()
161 unsigned int pil; in irq_link() local
168 pil = p->pil; in irq_link()
169 BUG_ON(pil >= SUN4D_MAX_IRQ); in irq_link()
170 p->next = irq_map[pil]; in irq_link()
171 irq_map[pil] = p; in irq_link()
186 BUG_ON(p->pil >= SUN4D_MAX_IRQ); in irq_unlink()
187 pnext = &irq_map[p->pil]; in irq_unlink()
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Dsun4d_irq.c125 unsigned int pil; in sun4d_sbus_handler_irq() local
132 pil = sun4d_encode_irq(sbino, sbusl, idx); in sun4d_sbus_handler_irq()
134 p = irq_map[pil]; in sun4d_sbus_handler_irq()
147 void sun4d_handler_irq(unsigned int pil, struct pt_regs *regs) in sun4d_handler_irq() argument
151 int sbusl = pil_to_sbus[pil]; in sun4d_handler_irq()
156 cc_set_iclr(1 << pil); in sun4d_handler_irq()
163 if (pil == SUN4D_IPI_IRQ) in sun4d_handler_irq()
173 p = irq_map[pil]; in sun4d_handler_irq()
290 unsigned int pil, in _sun4d_build_device_irq() argument
296 irq = irq_alloc(real_irq, pil); in _sun4d_build_device_irq()
[all …]
Dirq.h10 unsigned int pil; member
79 unsigned int irq_alloc(unsigned int real_irq, unsigned int pil);
82 void handler_irq(unsigned int pil, struct pt_regs *regs);
93 void sun4d_handler_irq(unsigned int pil, struct pt_regs *regs);
Dsun4v_ivec.S204 rdpr %pil, %g2
205 wrpr %g0, PIL_NORMAL_MAX, %pil
234 rdpr %pil, %g2
235 wrpr %g0, PIL_NORMAL_MAX, %pil
315 rdpr %pil, %g2
316 wrpr %g0, PIL_NORMAL_MAX, %pil
345 rdpr %pil, %g2
346 wrpr %g0, PIL_NORMAL_MAX, %pil
Dcherrs.S105 rdpr %pil, %g2
106 wrpr %g0, PIL_NORMAL_MAX, %pil
147 rdpr %pil, %g2
148 wrpr %g0, PIL_NORMAL_MAX, %pil
491 rdpr %pil, %g2
492 wrpr %g0, PIL_NORMAL_MAX, %pil
527 rdpr %pil, %g2
528 wrpr %g0, PIL_NORMAL_MAX, %pil
563 rdpr %pil, %g2
564 wrpr %g0, PIL_NORMAL_MAX, %pil
Dsun4m_irq.c256 unsigned int pil; in sun4m_build_device_irq() local
262 pil = (real_irq & 0xf); in sun4m_build_device_irq()
263 irq = irq_alloc(real_irq, pil); in sun4m_build_device_irq()
Dspiterrs.S82 rdpr %pil, %g2
84 wrpr %g0, PIL_NORMAL_MAX, %pil
Dhvtramp.S35 wrpr %g0, PIL_NORMAL_MAX, %pil
Dleon_pci_grpci1.c398 unsigned int virq = 0, pil; in grpci1_build_device_irq() local
400 pil = 1 << 8; in grpci1_build_device_irq()
401 virq = irq_alloc(irq, pil); in grpci1_build_device_irq()
Dleon_pci_grpci2.c550 unsigned int virq = 0, pil; in grpci2_build_device_irq() local
552 pil = 1 << 8; in grpci2_build_device_irq()
553 virq = irq_alloc(irq, pil); in grpci2_build_device_irq()
Drtrap_64.S132 wrpr 0, %pil
197 wrpr %l4, 0x0, %pil
Dhead_64.S767 rdpr %pil, %l1
768 wrpr %g0, PIL_NORMAL_MAX, %pil
860 wrpr %l1, 0x0, %pil
Dirq_64.c815 void __irq_entry handler_irq(int pil, struct pt_regs *regs) in handler_irq() argument
821 clear_softint(1 << pil); in handler_irq()
Detrap_64.S32 etrap: rdpr %pil, %g2
/arch/sparc/power/
Dhibernate_asm.S125 wrpr %g0, 14, %pil
132 wrpr %g0, 15, %pil
/arch/sparc/include/asm/
Dttable.h95 rdpr %pil, %g2; \
127 rdpr %pil, %g2; \
128 wrpr %g0, PIL_NORMAL_MAX, %pil; \
147 rdpr %pil, %g2; \
148 wrpr %g0, PIL_NORMAL_MAX, %pil; \
159 rdpr %pil, %g2; \
160 wrpr %g0, PIL_NMI, %pil; \
/arch/arm/boot/dts/
Dqcom-apq8064-sony-xperia-yuga.dts395 riva-pil@3204000 {
Dqcom-apq8064-arrow-sd-600eval.dts375 riva-pil@3204000 {
Dqcom-msm8974.dtsi243 adsp-pil {
244 compatible = "qcom,msm8974-adsp-pil";
Dqcom-apq8064.dtsi1475 riva: riva-pil@3204000 {
1476 compatible = "qcom,riva-pil";
/arch/arm64/boot/dts/qcom/
Dmsm8996.dtsi828 adsp-pil {
829 compatible = "qcom,msm8996-adsp-pil";
Dmsm8916.dtsi913 compatible = "qcom,q6v5-pil";
967 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
/arch/sparc/mm/
Dultra.S642 rdpr %pil, %g2
643 wrpr %g0, PIL_NORMAL_MAX, %pil