/arch/arm/include/asm/ |
D | proc-fns.h | 26 struct processor { struct 85 static inline void init_proc_vtable(const struct processor *p) in init_proc_vtable() argument 106 extern struct processor processor; 116 extern struct processor *cpu_vtable[]; 119 static inline void init_proc_vtable(const struct processor *p) in init_proc_vtable() 129 #define PROC_VTABLE(f) processor.f 130 #define PROC_TABLE(f) processor.f 131 static inline void init_proc_vtable(const struct processor *p) in init_proc_vtable() 133 processor = *p; in init_proc_vtable()
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D | procinfo.h | 18 struct processor; 39 struct processor *proc;
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/arch/m68k/ |
D | Kconfig.cpu | 10 the full 68000 processor instruction set. 12 of the 68000 processor family. They are mainly targeted at embedded 15 processor instruction set. 17 MC68xxx processor, select M68KCLASSIC. 19 processor, select COLDFIRE. 60 based on the 68020 processor. For the most part it is used in 70 processor, say Y. Otherwise, say N. Note that the 68020 requires a 81 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not 91 or MC68040 processor, say Y. Otherwise, say N. Note that an 102 processor, say Y. Otherwise, say N. [all …]
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/arch/sh/ |
D | Kconfig | 54 The SuperH is a RISC processor targeted for use in embedded systems 259 bool "Support SH7619 processor" 264 bool "Support J2 processor" 272 bool "Support SH7201 processor" 278 bool "Support SH7203 processor" 286 bool "Support SH7206 processor" 292 bool "Support SH7263 processor" 299 bool "Support SH7264 processor" 307 bool "Support SH7269 processor" 315 bool "Support MX-G processor" [all …]
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/arch/sh/include/asm/ |
D | module.h | 24 # error unknown processor family 36 # error unknown processor family
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/arch/x86/kernel/acpi/ |
D | boot.c | 201 struct acpi_madt_local_x2apic *processor = NULL; in acpi_parse_x2apic() local 207 processor = (struct acpi_madt_local_x2apic *)header; in acpi_parse_x2apic() 209 if (BAD_MADT_ENTRY(processor, end)) in acpi_parse_x2apic() 215 apic_id = processor->local_apic_id; in acpi_parse_x2apic() 216 enabled = processor->lapic_flags & ACPI_MADT_ENABLED; in acpi_parse_x2apic() 232 acpi_register_lapic(apic_id, processor->uid, enabled); in acpi_parse_x2apic() 243 struct acpi_madt_local_apic *processor = NULL; in acpi_parse_lapic() local 245 processor = (struct acpi_madt_local_apic *)header; in acpi_parse_lapic() 247 if (BAD_MADT_ENTRY(processor, end)) in acpi_parse_lapic() 253 if (processor->id == 0xff) in acpi_parse_lapic() [all …]
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/arch/arm64/kernel/ |
D | smp.c | 500 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) in acpi_map_gic_cpu_interface() argument 502 u64 hwid = processor->arm_mpidr; in acpi_map_gic_cpu_interface() 504 if (!(processor->flags & ACPI_MADT_ENABLED)) { in acpi_map_gic_cpu_interface() 527 cpu_madt_gicc[0] = *processor; in acpi_map_gic_cpu_interface() 538 cpu_madt_gicc[cpu_count] = *processor; in acpi_map_gic_cpu_interface() 549 acpi_set_mailbox_entry(cpu_count, processor); in acpi_map_gic_cpu_interface() 560 struct acpi_madt_generic_interrupt *processor; in acpi_parse_gic_cpu_interface() local 562 processor = (struct acpi_madt_generic_interrupt *)header; in acpi_parse_gic_cpu_interface() 563 if (BAD_MADT_GICC_ENTRY(processor, end)) in acpi_parse_gic_cpu_interface() 568 acpi_map_gic_cpu_interface(processor); in acpi_parse_gic_cpu_interface()
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/arch/arm/mach-iop32x/ |
D | Kconfig | 22 evaluation kit for the IOP321 processor. 29 evaluation kit for the Intel 80219 processor (a IOP321 variant) 30 or the IQ31244 evaluation kit for the IOP321 processor.
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/arch/arm/kernel/ |
D | asm-offsets.c | 149 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort)); in main() 152 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort)); in main() 155 DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size)); in main() 156 DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend)); in main() 157 DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume)); in main()
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D | head-nommu.S | 58 mrc p15, 0, r9, c0, c0 @ get processor id 66 movs r10, r5 @ invalid processor (r5=0)? 103 mrc p15, 0, r9, c0, c0 @ get processor id 106 movs r10, r5 @ invalid processor?
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/arch/arm64/include/asm/ |
D | acpi.h | 100 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor); 104 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor) in acpi_set_mailbox_entry() argument
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/arch/x86/kernel/ |
D | mpparse.c | 392 struct mpc_cpu processor; in construct_default_ISA_mptable() local 405 processor.type = MP_PROCESSOR; in construct_default_ISA_mptable() 407 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; in construct_default_ISA_mptable() 408 processor.cpuflag = CPU_ENABLED; in construct_default_ISA_mptable() 409 processor.cpufeature = (boot_cpu_data.x86 << 8) | in construct_default_ISA_mptable() 411 processor.featureflag = boot_cpu_data.x86_capability[CPUID_1_EDX]; in construct_default_ISA_mptable() 412 processor.reserved[0] = 0; in construct_default_ISA_mptable() 413 processor.reserved[1] = 0; in construct_default_ISA_mptable() 415 processor.apicid = i; in construct_default_ISA_mptable() 416 MP_processor_info(&processor); in construct_default_ISA_mptable()
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/arch/xtensa/include/uapi/asm/ |
D | byteorder.h | 10 # error processor byte order undefined!
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D | msgbuf.h | 38 # error processor byte order undefined!
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/arch/mips/txx9/ |
D | Kconfig | 38 This Toshiba board is based on the TX4927 processor. Say Y here to 46 This Toshiba board is based on the TX4938 processor. Say Y here to 55 This Toshiba board is based on the TX4939 processor. Say Y here to
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/arch/arm/ |
D | Kconfig-nommu | 30 hex 'Hard wire the processor ID' 34 If processor has no CP15 register, this processor ID is
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/arch/arm/mach-imx/ |
D | Kconfig | 435 This enables support for Freescale i.MX1 processor 448 This enables support for Freescale i.MX25 processor 466 This enables support for Freescale i.MX50 processor. 473 This enables support for Freescale i.MX51 processor 481 This enables support for Freescale i.MX53 processor. 505 This enables support for Freescale i.MX6 Quad processor. 513 This enables support for Freescale i.MX6 SoloLite processor. 521 This enables support for Freescale i.MX6 SoloX processor. 529 This enables support for Freescale i.MX6 UltraLite processor. 541 This enables support for Freescale i.MX7 Dual processor. [all …]
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/arch/unicore32/mm/ |
D | Kconfig | 16 Say Y here to disable the processor instruction cache. Unless 22 Say Y here to disable the processor data cache. Unless
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/arch/arm/mm/ |
D | Kconfig | 17 A 32-bit RISC microprocessor based on the ARM7 processor core 20 Say Y if you want support for the ARM7TDMI processor. 36 A 32-bit RISC processor with 8kByte Cache, Write Buffer and 39 Say Y if you want support for the ARM720T processor. 53 A 32-bit RISC processor with 8KB cache or 4KB variants, 57 Say Y if you want support for the ARM740T processor. 69 A 32-bit RISC microprocessor based on the ARM9 processor core 72 Say Y if you want support for the ARM9TDMI processor. 91 Say Y if you want support for the ARM920T processor. 111 Say Y if you want support for the ARM922T processor. [all …]
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D | proc-syms.c | 24 EXPORT_SYMBOL(processor);
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/arch/openrisc/ |
D | README.openrisc | 35 your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand. 65 to more or less specific processor implementations: 69 or1200: the OpenRISC 1200 processor
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/arch/mips/netlogic/ |
D | Platform | 14 # NETLOGIC processor support
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/arch/x86/ |
D | Kconfig.cpu | 8 This is the processor type of your CPU. This information is 64 Select this for an 586 or 686 series processor such as the AMD K5, 72 Select this for a Pentium Classic processor with the RDTSC (Read 156 Select this for an AMD K6-family processor. Enables use of 164 Select this for an AMD Athlon K7-family processor. Enables use of 171 Select this for an AMD Opteron or Athlon64 Hammer-family processor. 179 Select this for a Transmeta Crusoe processor. Treats the processor 187 Select this for a Transmeta Efficeon processor. 211 Select this for an AMD Elan processor. 357 # 6 processor, except that it is broken on certain VIA chips. [all …]
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/arch/arm/mach-zx/ |
D | Kconfig | 7 set-top-box processor is supported. More will be
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/arch/powerpc/platforms/ |
D | Kconfig.cputype | 243 PowerPC processor. The kernel currently supports saving and restoring 247 This option is only usefully if you have a processor that supports 260 to the PowerPC processor. The kernel currently supports saving and 264 This option is only useful if you have a processor that supports 280 Extensions (SPE) to the PowerPC processor. The kernel currently 284 This option is only useful if you have a processor that supports 360 you say Y here, the kernel will run on single-processor machines. 361 On a single-processor machine, the kernel will run faster if you say
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