1 /*
2 * SMP initialisation and IPI support
3 * Based on arch/arm/kernel/smp.c
4 *
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include <linux/acpi.h>
21 #include <linux/delay.h>
22 #include <linux/init.h>
23 #include <linux/spinlock.h>
24 #include <linux/sched/mm.h>
25 #include <linux/sched/hotplug.h>
26 #include <linux/sched/task_stack.h>
27 #include <linux/interrupt.h>
28 #include <linux/cache.h>
29 #include <linux/profile.h>
30 #include <linux/errno.h>
31 #include <linux/mm.h>
32 #include <linux/err.h>
33 #include <linux/cpu.h>
34 #include <linux/smp.h>
35 #include <linux/seq_file.h>
36 #include <linux/irq.h>
37 #include <linux/percpu.h>
38 #include <linux/clockchips.h>
39 #include <linux/completion.h>
40 #include <linux/of.h>
41 #include <linux/irq_work.h>
42 #include <linux/kexec.h>
43
44 #include <asm/alternative.h>
45 #include <asm/atomic.h>
46 #include <asm/cacheflush.h>
47 #include <asm/cpu.h>
48 #include <asm/cputype.h>
49 #include <asm/cpu_ops.h>
50 #include <asm/mmu_context.h>
51 #include <asm/numa.h>
52 #include <asm/pgtable.h>
53 #include <asm/pgalloc.h>
54 #include <asm/processor.h>
55 #include <asm/smp_plat.h>
56 #include <asm/sections.h>
57 #include <asm/tlbflush.h>
58 #include <asm/ptrace.h>
59 #include <asm/virt.h>
60
61 #define CREATE_TRACE_POINTS
62 #include <trace/events/ipi.h>
63
64 DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
65 EXPORT_PER_CPU_SYMBOL(cpu_number);
66
67 /*
68 * as from 2.5, kernels no longer have an init_tasks structure
69 * so we need some other way of telling a new secondary core
70 * where to place its SVC stack
71 */
72 struct secondary_data secondary_data;
73 /* Number of CPUs which aren't online, but looping in kernel text. */
74 int cpus_stuck_in_kernel;
75
76 enum ipi_msg_type {
77 IPI_RESCHEDULE,
78 IPI_CALL_FUNC,
79 IPI_CPU_STOP,
80 IPI_CPU_CRASH_STOP,
81 IPI_TIMER,
82 IPI_IRQ_WORK,
83 IPI_WAKEUP
84 };
85
86 #ifdef CONFIG_HOTPLUG_CPU
87 static int op_cpu_kill(unsigned int cpu);
88 #else
op_cpu_kill(unsigned int cpu)89 static inline int op_cpu_kill(unsigned int cpu)
90 {
91 return -ENOSYS;
92 }
93 #endif
94
95
96 /*
97 * Boot a secondary CPU, and assign it the specified idle task.
98 * This also gives us the initial stack to use for this CPU.
99 */
boot_secondary(unsigned int cpu,struct task_struct * idle)100 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
101 {
102 if (cpu_ops[cpu]->cpu_boot)
103 return cpu_ops[cpu]->cpu_boot(cpu);
104
105 return -EOPNOTSUPP;
106 }
107
108 static DECLARE_COMPLETION(cpu_running);
109 bool va52mismatch __ro_after_init;
110
__cpu_up(unsigned int cpu,struct task_struct * idle)111 int __cpu_up(unsigned int cpu, struct task_struct *idle)
112 {
113 int ret;
114 long status;
115
116 /*
117 * We need to tell the secondary core where to find its stack and the
118 * page tables.
119 */
120 secondary_data.task = idle;
121 secondary_data.stack = task_stack_page(idle) + THREAD_SIZE;
122 update_cpu_boot_status(CPU_MMU_OFF);
123 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
124
125 /*
126 * Now bring the CPU into our world.
127 */
128 ret = boot_secondary(cpu, idle);
129 if (ret == 0) {
130 /*
131 * CPU was successfully started, wait for it to come online or
132 * time out.
133 */
134 wait_for_completion_timeout(&cpu_running,
135 msecs_to_jiffies(1000));
136
137 if (!cpu_online(cpu)) {
138 pr_crit("CPU%u: failed to come online\n", cpu);
139
140 if (IS_ENABLED(CONFIG_ARM64_52BIT_VA) && va52mismatch)
141 pr_crit("CPU%u: does not support 52-bit VAs\n", cpu);
142
143 ret = -EIO;
144 }
145 } else {
146 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
147 return ret;
148 }
149
150 secondary_data.task = NULL;
151 secondary_data.stack = NULL;
152 status = READ_ONCE(secondary_data.status);
153 if (ret && status) {
154
155 if (status == CPU_MMU_OFF)
156 status = READ_ONCE(__early_cpu_boot_status);
157
158 switch (status) {
159 default:
160 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
161 cpu, status);
162 break;
163 case CPU_KILL_ME:
164 if (!op_cpu_kill(cpu)) {
165 pr_crit("CPU%u: died during early boot\n", cpu);
166 break;
167 }
168 /* Fall through */
169 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
170 case CPU_STUCK_IN_KERNEL:
171 pr_crit("CPU%u: is stuck in kernel\n", cpu);
172 cpus_stuck_in_kernel++;
173 break;
174 case CPU_PANIC_KERNEL:
175 panic("CPU%u detected unsupported configuration\n", cpu);
176 }
177 }
178
179 return ret;
180 }
181
182 /*
183 * This is the secondary CPU boot entry. We're using this CPUs
184 * idle thread stack, but a set of temporary page tables.
185 */
secondary_start_kernel(void)186 asmlinkage notrace void secondary_start_kernel(void)
187 {
188 struct mm_struct *mm = &init_mm;
189 unsigned int cpu;
190
191 cpu = task_cpu(current);
192 set_my_cpu_offset(per_cpu_offset(cpu));
193
194 /*
195 * All kernel threads share the same mm context; grab a
196 * reference and switch to it.
197 */
198 mmgrab(mm);
199 current->active_mm = mm;
200
201 /*
202 * TTBR0 is only used for the identity mapping at this stage. Make it
203 * point to zero page to avoid speculatively fetching new entries.
204 */
205 cpu_uninstall_idmap();
206
207 preempt_disable();
208 trace_hardirqs_off();
209
210 /*
211 * If the system has established the capabilities, make sure
212 * this CPU ticks all of those. If it doesn't, the CPU will
213 * fail to come online.
214 */
215 check_local_cpu_capabilities();
216
217 if (cpu_ops[cpu]->cpu_postboot)
218 cpu_ops[cpu]->cpu_postboot();
219
220 /*
221 * Log the CPU info before it is marked online and might get read.
222 */
223 cpuinfo_store_cpu();
224
225 /*
226 * Enable GIC and timers.
227 */
228 notify_cpu_starting(cpu);
229
230 store_cpu_topology(cpu);
231
232 /*
233 * OK, now it's safe to let the boot CPU continue. Wait for
234 * the CPU migration code to notice that the CPU is online
235 * before we continue.
236 */
237 pr_info("CPU%u: Booted secondary processor [%08x]\n",
238 cpu, read_cpuid_id());
239 update_cpu_boot_status(CPU_BOOT_SUCCESS);
240 set_cpu_online(cpu, true);
241 complete(&cpu_running);
242
243 local_irq_enable();
244 local_async_enable();
245
246 /*
247 * OK, it's off to the idle thread for us
248 */
249 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
250 }
251
252 #ifdef CONFIG_HOTPLUG_CPU
op_cpu_disable(unsigned int cpu)253 static int op_cpu_disable(unsigned int cpu)
254 {
255 /*
256 * If we don't have a cpu_die method, abort before we reach the point
257 * of no return. CPU0 may not have an cpu_ops, so test for it.
258 */
259 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
260 return -EOPNOTSUPP;
261
262 /*
263 * We may need to abort a hot unplug for some other mechanism-specific
264 * reason.
265 */
266 if (cpu_ops[cpu]->cpu_disable)
267 return cpu_ops[cpu]->cpu_disable(cpu);
268
269 return 0;
270 }
271
272 /*
273 * __cpu_disable runs on the processor to be shutdown.
274 */
__cpu_disable(void)275 int __cpu_disable(void)
276 {
277 unsigned int cpu = smp_processor_id();
278 int ret;
279
280 ret = op_cpu_disable(cpu);
281 if (ret)
282 return ret;
283
284 /*
285 * Take this CPU offline. Once we clear this, we can't return,
286 * and we must not schedule until we're ready to give up the cpu.
287 */
288 set_cpu_online(cpu, false);
289
290 /*
291 * OK - migrate IRQs away from this CPU
292 */
293 irq_migrate_all_off_this_cpu();
294
295 return 0;
296 }
297
op_cpu_kill(unsigned int cpu)298 static int op_cpu_kill(unsigned int cpu)
299 {
300 /*
301 * If we have no means of synchronising with the dying CPU, then assume
302 * that it is really dead. We can only wait for an arbitrary length of
303 * time and hope that it's dead, so let's skip the wait and just hope.
304 */
305 if (!cpu_ops[cpu]->cpu_kill)
306 return 0;
307
308 return cpu_ops[cpu]->cpu_kill(cpu);
309 }
310
311 /*
312 * called on the thread which is asking for a CPU to be shutdown -
313 * waits until shutdown has completed, or it is timed out.
314 */
__cpu_die(unsigned int cpu)315 void __cpu_die(unsigned int cpu)
316 {
317 int err;
318
319 if (!cpu_wait_death(cpu, 5)) {
320 pr_crit("CPU%u: cpu didn't die\n", cpu);
321 return;
322 }
323 pr_notice("CPU%u: shutdown\n", cpu);
324
325 /*
326 * Now that the dying CPU is beyond the point of no return w.r.t.
327 * in-kernel synchronisation, try to get the firwmare to help us to
328 * verify that it has really left the kernel before we consider
329 * clobbering anything it might still be using.
330 */
331 err = op_cpu_kill(cpu);
332 if (err)
333 pr_warn("CPU%d may not have shut down cleanly: %d\n",
334 cpu, err);
335 }
336
337 /*
338 * Called from the idle thread for the CPU which has been shutdown.
339 *
340 * Note that we disable IRQs here, but do not re-enable them
341 * before returning to the caller. This is also the behaviour
342 * of the other hotplug-cpu capable cores, so presumably coming
343 * out of idle fixes this.
344 */
cpu_die(void)345 void cpu_die(void)
346 {
347 unsigned int cpu = smp_processor_id();
348
349 idle_task_exit();
350
351 local_irq_disable();
352
353 /* Tell __cpu_die() that this CPU is now safe to dispose of */
354 (void)cpu_report_death();
355
356 /*
357 * Actually shutdown the CPU. This must never fail. The specific hotplug
358 * mechanism must perform all required cache maintenance to ensure that
359 * no dirty lines are lost in the process of shutting down the CPU.
360 */
361 cpu_ops[cpu]->cpu_die(cpu);
362
363 BUG();
364 }
365 #endif
366
367 /*
368 * Kill the calling secondary CPU, early in bringup before it is turned
369 * online.
370 */
cpu_die_early(void)371 void cpu_die_early(void)
372 {
373 int cpu = smp_processor_id();
374
375 pr_crit("CPU%d: will not boot\n", cpu);
376
377 /* Mark this CPU absent */
378 set_cpu_present(cpu, 0);
379
380 #ifdef CONFIG_HOTPLUG_CPU
381 update_cpu_boot_status(CPU_KILL_ME);
382 /* Check if we can park ourselves */
383 if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
384 cpu_ops[cpu]->cpu_die(cpu);
385 #endif
386 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
387
388 cpu_park_loop();
389 }
390
hyp_mode_check(void)391 static void __init hyp_mode_check(void)
392 {
393 if (is_hyp_mode_available())
394 pr_info("CPU: All CPU(s) started at EL2\n");
395 else if (is_hyp_mode_mismatched())
396 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
397 "CPU: CPUs started in inconsistent modes");
398 else
399 pr_info("CPU: All CPU(s) started at EL1\n");
400 }
401
smp_cpus_done(unsigned int max_cpus)402 void __init smp_cpus_done(unsigned int max_cpus)
403 {
404 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
405 setup_cpu_features();
406 hyp_mode_check();
407 apply_alternatives_all();
408 mark_linear_text_alias_ro();
409 }
410
smp_prepare_boot_cpu(void)411 void __init smp_prepare_boot_cpu(void)
412 {
413 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
414 /*
415 * Initialise the static keys early as they may be enabled by the
416 * cpufeature code.
417 */
418 jump_label_init();
419 cpuinfo_store_boot_cpu();
420 }
421
of_get_cpu_mpidr(struct device_node * dn)422 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
423 {
424 const __be32 *cell;
425 u64 hwid;
426
427 /*
428 * A cpu node with missing "reg" property is
429 * considered invalid to build a cpu_logical_map
430 * entry.
431 */
432 cell = of_get_property(dn, "reg", NULL);
433 if (!cell) {
434 pr_err("%pOF: missing reg property\n", dn);
435 return INVALID_HWID;
436 }
437
438 hwid = of_read_number(cell, of_n_addr_cells(dn));
439 /*
440 * Non affinity bits must be set to 0 in the DT
441 */
442 if (hwid & ~MPIDR_HWID_BITMASK) {
443 pr_err("%pOF: invalid reg property\n", dn);
444 return INVALID_HWID;
445 }
446 return hwid;
447 }
448
449 /*
450 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
451 * entries and check for duplicates. If any is found just ignore the
452 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
453 * matching valid MPIDR values.
454 */
is_mpidr_duplicate(unsigned int cpu,u64 hwid)455 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
456 {
457 unsigned int i;
458
459 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
460 if (cpu_logical_map(i) == hwid)
461 return true;
462 return false;
463 }
464
465 /*
466 * Initialize cpu operations for a logical cpu and
467 * set it in the possible mask on success
468 */
smp_cpu_setup(int cpu)469 static int __init smp_cpu_setup(int cpu)
470 {
471 if (cpu_read_ops(cpu))
472 return -ENODEV;
473
474 if (cpu_ops[cpu]->cpu_init(cpu))
475 return -ENODEV;
476
477 set_cpu_possible(cpu, true);
478
479 return 0;
480 }
481
482 static bool bootcpu_valid __initdata;
483 static unsigned int cpu_count = 1;
484
485 #ifdef CONFIG_ACPI
486 static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
487
acpi_cpu_get_madt_gicc(int cpu)488 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
489 {
490 return &cpu_madt_gicc[cpu];
491 }
492
493 /*
494 * acpi_map_gic_cpu_interface - parse processor MADT entry
495 *
496 * Carry out sanity checks on MADT processor entry and initialize
497 * cpu_logical_map on success
498 */
499 static void __init
acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt * processor)500 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
501 {
502 u64 hwid = processor->arm_mpidr;
503
504 if (!(processor->flags & ACPI_MADT_ENABLED)) {
505 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
506 return;
507 }
508
509 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
510 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
511 return;
512 }
513
514 if (is_mpidr_duplicate(cpu_count, hwid)) {
515 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
516 return;
517 }
518
519 /* Check if GICC structure of boot CPU is available in the MADT */
520 if (cpu_logical_map(0) == hwid) {
521 if (bootcpu_valid) {
522 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
523 hwid);
524 return;
525 }
526 bootcpu_valid = true;
527 cpu_madt_gicc[0] = *processor;
528 early_map_cpu_to_node(0, acpi_numa_get_nid(0, hwid));
529 return;
530 }
531
532 if (cpu_count >= NR_CPUS)
533 return;
534
535 /* map the logical cpu id to cpu MPIDR */
536 cpu_logical_map(cpu_count) = hwid;
537
538 cpu_madt_gicc[cpu_count] = *processor;
539
540 /*
541 * Set-up the ACPI parking protocol cpu entries
542 * while initializing the cpu_logical_map to
543 * avoid parsing MADT entries multiple times for
544 * nothing (ie a valid cpu_logical_map entry should
545 * contain a valid parking protocol data set to
546 * initialize the cpu if the parking protocol is
547 * the only available enable method).
548 */
549 acpi_set_mailbox_entry(cpu_count, processor);
550
551 early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid));
552
553 cpu_count++;
554 }
555
556 static int __init
acpi_parse_gic_cpu_interface(struct acpi_subtable_header * header,const unsigned long end)557 acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
558 const unsigned long end)
559 {
560 struct acpi_madt_generic_interrupt *processor;
561
562 processor = (struct acpi_madt_generic_interrupt *)header;
563 if (BAD_MADT_GICC_ENTRY(processor, end))
564 return -EINVAL;
565
566 acpi_table_print_madt_entry(header);
567
568 acpi_map_gic_cpu_interface(processor);
569
570 return 0;
571 }
572 #else
573 #define acpi_table_parse_madt(...) do { } while (0)
574 #endif
575
576 /*
577 * Enumerate the possible CPU set from the device tree and build the
578 * cpu logical map array containing MPIDR values related to logical
579 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
580 */
of_parse_and_init_cpus(void)581 static void __init of_parse_and_init_cpus(void)
582 {
583 struct device_node *dn;
584
585 for_each_node_by_type(dn, "cpu") {
586 u64 hwid = of_get_cpu_mpidr(dn);
587
588 if (hwid == INVALID_HWID)
589 goto next;
590
591 if (is_mpidr_duplicate(cpu_count, hwid)) {
592 pr_err("%pOF: duplicate cpu reg properties in the DT\n",
593 dn);
594 goto next;
595 }
596
597 /*
598 * The numbering scheme requires that the boot CPU
599 * must be assigned logical id 0. Record it so that
600 * the logical map built from DT is validated and can
601 * be used.
602 */
603 if (hwid == cpu_logical_map(0)) {
604 if (bootcpu_valid) {
605 pr_err("%pOF: duplicate boot cpu reg property in DT\n",
606 dn);
607 goto next;
608 }
609
610 bootcpu_valid = true;
611 early_map_cpu_to_node(0, of_node_to_nid(dn));
612
613 /*
614 * cpu_logical_map has already been
615 * initialized and the boot cpu doesn't need
616 * the enable-method so continue without
617 * incrementing cpu.
618 */
619 continue;
620 }
621
622 if (cpu_count >= NR_CPUS)
623 goto next;
624
625 pr_debug("cpu logical map 0x%llx\n", hwid);
626 cpu_logical_map(cpu_count) = hwid;
627
628 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
629 next:
630 cpu_count++;
631 }
632 }
633
634 /*
635 * Enumerate the possible CPU set from the device tree or ACPI and build the
636 * cpu logical map array containing MPIDR values related to logical
637 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
638 */
smp_init_cpus(void)639 void __init smp_init_cpus(void)
640 {
641 int i;
642
643 if (acpi_disabled)
644 of_parse_and_init_cpus();
645 else
646 /*
647 * do a walk of MADT to determine how many CPUs
648 * we have including disabled CPUs, and get information
649 * we need for SMP init
650 */
651 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
652 acpi_parse_gic_cpu_interface, 0);
653
654 if (cpu_count > nr_cpu_ids)
655 pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
656 cpu_count, nr_cpu_ids);
657
658 if (!bootcpu_valid) {
659 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
660 return;
661 }
662
663 /*
664 * We need to set the cpu_logical_map entries before enabling
665 * the cpus so that cpu processor description entries (DT cpu nodes
666 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
667 * with entries in cpu_logical_map while initializing the cpus.
668 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
669 */
670 for (i = 1; i < nr_cpu_ids; i++) {
671 if (cpu_logical_map(i) != INVALID_HWID) {
672 if (smp_cpu_setup(i))
673 cpu_logical_map(i) = INVALID_HWID;
674 }
675 }
676 }
677
smp_prepare_cpus(unsigned int max_cpus)678 void __init smp_prepare_cpus(unsigned int max_cpus)
679 {
680 int err;
681 unsigned int cpu;
682 unsigned int this_cpu;
683
684 init_cpu_topology();
685
686 this_cpu = smp_processor_id();
687 store_cpu_topology(this_cpu);
688 numa_store_cpu_info(this_cpu);
689
690 /*
691 * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
692 * secondary CPUs present.
693 */
694 if (max_cpus == 0)
695 return;
696
697 /*
698 * Initialise the present map (which describes the set of CPUs
699 * actually populated at the present time) and release the
700 * secondaries from the bootloader.
701 */
702 for_each_possible_cpu(cpu) {
703
704 per_cpu(cpu_number, cpu) = cpu;
705
706 if (cpu == smp_processor_id())
707 continue;
708
709 if (!cpu_ops[cpu])
710 continue;
711
712 err = cpu_ops[cpu]->cpu_prepare(cpu);
713 if (err)
714 continue;
715
716 set_cpu_present(cpu, true);
717 numa_store_cpu_info(cpu);
718 }
719 }
720
721 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
722
set_smp_cross_call(void (* fn)(const struct cpumask *,unsigned int))723 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
724 {
725 __smp_cross_call = fn;
726 }
727
728 static const char *ipi_types[NR_IPI] __tracepoint_string = {
729 #define S(x,s) [x] = s
730 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
731 S(IPI_CALL_FUNC, "Function call interrupts"),
732 S(IPI_CPU_STOP, "CPU stop interrupts"),
733 S(IPI_CPU_CRASH_STOP, "CPU stop (for crash dump) interrupts"),
734 S(IPI_TIMER, "Timer broadcast interrupts"),
735 S(IPI_IRQ_WORK, "IRQ work interrupts"),
736 S(IPI_WAKEUP, "CPU wake-up interrupts"),
737 };
738
smp_cross_call(const struct cpumask * target,unsigned int ipinr)739 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
740 {
741 trace_ipi_raise(target, ipi_types[ipinr]);
742 __smp_cross_call(target, ipinr);
743 }
744
show_ipi_list(struct seq_file * p,int prec)745 void show_ipi_list(struct seq_file *p, int prec)
746 {
747 unsigned int cpu, i;
748
749 for (i = 0; i < NR_IPI; i++) {
750 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
751 prec >= 4 ? " " : "");
752 for_each_online_cpu(cpu)
753 seq_printf(p, "%10u ",
754 __get_irq_stat(cpu, ipi_irqs[i]));
755 seq_printf(p, " %s\n", ipi_types[i]);
756 }
757 }
758
smp_irq_stat_cpu(unsigned int cpu)759 u64 smp_irq_stat_cpu(unsigned int cpu)
760 {
761 u64 sum = 0;
762 int i;
763
764 for (i = 0; i < NR_IPI; i++)
765 sum += __get_irq_stat(cpu, ipi_irqs[i]);
766
767 return sum;
768 }
769
arch_send_call_function_ipi_mask(const struct cpumask * mask)770 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
771 {
772 smp_cross_call(mask, IPI_CALL_FUNC);
773 }
774
arch_send_call_function_single_ipi(int cpu)775 void arch_send_call_function_single_ipi(int cpu)
776 {
777 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
778 }
779
780 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
arch_send_wakeup_ipi_mask(const struct cpumask * mask)781 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
782 {
783 smp_cross_call(mask, IPI_WAKEUP);
784 }
785 #endif
786
787 #ifdef CONFIG_IRQ_WORK
arch_irq_work_raise(void)788 void arch_irq_work_raise(void)
789 {
790 if (__smp_cross_call)
791 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
792 }
793 #endif
794
795 /*
796 * ipi_cpu_stop - handle IPI from smp_send_stop()
797 */
ipi_cpu_stop(unsigned int cpu)798 static void ipi_cpu_stop(unsigned int cpu)
799 {
800 set_cpu_online(cpu, false);
801
802 local_irq_disable();
803
804 while (1)
805 cpu_relax();
806 }
807
808 #ifdef CONFIG_KEXEC_CORE
809 static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
810 #endif
811
ipi_cpu_crash_stop(unsigned int cpu,struct pt_regs * regs)812 static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
813 {
814 #ifdef CONFIG_KEXEC_CORE
815 crash_save_cpu(regs, cpu);
816
817 atomic_dec(&waiting_for_crash_ipi);
818
819 local_irq_disable();
820
821 #ifdef CONFIG_HOTPLUG_CPU
822 if (cpu_ops[cpu]->cpu_die)
823 cpu_ops[cpu]->cpu_die(cpu);
824 #endif
825
826 /* just in case */
827 cpu_park_loop();
828 #endif
829 }
830
831 /*
832 * Main handler for inter-processor interrupts
833 */
handle_IPI(int ipinr,struct pt_regs * regs)834 void handle_IPI(int ipinr, struct pt_regs *regs)
835 {
836 unsigned int cpu = smp_processor_id();
837 struct pt_regs *old_regs = set_irq_regs(regs);
838
839 if ((unsigned)ipinr < NR_IPI) {
840 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
841 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
842 }
843
844 switch (ipinr) {
845 case IPI_RESCHEDULE:
846 scheduler_ipi();
847 break;
848
849 case IPI_CALL_FUNC:
850 irq_enter();
851 generic_smp_call_function_interrupt();
852 irq_exit();
853 break;
854
855 case IPI_CPU_STOP:
856 irq_enter();
857 ipi_cpu_stop(cpu);
858 irq_exit();
859 break;
860
861 case IPI_CPU_CRASH_STOP:
862 if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
863 irq_enter();
864 ipi_cpu_crash_stop(cpu, regs);
865
866 unreachable();
867 }
868 break;
869
870 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
871 case IPI_TIMER:
872 irq_enter();
873 tick_receive_broadcast();
874 irq_exit();
875 break;
876 #endif
877
878 #ifdef CONFIG_IRQ_WORK
879 case IPI_IRQ_WORK:
880 irq_enter();
881 irq_work_run();
882 irq_exit();
883 break;
884 #endif
885
886 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
887 case IPI_WAKEUP:
888 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
889 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
890 cpu);
891 break;
892 #endif
893
894 default:
895 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
896 break;
897 }
898
899 if ((unsigned)ipinr < NR_IPI)
900 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
901 set_irq_regs(old_regs);
902 }
903
smp_send_reschedule(int cpu)904 void smp_send_reschedule(int cpu)
905 {
906 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
907 }
908
909 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
tick_broadcast(const struct cpumask * mask)910 void tick_broadcast(const struct cpumask *mask)
911 {
912 smp_cross_call(mask, IPI_TIMER);
913 }
914 #endif
915
916 /*
917 * The number of CPUs online, not counting this CPU (which may not be
918 * fully online and so not counted in num_online_cpus()).
919 */
num_other_online_cpus(void)920 static inline unsigned int num_other_online_cpus(void)
921 {
922 unsigned int this_cpu_online = cpu_online(smp_processor_id());
923
924 return num_online_cpus() - this_cpu_online;
925 }
926
smp_send_stop(void)927 void smp_send_stop(void)
928 {
929 unsigned long timeout;
930
931 if (num_other_online_cpus()) {
932 cpumask_t mask;
933
934 cpumask_copy(&mask, cpu_online_mask);
935 cpumask_clear_cpu(smp_processor_id(), &mask);
936
937 if (system_state <= SYSTEM_RUNNING)
938 pr_crit("SMP: stopping secondary CPUs\n");
939 smp_cross_call(&mask, IPI_CPU_STOP);
940 }
941
942 /* Wait up to one second for other CPUs to stop */
943 timeout = USEC_PER_SEC;
944 while (num_other_online_cpus() && timeout--)
945 udelay(1);
946
947 if (num_other_online_cpus())
948 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
949 cpumask_pr_args(cpu_online_mask));
950 }
951
952 #ifdef CONFIG_KEXEC_CORE
crash_smp_send_stop(void)953 void crash_smp_send_stop(void)
954 {
955 static int cpus_stopped;
956 cpumask_t mask;
957 unsigned long timeout;
958
959 /*
960 * This function can be called twice in panic path, but obviously
961 * we execute this only once.
962 */
963 if (cpus_stopped)
964 return;
965
966 cpus_stopped = 1;
967
968 /*
969 * If this cpu is the only one alive at this point in time, online or
970 * not, there are no stop messages to be sent around, so just back out.
971 */
972 if (num_other_online_cpus() == 0)
973 return;
974
975 cpumask_copy(&mask, cpu_online_mask);
976 cpumask_clear_cpu(smp_processor_id(), &mask);
977
978 atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
979
980 pr_crit("SMP: stopping secondary CPUs\n");
981 smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
982
983 /* Wait up to one second for other CPUs to stop */
984 timeout = USEC_PER_SEC;
985 while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
986 udelay(1);
987
988 if (atomic_read(&waiting_for_crash_ipi) > 0)
989 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
990 cpumask_pr_args(&mask));
991 }
992
smp_crash_stop_failed(void)993 bool smp_crash_stop_failed(void)
994 {
995 return (atomic_read(&waiting_for_crash_ipi) > 0);
996 }
997 #endif
998
999 /*
1000 * not supported here
1001 */
setup_profiling_timer(unsigned int multiplier)1002 int setup_profiling_timer(unsigned int multiplier)
1003 {
1004 return -EINVAL;
1005 }
1006
have_cpu_die(void)1007 static bool have_cpu_die(void)
1008 {
1009 #ifdef CONFIG_HOTPLUG_CPU
1010 int any_cpu = raw_smp_processor_id();
1011
1012 if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
1013 return true;
1014 #endif
1015 return false;
1016 }
1017
cpus_are_stuck_in_kernel(void)1018 bool cpus_are_stuck_in_kernel(void)
1019 {
1020 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
1021
1022 return !!cpus_stuck_in_kernel || smp_spin_tables;
1023 }
1024