/arch/openrisc/lib/ |
D | memset.S | 48 l.or r17, r5, r0 // Set r17 = n 60 l.addi r17, r17, -1 // Decrease n 68 l.addi r17, r17, -1 // Decrease n 76 l.addi r17, r17, -1 // Decrease n 81 l.addi r17, r17, -4 // Decrease n 82 l.sfgeui r17, 4 87 l.sfeqi r17, 0 91 3: l.addi r17, r17, -1 // Decrease n 93 l.sfnei r17, 0
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/arch/ia64/kernel/ |
D | ivt.S | 124 shr.u r17=r16,61 // get the region number into r17 137 cmp.eq p6,p7=5,r17 // is IFA pointing into to region 5? 140 (p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place 149 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5 150 (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4] 158 ld8 r17=[r17] // get *pgd (may be 0) 160 (p7) cmp.eq p6,p7=r17,r0 // was pgd_present(*pgd) == NULL? 162 dep r28=r28,r17,3,(PAGE_SHIFT-3) // r28=pud_offset(pgd,addr) 168 dep r17=r18,r29,3,(PAGE_SHIFT-3) // r17=pmd_offset(pud,addr) 170 dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=pmd_offset(pgd,addr) [all …]
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D | minstate.h | 61 ld1 r17=[r16]; /* load current->thread.on_ustack flag */ \ 68 cmp.eq pKStk,pUStk=r0,r17; /* are we in kernel mode already? */ \ 85 adds r17=2*L1_CACHE_BYTES,r1; /* really: biggest cache-line size */ \ 88 lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES; \ 91 lfetch.fault.excl.nt1 [r17]; \ 97 adds r17=PT(R9),r1; /* initialize second base pointer */ \ 101 .mem.offset 8,0; st8.spill [r17]=r9,16; \ 104 .mem.offset 8,0; st8.spill [r17]=r11,24; \ 107 st8 [r17]=r30,16; /* save cr.ifs */ \ 115 st8 [r17]=r26,16; /* save ar.pfs */ \ [all …]
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D | gate.S | 124 ld8 r17=[base0],(ARG0_OFF-SIGHANDLER_OFF) // get pointer to signal handler's plabel 138 ld8 r10=[r17],8 // get signal handler entry point 141 ld8 gp=[r17] // get signal handler's global pointer 249 ld8 r17=[r16] 253 mov ar.rsc=r17 // put RSE into enforced lazy mode 254 shr.u r17=r17,16 256 sub r14=r14,r17 // r14 (bspstore1) <- bsp1 - (sc_loadrs >> 16) 257 shr.u r17=r17,3 // r17 <- (sc_loadrs >> 19) 262 add r14=r14,r17 // r14 <- rse_slot_num(bspstore1) + (sc_loadrs >> 19) 266 sub r14=r14,r17 // r14 <- -rse_num_regs(bspstore1, bsp1) [all …]
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D | fsys.S | 65 add r17=IA64_TASK_GROUP_LEADER_OFFSET,r16 67 ld8 r17=[r17] // r17 = current->group_leader 71 add r17=IA64_TASK_TGIDLINK_OFFSET,r17 74 ld8 r17=[r17] // r17 = current->group_leader->pids[PIDTYPE_PID].pid 76 add r8=IA64_PID_LEVEL_OFFSET,r17 79 add r17=IA64_PID_UPID_OFFSET,r17 // r17 = &pid->numbers[0] 83 add r17=r17,r8 // r17 = &pid->numbers[pid->level] 85 ld4 r8=[r17] // r8 = pid->numbers[pid->level].nr 87 mov r17=0 99 add r17=IA64_TASK_TGIDLINK_OFFSET,r16 [all …]
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D | head.S | 240 movl r17=KERNEL_START 243 mov cr.ifa=r17 267 movl r17=1f 269 mov cr.iip=r17 279 SAL_TO_OS_BOOT_HANDOFF_STATE_SAVE(r16,r17,r25) 321 movl r17=PAGE_KERNEL 326 or r18=r17,r18 329 mov r17=rr[r2] 332 dep r17=0,r17,8,24 334 mov cr.itir=r17 [all …]
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D | mca_asm.S | 65 addl r17=O(PTCE_STRIDE),r2 70 ld4 r21=[r17],4 // r21=ptce_stride[0] 73 ld4 r22=[r17] // r22=ptce_stride[1] 170 movl r17=KERNEL_START 173 mov cr.ifa=r17 178 dep r17=0,r19,0, KERNEL_TR_PAGE_SHIFT 180 or r18=r17,r18 316 mov r22=r17 // *minstate 485 st8 [temp1]=r17,16 // pal_min_state 626 add r1=32*1,r17 [all …]
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D | relocate_kernel.S | 66 addl r17=O(PTCE_STRIDE),r2 71 ld4 r21=[r17],4 // r21=ptce_stride[0] 74 ld4 r22=[r17] // r22=ptce_stride[1] 139 (p6) and r17=r30, r16 159 st8 [r17]=r14;; 160 fc.i r17 161 add r17=8, r17 266 st8 [in0]=r17, 8 // r17
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D | entry.S | 246 .save @priunat,r17 247 mov r17=ar.unat // preserve caller's 347 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat 390 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc 443 mov ar.lc=r17 472 adds r17=PT(F7)+16,sp 475 stf.spill [r17]=f7,32 478 stf.spill [r17]=f9,32 481 stf.spill [r17]=f11 489 adds r17=PT(F7)+16,sp [all …]
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D | esi_stub.S | 77 movl r17=PSR_BITS_TO_SET 79 or loc3=loc3,r17
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D | efi_stub.S | 60 movl r17=PSR_BITS_TO_SET 62 or loc3=loc3,r17
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D | pal.S | 175 movl r17=PAL_PSR_BITS_TO_SET 177 or loc3=loc3,r17 // add in psr the bits to set 227 movl r17=PAL_PSR_BITS_TO_SET 229 or loc3=loc3,r17 // add in psr the bits to set
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/arch/unicore32/lib/ |
D | copy_page.S | 27 stm.w (r17 - r19, lr), [sp-] 28 mov r17, r0 34 stm.w (r0 - r15), [r17]+ 38 ldm.w (r17 - r19, pc), [sp]+
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/arch/tile/kernel/ |
D | mcount_64.S | 145 moveli r17, hw2_last(ftrace_graph_entry_stub) 149 shl16insli r17, r17, hw1(ftrace_graph_entry_stub) 153 shl16insli r17, r17, hw0(ftrace_graph_entry_stub) 156 sub r17, r16, r17 157 bnez r17, ftrace_graph_caller
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/arch/ia64/lib/ |
D | xor.S | 36 mov r17 = in2 45 (p[0]) ld8.nta s2[0] = [r17], 8 74 mov r17 = in2 84 (p[0]) ld8.nta s2[0] = [r17], 8 115 mov r17 = in2 126 (p[0]) ld8.nta s2[0] = [r17], 8 159 mov r17 = in2 171 (p[0]) ld8.nta s2[0] = [r17], 8
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/arch/ia64/hp/sim/boot/ |
D | boot_head.S | 119 mov r17=0x3ffff /* implemented PMD */ 128 st8 [r29]=r17,16 /* store implemented PMD */ 134 mov r17=0xf0 /* retired bundles capable PMC */ 142 st8 [r29]=r17,16 /* store retired bundle capable */
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/arch/powerpc/lib/ |
D | copypage_power7.S | 119 std r17,STK_REG(R17)(r1) 136 ld r17,96(r4) 153 std r17,96(r3) 163 ld r17,STK_REG(R17)(r1)
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/arch/tile/lib/ |
D | memcpy_32.S | 247 { slt_u r13, r3, r15; addi r17, r1, 16 } 252 EX: { lw r17, r17; addi r1, r1, 48; mvz r3, r13, r1 } /* r17 = WORD_4 */ 275 EX: { lw r19, r1; addi r1, r1, 4; move zero, r17 } /* r19 = WORD_5 */ 295 EX: { sw r0, r17; addi r0, r0, 4; mvz r9, r16, r13 }/* store(WORD_4) */ 401 { mvz r3, r8, r1; movei r17, 0 } 436 EX: { lwadd_na r12, r1, 4; addi r17, r17, 1 } 446 { move r6, r14; bbst r17, .Lcopy_half_an_unaligned_line }
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/arch/nios2/kernel/ |
D | insnemu.S | 144 stw r17, 68(sp) 269 movi r17, 0 281 xor r17, r3, r5 /* MSB contains sign of quotient */ 352 bge r17, zero, quotient_is_nonnegative 575 ldw r17, 68(sp)
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/arch/powerpc/purgatory/ |
D | trampoline.S | 54 mr %r17,%r3 /* save cpu id to r17 */ 73 STWX_BE %r17,%r3,%r4 /* Store my cpu as __be32 at byte 28 */
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/arch/alpha/include/uapi/asm/ |
D | ptrace.h | 50 unsigned long r17; member
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/arch/arc/include/asm/ |
D | unwind.h | 34 unsigned long r17; member 93 PTREGS_INFO(r17), \
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/arch/arc/include/uapi/asm/ |
D | ptrace.h | 46 unsigned long r19, r18, r17, r16, r15, r14, r13; member
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/arch/hexagon/include/uapi/asm/ |
D | user.h | 31 unsigned long r17; member
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/arch/hexagon/include/asm/ |
D | processor.h | 103 unsigned long r17; member
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