| /arch/arm64/crypto/ |
| D | ghash-ce-core.S | 31 t7 .req v14
63 ext t7.8b, \ad\().8b, \ad\().8b, #3 // A3
71 tbl t7.16b, {\ad\().16b}, perm3.16b // A3
93 pmull\t t7.8h, t7.\nb, \bd // J = A3*B
100 eor t7.16b, t7.16b, t8.16b // N = I + J
104 uzp1 t6.2d, t7.2d, t9.2d
105 uzp2 t7.2d, t7.2d, t9.2d
114 eor t6.16b, t6.16b, t7.16b
115 and t7.16b, t7.16b, k00_16.16b
118 eor t6.16b, t6.16b, t7.16b
[all …]
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| D | aes-neonbs-core.S | 253 t0, t1, t2, t3, t4, t5, t6, t7, inv
267 ext \t7\().16b, \x7\().16b, \x7\().16b, #12
270 eor \x7\().16b, \x7\().16b, \t7\().16b
283 eor \t7\().16b, \t7\().16b, \x6\().16b
295 eor \x5\().16b, \x5\().16b, \t7\().16b
300 eor \x5\().16b, \x5\().16b, \t7\().16b
309 t0, t1, t2, t3, t4, t5, t6, t7 argument
312 ext \t7\().16b, \x7\().16b, \x7\().16b, #8
317 eor \t7\().16b, \t7\().16b, \x7\().16b
331 eor \x1\().16b, \x1\().16b, \t7\().16b
[all …]
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| /arch/ia64/lib/ |
| D | copy_page.S | 45 t5[PIPE_DEPTH], t6[PIPE_DEPTH], t7[PIPE_DEPTH], t8[PIPE_DEPTH]
87 (p[0]) ld8 t7[0]=[src1],16
88 (EPI) st8 [tgt1]=t7[PIPE_DEPTH-1],16
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| D | copy_page_mck.S | 83 #define t7 t3 // alias! macro
86 #define t11 t7 // alias!
154 (p[D]) ld8 t7 = [src1], 3*8
161 (p[D]) st8 [dst1] = t7, 3*8
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| D | memcpy_mck.S | 51 #define t7 t3 // alias! macro
55 #define t11 t7 // alias!
234 EK(.ex_handler, (p[D]) ld8 t7 = [src1], 3*8)
241 EK(.ex_handler, (p[D]) st8 [dst1] = t7, 3*8)
448 EX(.ex_handler_short, (p10) ld1 t7=[src0],2)
452 EX(.ex_handler_short, (p10) st1 [dst0]=t7,2)
488 EK(.ex_handler_short, (p12) ld1 t7=[src0],2)
495 EK(.ex_handler_short, (p12) st1 [dst0] = t7)
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| /arch/x86/crypto/ |
| D | camellia-aesni-avx2-asm_64.S | 69 t7, mem_cd, key) \ argument
74 vpbroadcastd .L0f0f0f0f, t7; \
92 filter_8bit(x0, t5, t6, t7, t4); \
93 filter_8bit(x7, t5, t6, t7, t4); \
96 filter_8bit(x3, t2, t3, t7, t4); \
97 filter_8bit(x6, t2, t3, t7, t4); \
100 filter_8bit(x2, t5, t6, t7, t4); \
101 filter_8bit(x5, t5, t6, t7, t4); \
102 filter_8bit(x1, t5, t6, t7, t4); \
103 filter_8bit(x4, t5, t6, t7, t4); \
[all …]
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| D | camellia-aesni-avx-asm_64.S | 52 t7, mem_cd, key) \ argument
57 vbroadcastss .L0f0f0f0f, t7; \
74 filter_8bit(x0, t0, t1, t7, t6); \
75 filter_8bit(x7, t0, t1, t7, t6); \
76 filter_8bit(x1, t0, t1, t7, t6); \
77 filter_8bit(x4, t0, t1, t7, t6); \
78 filter_8bit(x2, t0, t1, t7, t6); \
79 filter_8bit(x5, t0, t1, t7, t6); \
83 filter_8bit(x3, t2, t3, t7, t6); \
84 filter_8bit(x6, t2, t3, t7, t6); \
[all …]
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| /arch/alpha/include/uapi/asm/ |
| D | regdef.h | 14 #define t7 $8 macro
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| /arch/arm/crypto/ |
| D | aes-neonbs-core.S | 305 t0, t1, t2, t3, t4, t5, t6, t7, inv
319 vext.8 \t7, \x7, \x7, #12
322 veor.8 \x7, \x7, \t7
335 veor \t7, \t7, \x6
347 veor \x5, \x5, \t7
352 veor \x5, \x5, \t7
361 t0, t1, t2, t3, t4, t5, t6, t7 argument
368 vld1.8 {\t6-\t7}, [bskey, :256]
374 veor \x7, \x7, \t7
377 vext.8 \t7, \x7, \x7, #8
[all …]
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| /arch/mips/lib/ |
| D | csum_partial.S | 36 #define t7 $15 macro
109 move t7, zero
115 andi t7, src, 0x1 /* odd buffer? */
118 beqz t7, .Lword_align
286 movn sum, v1, t7
289 beqz t7, 1f /* odd buffer alignment? */
506 LOAD(t7, UNIT(7)(src), .Ll_exc_copy\@)
522 ADDC(t6, t7)
523 STORE(t7, UNIT(7)(dst), .Ls_exc\@)
535 #define rem t7
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| D | memset.S | 28 #define FILLPTRG t7
166 LONG_SRL t7, t0, 1
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| D | memcpy.S | 181 #define t7 $15 macro
327 LOAD(t7, UNIT(5)(src), .Ll_exc_copy\@)
337 STORE(t7, UNIT(-3)(dst), .Ls_exc_p3u\@)
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| /arch/mips/include/asm/ |
| D | regdef.h | 40 #define t7 $15 macro
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| /arch/tile/kernel/ |
| D | hvglue_trace.c | 160 #define __HV_DECL7(t7, a7, ...) t7 a7, __HV_DECL6(__VA_ARGS__) argument
169 #define __HV_PASS7(t7, a7, ...) a7, __HV_PASS6(__VA_ARGS__) argument
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| /arch/arm64/include/asm/ |
| D | assembler.h | 424 .macro copy_page dest:req src:req t1:req t2:req t3:req t4:req t5:req t6:req t7:req t8:req
428 ldp \t7, \t8, [\src, #48]
433 stnp \t7, \t8, [\dest, #48]
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| /arch/sparc/lib/ |
| D | blockops.S | 28 #define MIRROR_BLOCK(dst, src, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
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| D | copy_user.S | 69 #define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
81 st %t7, [%dst + (offset) + 0x1c];
83 #define MOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
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| D | memcpy.S | 19 #define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
31 st %t7, [%dst + (offset) + 0x1c];
33 #define MOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
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| D | checksum_32.S | 194 #define CSUMCOPY_BIGCHUNK_ALIGNED(src, dst, sum, off, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
210 addxcc t7, sum, sum;
216 #define CSUMCOPY_BIGCHUNK(src, dst, sum, off, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
235 st t7, [dst + off + 0x1c]; \
236 addxcc t7, sum, sum;
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| /arch/mips/kernel/ |
| D | bmips_5xxx_init.S | 731 move t7, ra
746 jr t7
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| D | scall32-o32.S | 69 load_a6: user_lw(t7, 24(t0)) # argument #7 from usp
75 sw t7, 24(sp) # argument #7 to ksp
168 li t7, 0
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| D | pm-cps.c | 77 t0, t1, t2, t3, t4, t5, t6, t7, enumerator
352 const unsigned r_pcohctl = t7; in cps_gen_entry_code()
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| /arch/mips/cavium-octeon/ |
| D | octeon-memcpy.S | 116 #define t7 $15 macro
|