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/arch/ia64/include/asm/sn/
Dshubio.h230 u64 ii_wid_regval;
232 u64 w_rsvd_1:1;
233 u64 w_mfg_num:11;
234 u64 w_part_num:16;
235 u64 w_rev_num:4;
236 u64 w_rsvd:32;
249 u64 ii_wstat_regval;
251 u64 w_pending:4;
252 u64 w_xt_crd_to:1;
253 u64 w_xt_tail_to:1;
[all …]
Dtioce.h38 u64 ce_adm_id; /* 0x000000 */
39 u64 ce_pad_000008; /* 0x000008 */
40 u64 ce_adm_dyn_credit_status; /* 0x000010 */
41 u64 ce_adm_last_credit_status; /* 0x000018 */
42 u64 ce_adm_credit_limit; /* 0x000020 */
43 u64 ce_adm_force_credit; /* 0x000028 */
44 u64 ce_adm_control; /* 0x000030 */
45 u64 ce_adm_mmr_chn_timeout; /* 0x000038 */
46 u64 ce_adm_ssp_ure_timeout; /* 0x000040 */
47 u64 ce_adm_ssp_dre_timeout; /* 0x000048 */
[all …]
Dtiocp.h25 u64 cp_id; /* 0x000000 */
26 u64 cp_stat; /* 0x000008 */
27 u64 cp_err_upper; /* 0x000010 */
28 u64 cp_err_lower; /* 0x000018 */
30 u64 cp_control; /* 0x000020 */
31 u64 cp_req_timeout; /* 0x000028 */
32 u64 cp_intr_upper; /* 0x000030 */
33 u64 cp_intr_lower; /* 0x000038 */
35 u64 cp_err_cmdword; /* 0x000040 */
36 u64 _pad_000048; /* 0x000048 */
[all …]
Dpic.h77 u64 p_wid_id; /* 0x000000 */
78 u64 p_wid_stat; /* 0x000008 */
79 u64 p_wid_err_upper; /* 0x000010 */
80 u64 p_wid_err_lower; /* 0x000018 */
82 u64 p_wid_control; /* 0x000020 */
83 u64 p_wid_req_timeout; /* 0x000028 */
84 u64 p_wid_int_upper; /* 0x000030 */
85 u64 p_wid_int_lower; /* 0x000038 */
87 u64 p_wid_err_cmdword; /* 0x000040 */
88 u64 p_wid_llp; /* 0x000048 */
[all …]
/arch/powerpc/include/asm/
Dspu_csa.h111 u64 spc_mssync_RW;
114 u64 mfc_ea_W;
136 u64 mfc_sr1_RW;
137 u64 mfc_lpid_RW;
138 u64 spu_idr_RW;
139 u64 mfc_vr_RO;
140 u64 spu_vr_RO;
141 u64 int_mask_class0_RW;
142 u64 int_mask_class1_RW;
143 u64 int_mask_class2_RW;
[all …]
Dcell-regs.h42 u64 val;
47 u64 val;
57 u64 pad_0x0000; /* 0x0000 */
59 u64 group_control; /* 0x0008 */
63 u64 debug_bus_control; /* 0x00a8 */
67 u64 trace_aux_data; /* 0x0100 */
68 u64 trace_buffer_0_63; /* 0x0108 */
69 u64 trace_buffer_64_127; /* 0x0110 */
70 u64 trace_address; /* 0x0118 */
71 u64 ext_tr_timer; /* 0x0120 */
[all …]
Dkvm_fpu.h25 extern void fps_fres(u64 *fpscr, u32 *dst, u32 *src1);
26 extern void fps_frsqrte(u64 *fpscr, u32 *dst, u32 *src1);
27 extern void fps_fsqrts(u64 *fpscr, u32 *dst, u32 *src1);
29 extern void fps_fadds(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
30 extern void fps_fdivs(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
31 extern void fps_fmuls(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
32 extern void fps_fsubs(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
34 extern void fps_fmadds(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2,
36 extern void fps_fmsubs(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2,
38 extern void fps_fnmadds(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2,
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Dps3stor.h31 u64 start;
32 u64 size;
40 u64 blk_size;
42 u64 tag;
43 u64 lv1_status;
48 u64 bounce_lpar;
65 extern u64 ps3stor_read_write_sectors(struct ps3_storage_device *dev, u64 lpar,
66 u64 start_sector, u64 sectors,
68 extern u64 ps3stor_send_command(struct ps3_storage_device *dev, u64 cmd,
69 u64 arg1, u64 arg2, u64 arg3, u64 arg4);
Dps3gpu.h46 static inline int lv1_gpu_display_sync(u64 context_handle, u64 head, in lv1_gpu_display_sync()
47 u64 ddr_offset) in lv1_gpu_display_sync()
54 static inline int lv1_gpu_display_flip(u64 context_handle, u64 head, in lv1_gpu_display_flip()
55 u64 ddr_offset) in lv1_gpu_display_flip()
62 static inline int lv1_gpu_fb_setup(u64 context_handle, u64 xdr_lpar, in lv1_gpu_fb_setup()
63 u64 xdr_size, u64 ioif_offset) in lv1_gpu_fb_setup()
70 static inline int lv1_gpu_fb_blit(u64 context_handle, u64 ddr_offset, in lv1_gpu_fb_blit()
71 u64 ioif_offset, u64 sync_width, u64 pitch) in lv1_gpu_fb_blit()
79 static inline int lv1_gpu_fb_close(u64 context_handle) in lv1_gpu_fb_close()
/arch/alpha/include/asm/
Derr_ev7.h11 u64 whami;
12 u64 rbox_whami;
13 u64 rbox_int;
14 u64 exc_addr;
16 u64 halt_code;
17 u64 reserved;
24 u64 i_stat;
25 u64 dc_stat;
26 u64 c_addr;
27 u64 c_syndrome_1;
[all …]
/arch/s390/include/asm/
Dnmi.h41 u64 sd : 1; /* 00 system damage */
42 u64 pd : 1; /* 01 instruction-processing damage */
43 u64 sr : 1; /* 02 system recovery */
44 u64 : 1; /* 03 */
45 u64 cd : 1; /* 04 timing-facility damage */
46 u64 ed : 1; /* 05 external damage */
47 u64 : 1; /* 06 */
48 u64 dg : 1; /* 07 degradation */
49 u64 w : 1; /* 08 warning pending */
50 u64 cp : 1; /* 09 channel-report pending */
[all …]
Dpci_insn.h60 u64 : 56;
61 u64 pba; /* PCI base address */
62 u64 pal; /* PCI address limit */
63 u64 iota; /* I/O Translation Anchor */
73 u64 aibv; /* Adapter int bit vector address */
74 u64 aisb; /* Adapter int summary bit address */
75 u64 fmb_addr; /* Function measurement block address and key */
80 u8 zpci_mod_fc(u64 req, struct zpci_fib *fib, u8 *status);
81 int zpci_refresh_trans(u64 fn, u64 addr, u64 range);
82 int zpci_load(u64 *data, u64 req, u64 offset);
[all …]
/arch/ia64/include/asm/
Dsal.h115 typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
170 u64 pal_proc;
171 u64 sal_proc;
172 u64 gp;
185 u64 addr; /* physical address of memory */
202 u64 addr; /* virtual address of area covered */
203 u64 page_size; /* encoded page size */
211 u64 domain_info; /* physical address of domain info table */
215 u64 proc_count; /* number of processors in domain */
216 u64 proc_list; /* physical address of LID array */
[all …]
Desi.h23 extern struct ia64_sal_retval esi_call_phys (void *, u64 *);
26 u64, u64, u64, u64, u64, u64, u64, u64);
27 extern int ia64_esi_call_phys(efi_guid_t, struct ia64_sal_retval *, u64, u64,
28 u64, u64, u64, u64, u64, u64);
Dpal.h123 typedef u64 pal_cache_level_t;
131 typedef u64 pal_cache_type_t;
144 typedef u64 pal_cache_line_state_t;
156 u64 u : 1, /* 0 Unified cache ? */
167 u64 pcci1_data;
183 u64 pcci2_data;
191 u64 pcci_reserved;
283 u64 pclid_data;
285 u64 cache_type : 8, /* 7-0 cache type */
298 u64 cache_type : 8, /* 7-0 cache type */
[all …]
Dmeminit.h27 u64 start; /* virtual address of beginning of element */
28 u64 end; /* virtual address of end of element + 1 */
37 extern int filter_rsvd_memory (u64 start, u64 end, void *arg);
38 extern int filter_memory (u64 start, u64 end, void *arg);
39 extern unsigned long efi_memmap_init(u64 *s, u64 *e);
40 extern int find_max_min_low_pfn (u64, u64, void *);
43 extern int reserve_elfcorehdr(u64 *start, u64 *end);
59 extern int register_active_ranges(u64 start, u64 len, int nid);
65 extern int find_largest_hole(u64 start, u64 end, void *arg);
66 extern int create_mem_map_page_table(u64 start, u64 end, void *arg);
/arch/powerpc/platforms/ps3/
Dplatform.h94 u64 *value);
95 int ps3_repository_read_bus_id(unsigned int bus_index, u64 *bus_id);
117 unsigned int dev_index, const char *dev_str, u64 *value);
119 u64 *dev_id);
129 unsigned int dev_index, unsigned int reg_index, u64 *bus_addr,
130 u64 *len);
133 enum ps3_reg_type *reg_type, u64 *bus_addr, u64 *len);
142 u64 bus_id;
143 u64 dev_id;
148 u64 bus_id, u64 dev_id);
[all …]
/arch/powerpc/boot/
Dswab.h19 static inline u64 swab64(u64 x) in swab64()
21 return (u64)((x & (u64)0x00000000000000ffULL) << 56) | in swab64()
22 (u64)((x & (u64)0x000000000000ff00ULL) << 40) | in swab64()
23 (u64)((x & (u64)0x0000000000ff0000ULL) << 24) | in swab64()
24 (u64)((x & (u64)0x00000000ff000000ULL) << 8) | in swab64()
25 (u64)((x & (u64)0x000000ff00000000ULL) >> 8) | in swab64()
26 (u64)((x & (u64)0x0000ff0000000000ULL) >> 24) | in swab64()
27 (u64)((x & (u64)0x00ff000000000000ULL) >> 40) | in swab64()
28 (u64)((x & (u64)0xff00000000000000ULL) >> 56); in swab64()
/arch/mips/include/asm/
Dmips-r2-to-r6-emul.h14 u64 movs;
15 u64 hilo;
16 u64 muls;
17 u64 divs;
18 u64 dsps;
19 u64 bops;
20 u64 traps;
21 u64 fpus;
22 u64 loads;
23 u64 stores;
[all …]
/arch/mips/include/asm/mach-loongson64/
Dboot_param.h25 u64 mem_start; /* memory map start address */
68 u64 uart_base;
82 u64 base_addr; /* base address of device registers */
95 u64 ec_base_addr;
98 u64 tcm_base_addr;
99 u64 workarounds; /* see workarounds.h */
110 u64 ht_int_bit; /* 3A: 1<<24; 3B: 1<<16 */
111 u64 ht_enable; /* irqs used in this PIC */
113 u64 pci_mem_start_addr;
114 u64 pci_mem_end_addr;
[all …]
/arch/x86/include/asm/uv/
Dbios.h57 u64 mmr_base;
58 u64 gru_base;
107 u64 function; /* BIOS runtime callback function ptr */
124 u64 val;
126 u64 hub_version : 8,
142 extern s64 uv_bios_call(enum uv_bios_cmd, u64, u64, u64, u64, u64);
143 extern s64 uv_bios_call_irqsave(enum uv_bios_cmd, u64, u64, u64, u64, u64);
144 extern s64 uv_bios_call_reentrant(enum uv_bios_cmd, u64, u64, u64, u64, u64);
147 extern s64 uv_bios_freq_base(u64, u64 *);
151 extern s64 uv_bios_change_memprotect(u64, u64, enum uv_memprotect);
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/arch/sparc/crypto/
Daes_glue.c34 void (*encrypt)(const u64 *key, const u32 *input, u32 *output);
35 void (*decrypt)(const u64 *key, const u32 *input, u32 *output);
36 void (*load_encrypt_keys)(const u64 *key);
37 void (*load_decrypt_keys)(const u64 *key);
38 void (*ecb_encrypt)(const u64 *key, const u64 *input, u64 *output,
40 void (*ecb_decrypt)(const u64 *key, const u64 *input, u64 *output,
42 void (*cbc_encrypt)(const u64 *key, const u64 *input, u64 *output,
43 unsigned int len, u64 *iv);
44 void (*cbc_decrypt)(const u64 *key, const u64 *input, u64 *output,
45 unsigned int len, u64 *iv);
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/arch/x86/include/asm/e820/
Dapi.h13 extern bool e820__mapped_any(u64 start, u64 end, enum e820_type type);
14 extern bool e820__mapped_all(u64 start, u64 end, enum e820_type type);
16 extern void e820__range_add (u64 start, u64 size, enum e820_type type);
17 extern u64 e820__range_update(u64 start, u64 size, enum e820_type old_type, enum e820_type new_typ…
18 extern u64 e820__range_remove(u64 start, u64 size, enum e820_type old_type, bool check_type);
27 extern u64 e820__memblock_alloc_reserved(u64 size, u64 align);
36 extern void e820__memory_setup_extended(u64 phys_addr, u32 data_len);
43 extern int e820__get_entry_type(u64 start, u64 end);
49 static inline bool is_ISA_range(u64 start, u64 end) in is_ISA_range()
/arch/x86/platform/uv/
Dbios_uv.c32 static s64 __uv_bios_call(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, in __uv_bios_call()
33 u64 a4, u64 a5) in __uv_bios_call()
49 ret = efi_call((void *)__va(tab->function), (u64)which, a1, a2, a3, a4, a5); in __uv_bios_call()
51 ret = efi_call_virt_pointer(tab, function, (u64)which, a1, a2, a3, a4, a5); in __uv_bios_call()
56 s64 uv_bios_call(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, u64 a4, u64 a5) in uv_bios_call()
70 s64 uv_bios_call_irqsave(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, in uv_bios_call_irqsave()
71 u64 a4, u64 a5) in uv_bios_call_irqsave()
88 s64 uv_bios_call_reentrant(enum uv_bios_cmd which, u64 a1, u64 a2, u64 a3, in uv_bios_call_reentrant()
89 u64 a4, u64 a5) in uv_bios_call_reentrant()
117 u64 v0, v1; in uv_bios_get_sn_info()
[all …]
/arch/s390/pci/
Dpci_insn.c17 static inline void zpci_err_insn(u8 cc, u8 status, u64 req, u64 offset) in zpci_err_insn()
20 u64 req; in zpci_err_insn()
21 u64 offset; in zpci_err_insn()
30 static inline u8 __mpcifc(u64 req, struct zpci_fib *fib, u8 *status) in __mpcifc()
44 u8 zpci_mod_fc(u64 req, struct zpci_fib *fib, u8 *status) in zpci_mod_fc()
61 static inline u8 __rpcit(u64 fn, u64 addr, u64 range, u8 *status) in __rpcit()
63 register u64 __addr asm("2") = addr; in __rpcit()
64 register u64 __range asm("3") = range; in __rpcit()
78 int zpci_refresh_trans(u64 fn, u64 addr, u64 range) in zpci_refresh_trans()
106 static inline int ____pcilg(u64 *data, u64 req, u64 offset, u8 *status) in ____pcilg()
[all …]

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