| /arch/x86/crypto/ |
| D | serpent-sse2-x86_64-asm_64.S | 56 #define S0_1(x0, x1, x2, x3, x4) \ argument
57 movdqa x3, x4; \
59 pxor x4, x0; \
60 pxor x2, x4; \
61 pxor RNOT, x4; \
64 pxor x4, x1; \
66 #define S0_2(x0, x1, x2, x3, x4) \ argument
68 por x0, x4; \
73 pxor x4, x2; \
76 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
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| D | serpent-sse2-i586-asm_32.S | 57 #define K(x0, x1, x2, x3, x4, i) \ argument
58 get_key(i, 0, x4); \
61 pxor x4, x0; \
64 get_key(i, 3, x4); \
65 pxor x4, x3;
67 #define LK(x0, x1, x2, x3, x4, i) \ argument
68 movdqa x0, x4; \
70 psrld $(32 - 13), x4; \
71 por x4, x0; \
73 movdqa x2, x4; \
[all …]
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| D | serpent-avx-x86_64-asm_64.S | 70 #define S0_1(x0, x1, x2, x3, x4) \ argument
73 vpxor x2, x3, x4; \
74 vpxor RNOT, x4, x4; \
77 vpxor x4, x1, x1; \
79 #define S0_2(x0, x1, x2, x3, x4) \ argument
81 vpor x0, x4, x4; \
86 vpxor x4, x2, x2; \
89 #define S1_1(x0, x1, x2, x3, x4) \ argument
93 vpand tp, x1, x4; \
98 #define S1_2(x0, x1, x2, x3, x4) \ argument
[all …]
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| D | serpent-avx2-asm_64.S | 66 #define S0_1(x0, x1, x2, x3, x4) \ argument
69 vpxor x2, x3, x4; \
70 vpxor RNOT, x4, x4; \
73 vpxor x4, x1, x1; \
75 #define S0_2(x0, x1, x2, x3, x4) \ argument
77 vpor x0, x4, x4; \
82 vpxor x4, x2, x2; \
85 #define S1_1(x0, x1, x2, x3, x4) \ argument
89 vpand tp, x1, x4; \
94 #define S1_2(x0, x1, x2, x3, x4) \ argument
[all …]
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| D | glue_helper-asm-avx.S | 18 #define load_8way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
23 vmovdqu (4*16)(src), x4; \
28 #define store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
33 vmovdqu x4, (4*16)(dst); \
38 #define store_cbc_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
42 vpxor (3*16)(src), x4, x4; \
46 store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
54 #define load_ctr_8way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2) \ argument
71 vpshufb t1, x7, x4; \
82 #define store_ctr_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
[all …]
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| D | glue_helper-asm-avx2.S | 13 #define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
18 vmovdqu (4*32)(src), x4; \
23 #define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
28 vmovdqu x4, (4*32)(dst); \
33 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \ argument
40 vpxor (3*32+16)(src), x4, x4; \
44 store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
60 #define load_ctr_16way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t0x, t1, \ argument
82 vpshufb t1, t2, x4; \
93 #define store_ctr_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
[all …]
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| /arch/arm64/kvm/ |
| D | hyp-init.S | 68 mrs x4, tcr_el1
70 and x4, x4, x5
72 orr x4, x4, x5
90 bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH
97 bfi x4, x5, #16, #3
99 msr tcr_el2, x4
101 mrs x4, mair_el1
102 msr mair_el2, x4
114 ldr x4, =(SCTLR_EL2_RES1 | (SCTLR_ELx_FLAGS & ~SCTLR_ELx_A))
115 CPU_BE( orr x4, x4, #SCTLR_ELx_EE)
[all …]
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| /arch/arm64/kernel/ |
| D | smccc-call.S | 21 ldr x4, [sp]
22 stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
23 stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
24 ldr x4, [sp, #8]
25 cbz x4, 1f /* no quirk structure */
26 ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
29 str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
|
| /arch/arm/boot/dts/ |
| D | spear13xx.dtsi | 94 interrupts = <0 28 0x4>;
101 interrupts = <0 29 0x4>;
110 interrupts = <0 19 0x4>;
127 interrupts = <0 59 0x4>;
150 interrupts = <0 20 0x4
151 0 21 0x4
152 0 22 0x4
153 0 23 0x4>;
161 interrupts = <0 33 0x4
162 0 34 0x4>;
[all …]
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| D | spear1310.dtsi | 62 interrupts = <0 68 0x4>;
71 interrupts = <0 69 0x4>;
80 interrupts = <0 70 0x4>;
90 interrupts = <0 68 0x4>;
92 interrupt-map = <0x0 0 &gic 0 68 0x4>;
109 interrupts = <0 69 0x4>;
111 interrupt-map = <0x0 0 &gic 0 69 0x4>;
128 interrupts = <0 70 0x4>;
130 interrupt-map = <0x0 0 &gic 0 70 0x4>;
146 interrupts = <0 95 0x4>;
[all …]
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| D | mmp2.dtsi | 55 reg = <0x150 0x4>, <0x168 0x4>;
65 reg = <0x154 0x4>, <0x16c 0x4>;
76 reg = <0x180 0x4>, <0x17c 0x4>;
86 reg = <0x158 0x4>, <0x170 0x4>;
96 reg = <0x15c 0x4>, <0x174 0x4>;
106 reg = <0x160 0x4>, <0x178 0x4>;
116 reg = <0x188 0x4>, <0x184 0x4>;
187 reg = <0xd4019000 0x4>;
191 reg = <0xd4019004 0x4>;
195 reg = <0xd4019008 0x4>;
[all …]
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| D | spear1340.dtsi | 45 interrupts = <0 72 0x4>;
55 interrupts = <0 68 0x4>;
57 interrupt-map = <0x0 0 &gic 0 68 0x4>;
74 interrupts = <0 98 0x4
75 0 99 0x4>;
85 interrupts = <0 100 0x4
86 0 101 0x4>;
109 interrupts = <0 84 0x4>;
116 interrupts = <0 85 0x4>;
125 interrupts = <0 99 0x4>;
[all …]
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| /arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1043a.dtsi | 173 interrupts = <0 106 0x4>,
174 <0 107 0x4>,
175 <0 95 0x4>,
176 <0 97 0x4>;
221 interrupts = <0 75 0x4>;
228 interrupts = <0 71 0x4>;
236 interrupts = <0 72 0x4>;
244 interrupts = <0 73 0x4>;
252 interrupts = <0 74 0x4>;
266 interrupts = <0 43 0x4>;
[all …]
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| /arch/arm64/mm/ |
| D | cache.S | 52 uaccess_ttbr0_enable x2, x3, x4
55 bic x4, x0, x3
58 add x4, x4, x2
59 cmp x4, x1
65 bic x4, x0, x3
67 USER(9f, ic ivau, x4 ) // invalidate I line PoU
68 add x4, x4, x2
69 cmp x4, x1
|
| /arch/powerpc/boot/dts/ |
| D | taishan.dts | 73 interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
86 interrupts = <0x3 0x4 0x2 0x4>; /* cascade */
98 interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
149 interrupts = <0x0 0x1 0x2 0x3 0x4>;
153 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
154 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
155 /*SERR*/ 0x2 &UIC1 0x0 0x4
156 /*TXDE*/ 0x3 &UIC1 0x1 0x4
157 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
171 interrupts = <0x7 0x4>;
[all …]
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| D | acadia.dts | 78 0x13 0x4 /* TXEOB */
79 0x15 0x4 /* RXEOB */
80 0x12 0x4 /* SERR, TXDE, RXDE */>;
99 interrupts = <0x5 0x4>;
109 interrupts = <0x6 0x4>;
116 interrupts = <0xa 0x4>;
134 0x10 0x4 /* Ethernet */
135 0x11 0x4 /* Ethernet Wake up */>;
153 interrupts = <0x7 0x4>;
160 interrupts = <0x8 0x4>;
[all …]
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| D | fsp2.dts | 83 interrupts = <21 0x4 4 0x84>;
97 interrupts = <22 0x4 5 0x84>;
111 interrupts = <23 0x4 6 0x84>;
125 interrupts = <24 0x4 7 0x84>;
138 interrupts = <25 0x4 8 0x84>;
151 interrupts = <26 0x4 9 0x84>;
165 interrupts = <16 0x4 0 0x84>;
178 interrupts = <17 0x4 1 0x84>;
191 interrupts = <18 0x4 2 0x84>;
204 interrupts = <19 0x4 3 0x84>;
[all …]
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| D | icon.dts | 70 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
82 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
94 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
118 ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000
119 0x4 0x00200000 0x4 0x00200000 0x00000400
120 0x4 0xe0000000 0x4 0xe0000000 0x20000000
141 interrupts = <0x0 0x1 0x2 0x3 0x4>;
145 interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
146 /*RXEOB*/ 0x1 &UIC1 0x7 0x4
147 /*SERR*/ 0x2 &UIC1 0x1 0x4
[all …]
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| D | makalu.dts | 69 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
81 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
96 interrupts = <0x5 0x4 /* ECC DED Error */
97 0x6 0x4 /* ECC SEC Error */ >;
106 interrupts = <0x0 0x1 0x2 0x3 0x4>;
110 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
111 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
112 /*SERR*/ 0x2 &UIC1 0x0 0x4
113 /*TXDE*/ 0x3 &UIC1 0x1 0x4
114 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
[all …]
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| D | haleakala.dts | 68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
80 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
95 interrupts = <0x5 0x4 /* ECC DED Error */
96 0x6 0x4>; /* ECC SEC Error */
105 interrupts = <0x0 0x1 0x2 0x3 0x4>;
109 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
110 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
111 /*SERR*/ 0x2 &UIC1 0x0 0x4
112 /*TXDE*/ 0x3 &UIC1 0x1 0x4
113 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
[all …]
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| D | katmai.dts | 74 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
86 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
98 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
122 ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000
123 0x4 0x00200000 0x4 0x00200000 0x00000400
124 0x4 0xe0000000 0x4 0xe0000000 0x20000000
145 interrupts = <0x0 0x1 0x2 0x3 0x4>;
149 interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
150 /*RXEOB*/ 0x1 &UIC1 0x7 0x4
151 /*SERR*/ 0x2 &UIC1 0x1 0x4
[all …]
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| D | redwood.dts | 67 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
79 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
91 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
125 interrupts = < /*TXEOB*/ 0x6 0x4
126 /*RXEOB*/ 0x7 0x4
127 /*SERR*/ 0x1 0x4
128 /*TXDE*/ 0x2 0x4
129 /*RXDE*/ 0x3 0x4
154 interrupts = <0x6 0x4>;
202 interrupts = <0x0 0x4>;
[all …]
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| /arch/powerpc/boot/dts/fsl/ |
| D | mpc8568mds.dts | 34 0x4 0x0 0xf8008000 0x00008000
132 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */
133 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */
134 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */
135 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */
136 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */
137 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */
138 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */
139 0x4 0x14 0x1 0x0 0x2 0x0 /* TxD7 */
140 0x4 0xf 0x2 0x0 0x2 0x0 /* RxD0 */
[all …]
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| /arch/arm64/boot/dts/apm/ |
| D | apm-storm.dtsi | 264 csr-offset = <0x4>;
278 csr-offset = <0x4>;
292 csr-offset = <0x4>;
305 csr-offset = <0x4>;
318 csr-offset = <0x4>;
331 csr-offset = <0x4>;
427 interrupts = < 0x0 0x10 0x4
428 0x0 0x11 0x4
429 0x0 0x12 0x4
430 0x0 0x13 0x4
[all …]
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| /arch/h8300/boot/compressed/ |
| D | vmlinux.lds | 17 . = ALIGN(0x4) ;
21 . = ALIGN(0x4) ;
26 . = ALIGN(0x4) ;
31 . = ALIGN(0x4) ;
|