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Searched refs:B (Results 1 – 25 of 112) sorted by relevance

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/drivers/gpu/drm/i915/selftests/
Di915_sw_fence.c97 struct i915_sw_fence *A, *B, *C; in test_dag() local
113 B = alloc_fence(); in test_dag()
114 if (!B) { in test_dag()
119 i915_sw_fence_await_sw_fence_gfp(A, B, GFP_KERNEL); in test_dag()
120 if (i915_sw_fence_await_sw_fence_gfp(B, A, GFP_KERNEL) != -EINVAL) { in test_dag()
131 if (i915_sw_fence_await_sw_fence_gfp(B, C, GFP_KERNEL) == -EINVAL) { in test_dag()
135 if (i915_sw_fence_await_sw_fence_gfp(C, B, GFP_KERNEL) != -EINVAL) { in test_dag()
149 i915_sw_fence_commit(B); in test_dag()
157 if (!i915_sw_fence_done(B)) { in test_dag()
168 free_fence(B); in test_dag()
[all …]
/drivers/macintosh/
Dvia-cuda.c37 #define B 0 /* B-side data */ macro
108 out_8(&via[B], in_8(&via[B]) | TIP); in assert_TIP()
110 out_8(&via[B], in_8(&via[B]) & ~TIP); in assert_TIP()
117 out_8(&via[B], in_8(&via[B]) | TIP | TACK); in assert_TIP_and_TACK()
119 out_8(&via[B], in_8(&via[B]) & ~(TIP | TACK)); in assert_TIP_and_TACK()
126 out_8(&via[B], in_8(&via[B]) | TACK); in assert_TACK()
128 out_8(&via[B], in_8(&via[B]) & ~TACK); in assert_TACK()
133 out_8(&via[B], in_8(&via[B]) ^ TACK); in toggle_TACK()
140 out_8(&via[B], in_8(&via[B]) & ~TACK); in negate_TACK()
142 out_8(&via[B], in_8(&via[B]) | TACK); in negate_TACK()
[all …]
Dvia-macii.c43 #define B 0 /* B-side data */ macro
181 via[B] |= ST_IDLE; in macii_init_via()
182 last_status = via[B] & (ST_MASK|CTLR_IRQ); in macii_init_via()
365 via[B] = (via[B] & ~ST_MASK) | ST_CMD; in macii_start()
404 status = via[B] & (ST_MASK|CTLR_IRQ); in macii_interrupt()
431 via[B] = (via[B] & ~ST_MASK) | ST_EVEN; in macii_interrupt()
459 via[B] = (via[B] & ~ST_MASK) | ST_IDLE; in macii_interrupt()
464 if ( (via[B] & ST_MASK) == ST_CMD ) { in macii_interrupt()
466 via[B] = (via[B] & ~ST_MASK) | ST_EVEN; in macii_interrupt()
469 via[B] ^= ST_MASK; in macii_interrupt()
[all …]
Dvia-pmu68k.c49 #define B 0 /* B-side data */ macro
195 via2[B] |= TREQ; /* negate TREQ */ in pmu_init()
514 via2[B] &= ~TREQ; /* assert TREQ */ in send_byte()
524 via2[B] &= ~TREQ; in recv_byte()
577 irq, pmu_state, (uint) via1[ACR], (uint) via2[B], data_index, data_len, adb_int_pending); in pmu_interrupt()
583 if (via2[B] & TACK) { in pmu_interrupt()
584 printk(KERN_DEBUG "PMU: SR_INT but ack still high! (%x)\n", via2[B]); in pmu_interrupt()
591 via2[B] |= TREQ; in pmu_interrupt()
593 while (!(via2[B] & TACK)) { in pmu_interrupt()
683 pmu_state, (uint) via1[ACR], (uint) via2[B], data_index, data_len, adb_int_pending); in pmu_interrupt()
Dvia-pmu.c83 #define B 0 /* B-side data */ macro
536 out_8(&via[B], in_8(&via[B]) | TREQ); in init_pmu()
1177 while ((in_8(&via[B]) & TACK) == 0) { in wait_for_ack()
1195 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */ in send_byte()
1196 (void)in_8(&v[B]); in send_byte()
1206 out_8(&v[B], in_8(&v[B]) & ~TREQ); in recv_byte()
1207 (void)in_8(&v[B]); in recv_byte()
1459 if (in_8(&via[B]) & TREQ) { in pmu_sr_intr()
1460 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via[B])); in pmu_sr_intr()
1465 while ((in_8(&via[B]) & TACK) != 0) in pmu_sr_intr()
[all …]
/drivers/staging/ks7010/
Dmichael_mic.c20 #define getUInt32(A, B) ((uint32_t)(A[B + 0] << 0) \ argument
21 + (A[B + 1] << 8) + (A[B + 2] << 16) + (A[B + 3] << 24))
24 #define putUInt32(A, B, C) \ argument
26 A[B + 0] = (uint8_t)(C & 0xff); \
27 A[B + 1] = (uint8_t)((C >> 8) & 0xff); \
28 A[B + 2] = (uint8_t)((C >> 16) & 0xff); \
29 A[B + 3] = (uint8_t)((C >> 24) & 0xff); \
/drivers/pinctrl/sunxi/
Dpinctrl-sun5i.c153 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
157 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
161 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
169 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
174 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
179 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 5),
185 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 6),
191 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 7),
197 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 8),
203 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 9),
[all …]
Dpinctrl-sun8i-v3s.c28 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
33 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
38 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
48 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
53 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
58 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
63 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
68 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
74 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
Dpinctrl-sun4i-a10.c192 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
198 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
202 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
210 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
225 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
229 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
244 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
253 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
262 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
271 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
[all …]
Dpinctrl-sun8i-a83t.c25 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
31 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
37 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
49 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
55 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
61 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
67 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
73 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
79 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
[all …]
Dpinctrl-sun50i-a64.c24 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
30 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
37 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
44 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
59 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
66 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
73 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
80 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
85 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
Dpinctrl-sun8i-a33.c25 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
31 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
37 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
42 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
47 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
53 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
59 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
65 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
Dpinctrl-sun8i-a23.c71 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
76 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
81 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
86 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
91 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
96 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
101 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
106 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
/drivers/gpu/drm/amd/powerplay/hwmgr/
Dppevvmath.h60 static fInt fSubtract (fInt A, fInt B); /* Returns A-B - Sometimes easier than Ad…
62 static fInt fDivide (fInt A, fInt B); /* Returns A/B */
71 static bool GreaterThan(fInt A, fInt B); /* Returns true if A > B */
316 static bool Equal(fInt A, fInt B) in Equal() argument
318 if (A.full == B.full) in Equal()
324 static bool GreaterThan(fInt A, fInt B) in GreaterThan() argument
326 if (A.full > B.full) in GreaterThan()
453 static void SolveQuadracticEqn(fInt A, fInt B, fInt C, fInt Roots[]) in SolveQuadracticEqn() argument
462 …while(GreaterThan(A, f_CONSTANT100) || GreaterThan(B, f_CONSTANT100) || GreaterThan(C, f_CONSTANT1… in SolveQuadracticEqn()
464 B = fDivide(B, f_CONSTANT10); in SolveQuadracticEqn()
[all …]
/drivers/gpu/drm/i915/
Di915_utils.h47 #define add_overflows(A, B) \ argument
48 __builtin_add_overflow_p((A), (B), (typeof((A) + (B)))0)
50 #define add_overflows(A, B) ({ \ argument
52 typeof(B) b = (B); \
Di915_cmd_parser.c204 #define B CMD_DESC_BITMASK macro
219 CMD( MI_STORE_REGISTER_MEM, SMI, F, 3, W | B,
226 CMD( MI_LOAD_REGISTER_MEM, SMI, F, 3, W | B,
250 CMD( MI_STORE_DWORD_IMM, SMI, !F, 0x3F, B,
257 CMD( MI_CLFLUSH, SMI, !F, 0x3FF, B,
263 CMD( MI_REPORT_PERF_COUNT, SMI, !F, 0x3F, B,
269 CMD( MI_CONDITIONAL_BATCH_BUFFER_END, SMI, !F, 0xFF, B,
277 CMD( MEDIA_VFE_STATE, S3D, !F, 0xFFFF, B,
286 CMD( GFX_OP_PIPE_CONTROL(5), S3D, !F, 0xFF, B,
328 CMD( MI_STORE_DWORD_IMM, SMI, !F, 0xFF, B,
[all …]
/drivers/edac/
Dpnd2_edac.c759 #define B(n) (0x20 | (n)) /* bank */ macro
788 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
798 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
808 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
818 C(2), C(3), C(4), C(5), C(6), B(0), B(1), B(2), R(0),
828 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
838 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
848 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
858 C(2), C(3), C(4), C(5), C(6), C(7), B(0), B(1), B(2),
868 C(2), C(3), C(4), C(5), C(6), C(7), C(8), B(0), B(1),
[all …]
/drivers/staging/unisys/include/
Dchannel.h24 #define SIGNATURE_16(A, B) ((A) | ((B) << 8)) argument
25 #define SIGNATURE_32(A, B, C, D) \ argument
26 (SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16))
/drivers/net/ethernet/sfc/falcon/
Dnic.c189 #define REGISTER_AB(name) REGISTER(name, F, A, B)
191 #define REGISTER_BB(name) REGISTER(name, F, B, B)
192 #define REGISTER_BZ(name) REGISTER(name, F, B, Z)
322 #define REGISTER_TABLE_BB(name) REGISTER_TABLE(name, F, B, B)
323 #define REGISTER_TABLE_BZ(name) REGISTER_TABLE(name, F, B, Z)
325 REGISTER_TABLE_DIMENSIONS(name, FR_BZ_ ## name, F, B, B, \
351 F, B, Z, 8, 1024),
/drivers/net/ethernet/sfc/
Dnic.c190 #define REGISTER_AB(name) REGISTER(name, F, A, B)
192 #define REGISTER_BB(name) REGISTER(name, F, B, B)
193 #define REGISTER_BZ(name) REGISTER(name, F, B, Z)
327 #define REGISTER_TABLE_BB(name) REGISTER_TABLE(name, F, B, B)
328 #define REGISTER_TABLE_BZ(name) REGISTER_TABLE(name, F, B, Z)
330 REGISTER_TABLE_DIMENSIONS(name, FR_BZ_ ## name, F, B, B, \
357 F, B, Z, 8, 1024),
/drivers/isdn/hardware/avm/
DKconfig31 tristate "AVM T1/T1-B ISA support"
35 Note: This is a PRI card and handle 30 B-channels.
51 tristate "AVM T1/T1-B PCI support"
55 Note: This is a PRI card and handle 30 B-channels.
/drivers/block/paride/
DTransition-notes6 one in ps_set_intr() (A) and two in ps_tq_int() (B and C).
8 anything except B, since it is under if (!ps_tq_active) under
9 ps_spinlock. C is always preceded by B, since we can't reach it
10 other than through B and we don't drop ps_spinlock between them.
11 IOW, the sequence is A?(BA|BC|B)*. OTOH, number of B can not exceed
14 A and each B is preceded by either A or C. Moments when we enter
15 ps_tq_int() are sandwiched between {A,C} and B in that sequence,
16 since at any time number of B can not exceed the number of these
20 B resets ps_tq_active)*.
/drivers/mfd/
Dtps80031.c99 [TPS80031_INT_WATCHDOG] = TPS80031_IRQ(B, 0),
100 [TPS80031_INT_BAT] = TPS80031_IRQ(B, 1),
101 [TPS80031_INT_SIM] = TPS80031_IRQ(B, 2),
102 [TPS80031_INT_MMC] = TPS80031_IRQ(B, 3),
103 [TPS80031_INT_RES] = TPS80031_IRQ(B, 4),
104 [TPS80031_INT_GPADC_RT] = TPS80031_IRQ(B, 5),
105 [TPS80031_INT_GPADC_SW2_EOC] = TPS80031_IRQ(B, 6),
106 [TPS80031_INT_CC_AUTOCAL] = TPS80031_IRQ(B, 7),
/drivers/staging/rtl8723bs/hal/
Dodm_HWConfig.c466 READ_AND_CONFIG(8723B, _RadioA); in ODM_ConfigRFWithHeaderFile()
468 READ_AND_CONFIG(8723B, _TXPWR_LMT); in ODM_ConfigRFWithHeaderFile()
482 READ_AND_CONFIG(8723B, _TxPowerTrack_SDIO); in ODM_ConfigRFWithTxPwrTrackHeaderFile()
498 READ_AND_CONFIG(8723B, _PHY_REG); in ODM_ConfigBBWithHeaderFile()
500 READ_AND_CONFIG(8723B, _AGC_TAB); in ODM_ConfigBBWithHeaderFile()
502 READ_AND_CONFIG(8723B, _PHY_REG_PG); in ODM_ConfigBBWithHeaderFile()
532 READ_AND_CONFIG(8723B, _MAC_REG); in ODM_ConfigMACWithHeaderFile()
/drivers/staging/greybus/Documentation/
Dsysfs-bus-greybus169 What: /sys/bus/greybus/devices/N-M.I.B
174 A bundle B on the Interface I, B is replaced by a 1-byte
177 What: /sys/bus/greybus/devices/N-M.I.B/bundle_class
182 The greybus class of the bundle B.
184 What: /sys/bus/greybus/devices/N-M.I.B/bundle_id
189 The interface-unique id of the bundle B.
191 What: /sys/bus/greybus/devices/N-M.I.B/gpbX
196 The General Purpose Bridged PHY device of the bundle B,
199 What: /sys/bus/greybus/devices/N-M.I.B/state

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