1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 ******************************************************************************/
15
16 #include "odm_precomp.h"
17
18 #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))
19 #define READ_AND_CONFIG READ_AND_CONFIG_MP
20 #define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt())
21 #define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic, txt):GET_VERSION_TC(ic, txt))
22
odm_QueryRxPwrPercentage(s8 AntPower)23 static u8 odm_QueryRxPwrPercentage(s8 AntPower)
24 {
25 if ((AntPower <= -100) || (AntPower >= 20))
26 return 0;
27 else if (AntPower >= 0)
28 return 100;
29 else
30 return (100+AntPower);
31
32 }
33
odm_SignalScaleMapping_92CSeries(PDM_ODM_T pDM_Odm,s32 CurrSig)34 static s32 odm_SignalScaleMapping_92CSeries(PDM_ODM_T pDM_Odm, s32 CurrSig)
35 {
36 s32 RetSig = 0;
37
38 if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) {
39 if (CurrSig >= 51 && CurrSig <= 100)
40 RetSig = 100;
41 else if (CurrSig >= 41 && CurrSig <= 50)
42 RetSig = 80 + ((CurrSig - 40)*2);
43 else if (CurrSig >= 31 && CurrSig <= 40)
44 RetSig = 66 + (CurrSig - 30);
45 else if (CurrSig >= 21 && CurrSig <= 30)
46 RetSig = 54 + (CurrSig - 20);
47 else if (CurrSig >= 10 && CurrSig <= 20)
48 RetSig = 42 + (((CurrSig - 10) * 2) / 3);
49 else if (CurrSig >= 5 && CurrSig <= 9)
50 RetSig = 22 + (((CurrSig - 5) * 3) / 2);
51 else if (CurrSig >= 1 && CurrSig <= 4)
52 RetSig = 6 + (((CurrSig - 1) * 3) / 2);
53 else
54 RetSig = CurrSig;
55 }
56
57 return RetSig;
58 }
59
odm_SignalScaleMapping(PDM_ODM_T pDM_Odm,s32 CurrSig)60 s32 odm_SignalScaleMapping(PDM_ODM_T pDM_Odm, s32 CurrSig)
61 {
62 return odm_SignalScaleMapping_92CSeries(pDM_Odm, CurrSig);
63 }
64
odm_EVMdbToPercentage(s8 Value)65 static u8 odm_EVMdbToPercentage(s8 Value)
66 {
67 /* */
68 /* -33dB~0dB to 0%~99% */
69 /* */
70 s8 ret_val;
71
72 ret_val = Value;
73 ret_val /= 2;
74
75 /* DbgPrint("Value =%d\n", Value); */
76 /* ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value =%d / %x\n", ret_val, ret_val)); */
77
78 if (ret_val >= 0)
79 ret_val = 0;
80 if (ret_val <= -33)
81 ret_val = -33;
82
83 ret_val = 0 - ret_val;
84 ret_val *= 3;
85
86 if (ret_val == 99)
87 ret_val = 100;
88
89 return ret_val;
90 }
91
odm_RxPhyStatus92CSeries_Parsing(PDM_ODM_T pDM_Odm,PODM_PHY_INFO_T pPhyInfo,u8 * pPhyStatus,PODM_PACKET_INFO_T pPktinfo)92 static void odm_RxPhyStatus92CSeries_Parsing(
93 PDM_ODM_T pDM_Odm,
94 PODM_PHY_INFO_T pPhyInfo,
95 u8 *pPhyStatus,
96 PODM_PACKET_INFO_T pPktinfo
97 )
98 {
99 u8 i, Max_spatial_stream;
100 s8 rx_pwr[4], rx_pwr_all = 0;
101 u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
102 u8 RSSI, total_rssi = 0;
103 bool isCCKrate = false;
104 u8 rf_rx_num = 0;
105 u8 cck_highpwr = 0;
106 u8 LNA_idx, VGA_idx;
107 PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;
108
109 isCCKrate = (pPktinfo->DataRate <= DESC_RATE11M) ? true : false;
110 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
111 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
112
113
114 if (isCCKrate) {
115 u8 cck_agc_rpt;
116
117 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;
118 /* */
119 /* (1)Hardware does not provide RSSI for CCK */
120 /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
121 /* */
122
123 /* if (pHalData->eRFPowerState == eRfOn) */
124 cck_highpwr = pDM_Odm->bCckHighPower;
125 /* else */
126 /* cck_highpwr = false; */
127
128 cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
129
130 /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
131 /* The RSSI formula should be modified according to the gain table */
132 /* In 88E, cck_highpwr is always set to 1 */
133 LNA_idx = ((cck_agc_rpt & 0xE0)>>5);
134 VGA_idx = (cck_agc_rpt & 0x1F);
135 rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx, VGA_idx);
136 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
137 if (PWDB_ALL > 100)
138 PWDB_ALL = 100;
139
140 pPhyInfo->RxPWDBAll = PWDB_ALL;
141 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
142 pPhyInfo->RecvSignalPower = rx_pwr_all;
143 /* */
144 /* (3) Get Signal Quality (EVM) */
145 /* */
146 /* if (pPktinfo->bPacketMatchBSSID) */
147 {
148 u8 SQ, SQ_rpt;
149
150 if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest)
151 SQ = 100;
152 else {
153 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
154
155 if (SQ_rpt > 64)
156 SQ = 0;
157 else if (SQ_rpt < 20)
158 SQ = 100;
159 else
160 SQ = ((64-SQ_rpt) * 100) / 44;
161
162 }
163
164 /* DbgPrint("cck SQ = %d\n", SQ); */
165 pPhyInfo->SignalQuality = SQ;
166 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;
167 pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
168 }
169 } else { /* is OFDM rate */
170 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
171
172 /* */
173 /* (1)Get RSSI for HT rate */
174 /* */
175
176 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
177 /* 2008/01/30 MH we will judge RF RX path now. */
178 if (pDM_Odm->RFPathRxEnable & BIT(i))
179 rf_rx_num++;
180 /* else */
181 /* continue; */
182
183 rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain&0x3F)*2) - 110;
184
185
186 pPhyInfo->RxPwr[i] = rx_pwr[i];
187
188 /* Translate DBM to percentage. */
189 RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
190 total_rssi += RSSI;
191 /* RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR =%x RSSI =%d\n", i, rx_pwr[i], RSSI)); */
192
193 pPhyInfo->RxMIMOSignalStrength[i] = (u8) RSSI;
194
195 /* Get Rx snr value in DB */
196 pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
197 }
198
199
200 /* */
201 /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
202 /* */
203 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1)&0x7f)-110;
204
205 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
206 /* RT_DISP(FRX, RX_PHY_SS, ("PWDB_ALL =%d\n", PWDB_ALL)); */
207
208 pPhyInfo->RxPWDBAll = PWDB_ALL;
209 /* ODM_RT_TRACE(pDM_Odm, ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI =%d\n", pPhyInfo->RxPWDBAll)); */
210 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
211 pPhyInfo->RxPower = rx_pwr_all;
212 pPhyInfo->RecvSignalPower = rx_pwr_all;
213
214 {/* pMgntInfo->CustomerID != RT_CID_819x_Lenovo */
215 /* */
216 /* (3)EVM of HT rate */
217 /* */
218 if (pPktinfo->DataRate >= DESC_RATEMCS8 && pPktinfo->DataRate <= DESC_RATEMCS15)
219 Max_spatial_stream = 2; /* both spatial stream make sense */
220 else
221 Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
222
223 for (i = 0; i < Max_spatial_stream; i++) {
224 /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
225 /* fill most significant bit to "zero" when doing shifting operation which may change a negative */
226 /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
227 EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
228
229 /* RT_DISP(FRX, RX_PHY_SQ, ("RXRATE =%x RXEVM =%x EVM =%s%d\n", */
230 /* GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); */
231
232 /* if (pPktinfo->bPacketMatchBSSID) */
233 {
234 if (i == ODM_RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
235 pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
236
237 pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
238 }
239 }
240 }
241
242 ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail);
243
244 }
245
246 /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
247 /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
248 if (isCCKrate) {
249 #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING
250 pPhyInfo->SignalStrength = (u8)PWDB_ALL;
251 #else
252 pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/* PWDB_ALL; */
253 #endif
254 } else {
255 if (rf_rx_num != 0) {
256 #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING
257 total_rssi /= rf_rx_num;
258 pPhyInfo->SignalStrength = (u8)total_rssi;
259 #else
260 pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(pDM_Odm, total_rssi /= rf_rx_num));
261 #endif
262 }
263 }
264
265 /* DbgPrint("isCCKrate = %d, pPhyInfo->RxPWDBAll = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", */
266 /* isCCKrate, pPhyInfo->RxPWDBAll, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a); */
267 }
268
odm_Process_RSSIForDM(PDM_ODM_T pDM_Odm,PODM_PHY_INFO_T pPhyInfo,PODM_PACKET_INFO_T pPktinfo)269 static void odm_Process_RSSIForDM(
270 PDM_ODM_T pDM_Odm, PODM_PHY_INFO_T pPhyInfo, PODM_PACKET_INFO_T pPktinfo
271 )
272 {
273
274 s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;
275 u8 isCCKrate = 0;
276 u8 RSSI_max, RSSI_min, i;
277 u32 OFDM_pkt = 0;
278 u32 Weighting = 0;
279 PSTA_INFO_T pEntry;
280
281
282 if (pPktinfo->StationID == 0xFF)
283 return;
284
285 pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID];
286
287 if (!IS_STA_VALID(pEntry))
288 return;
289
290 if ((!pPktinfo->bPacketMatchBSSID))
291 return;
292
293 if (pPktinfo->bPacketBeacon)
294 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;
295
296 isCCKrate = ((pPktinfo->DataRate <= DESC_RATE11M)) ? true : false;
297 pDM_Odm->RxRate = pPktinfo->DataRate;
298
299 /* Statistic for antenna/path diversity------------------ */
300 if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) {
301
302 }
303
304 /* Smart Antenna Debug Message------------------ */
305
306 UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
307 UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
308 UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
309
310 if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
311
312 if (!isCCKrate) { /* ofdm rate */
313 if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) {
314 RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
315 pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
316 pDM_Odm->RSSI_B = 0;
317 } else {
318 /* DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d\n", */
319 /* pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]); */
320 pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
321 pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
322
323 if (
324 pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] >
325 pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]
326 ) {
327 RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
328 RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
329 } else {
330 RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
331 RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
332 }
333
334 if ((RSSI_max-RSSI_min) < 3)
335 RSSI_Ave = RSSI_max;
336 else if ((RSSI_max-RSSI_min) < 6)
337 RSSI_Ave = RSSI_max - 1;
338 else if ((RSSI_max-RSSI_min) < 10)
339 RSSI_Ave = RSSI_max - 2;
340 else
341 RSSI_Ave = RSSI_max - 3;
342 }
343
344 /* 1 Process OFDM RSSI */
345 if (UndecoratedSmoothedOFDM <= 0) /* initialize */
346 UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
347 else {
348 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
349 UndecoratedSmoothedOFDM =
350 ((UndecoratedSmoothedOFDM*(Rx_Smooth_Factor-1)) +
351 RSSI_Ave)/Rx_Smooth_Factor;
352 UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
353 } else {
354 UndecoratedSmoothedOFDM =
355 ((UndecoratedSmoothedOFDM*(Rx_Smooth_Factor-1)) +
356 RSSI_Ave)/Rx_Smooth_Factor;
357 }
358 }
359
360 pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;
361
362 } else {
363 RSSI_Ave = pPhyInfo->RxPWDBAll;
364 pDM_Odm->RSSI_A = (u8) pPhyInfo->RxPWDBAll;
365 pDM_Odm->RSSI_B = 0;
366
367 /* 1 Process CCK RSSI */
368 if (UndecoratedSmoothedCCK <= 0) /* initialize */
369 UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
370 else {
371 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
372 UndecoratedSmoothedCCK =
373 ((UndecoratedSmoothedCCK*(Rx_Smooth_Factor-1)) +
374 pPhyInfo->RxPWDBAll)/Rx_Smooth_Factor;
375 UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
376 } else {
377 UndecoratedSmoothedCCK =
378 ((UndecoratedSmoothedCCK*(Rx_Smooth_Factor-1)) +
379 pPhyInfo->RxPWDBAll)/Rx_Smooth_Factor;
380 }
381 }
382 pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
383 }
384
385 /* if (pEntry) */
386 {
387 /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
388 if (pEntry->rssi_stat.ValidBit >= 64)
389 pEntry->rssi_stat.ValidBit = 64;
390 else
391 pEntry->rssi_stat.ValidBit++;
392
393 for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
394 OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
395
396 if (pEntry->rssi_stat.ValidBit == 64) {
397 Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4);
398 UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
399 } else {
400 if (pEntry->rssi_stat.ValidBit != 0)
401 UndecoratedSmoothedPWDB = (OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
402 else
403 UndecoratedSmoothedPWDB = 0;
404 }
405
406 pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
407 pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
408 pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
409
410 /* DbgPrint("OFDM_pkt =%d, Weighting =%d\n", OFDM_pkt, Weighting); */
411 /* DbgPrint("UndecoratedSmoothedOFDM =%d, UndecoratedSmoothedPWDB =%d, UndecoratedSmoothedCCK =%d\n", */
412 /* UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK); */
413
414 }
415
416 }
417 }
418
419
420 /* */
421 /* Endianness before calling this API */
422 /* */
ODM_PhyStatusQuery_92CSeries(PDM_ODM_T pDM_Odm,PODM_PHY_INFO_T pPhyInfo,u8 * pPhyStatus,PODM_PACKET_INFO_T pPktinfo)423 static void ODM_PhyStatusQuery_92CSeries(
424 PDM_ODM_T pDM_Odm,
425 PODM_PHY_INFO_T pPhyInfo,
426 u8 *pPhyStatus,
427 PODM_PACKET_INFO_T pPktinfo
428 )
429 {
430
431 odm_RxPhyStatus92CSeries_Parsing(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);
432
433 if (!pDM_Odm->RSSI_test)
434 odm_Process_RSSIForDM(pDM_Odm, pPhyInfo, pPktinfo);
435 }
436
ODM_PhyStatusQuery(PDM_ODM_T pDM_Odm,PODM_PHY_INFO_T pPhyInfo,u8 * pPhyStatus,PODM_PACKET_INFO_T pPktinfo)437 void ODM_PhyStatusQuery(
438 PDM_ODM_T pDM_Odm,
439 PODM_PHY_INFO_T pPhyInfo,
440 u8 *pPhyStatus,
441 PODM_PACKET_INFO_T pPktinfo
442 )
443 {
444
445 ODM_PhyStatusQuery_92CSeries(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);
446 }
447
448 /* */
449 /* If you want to add a new IC, Please follow below template and generate a new one. */
450 /* */
451 /* */
452
ODM_ConfigRFWithHeaderFile(PDM_ODM_T pDM_Odm,ODM_RF_Config_Type ConfigType,ODM_RF_RADIO_PATH_E eRFPath)453 HAL_STATUS ODM_ConfigRFWithHeaderFile(
454 PDM_ODM_T pDM_Odm,
455 ODM_RF_Config_Type ConfigType,
456 ODM_RF_RADIO_PATH_E eRFPath
457 )
458 {
459 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
460 ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
461 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
462 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
463 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
464
465 if (ConfigType == CONFIG_RF_RADIO)
466 READ_AND_CONFIG(8723B, _RadioA);
467 else if (ConfigType == CONFIG_RF_TXPWR_LMT)
468 READ_AND_CONFIG(8723B, _TXPWR_LMT);
469
470 return HAL_STATUS_SUCCESS;
471 }
472
ODM_ConfigRFWithTxPwrTrackHeaderFile(PDM_ODM_T pDM_Odm)473 HAL_STATUS ODM_ConfigRFWithTxPwrTrackHeaderFile(PDM_ODM_T pDM_Odm)
474 {
475 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
476 ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
477 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
478 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
479 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
480
481 if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)
482 READ_AND_CONFIG(8723B, _TxPowerTrack_SDIO);
483
484 return HAL_STATUS_SUCCESS;
485 }
486
ODM_ConfigBBWithHeaderFile(PDM_ODM_T pDM_Odm,ODM_BB_Config_Type ConfigType)487 HAL_STATUS ODM_ConfigBBWithHeaderFile(
488 PDM_ODM_T pDM_Odm, ODM_BB_Config_Type ConfigType
489 )
490 {
491 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
492 ("===>ODM_ConfigBBWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
493 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
494 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
495 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
496
497 if (ConfigType == CONFIG_BB_PHY_REG)
498 READ_AND_CONFIG(8723B, _PHY_REG);
499 else if (ConfigType == CONFIG_BB_AGC_TAB)
500 READ_AND_CONFIG(8723B, _AGC_TAB);
501 else if (ConfigType == CONFIG_BB_PHY_REG_PG)
502 READ_AND_CONFIG(8723B, _PHY_REG_PG);
503
504 return HAL_STATUS_SUCCESS;
505 }
506
ODM_ConfigMACWithHeaderFile(PDM_ODM_T pDM_Odm)507 HAL_STATUS ODM_ConfigMACWithHeaderFile(PDM_ODM_T pDM_Odm)
508 {
509 u8 result = HAL_STATUS_SUCCESS;
510
511 ODM_RT_TRACE(
512 pDM_Odm,
513 ODM_COMP_INIT,
514 ODM_DBG_LOUD,
515 (
516 "===>ODM_ConfigMACWithHeaderFile (%s)\n",
517 (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"
518 )
519 );
520 ODM_RT_TRACE(
521 pDM_Odm,
522 ODM_COMP_INIT,
523 ODM_DBG_LOUD,
524 (
525 "pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
526 pDM_Odm->SupportPlatform,
527 pDM_Odm->SupportInterface,
528 pDM_Odm->BoardType
529 )
530 );
531
532 READ_AND_CONFIG(8723B, _MAC_REG);
533
534 return result;
535 }
536