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Searched refs:PACKET3_CONTEXT_CONTROL (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dsi_enums.h173 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsoc15d.h76 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dvid.h131 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dcikd.h251 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsid.h1687 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dgfx_v7_0.c2297 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_ring_emit_cntxcntl()
2520 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_cp_gfx_start()
4089 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_get_csb_buffer()
Dgfx_v9_0.c612 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_get_csb_buffer()
2159 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_cp_gfx_start()
3775 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_ring_emit_cntxcntl()
Dgfx_v6_0.c2945 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_0_get_csb_buffer()
3052 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_ring_emit_cntxcntl()
Dgfx_v8_0.c1142 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_get_csb_buffer()
4226 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_cp_gfx_start()
6402 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_ring_emit_cntxcntl()
/drivers/gpu/drm/radeon/
Dnid.h1179 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsid.h1624 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dcikd.h1719 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Devergreen_cs.c1827 case PACKET3_CONTEXT_CONTROL: in evergreen_packet3_check()
3377 case PACKET3_CONTEXT_CONTROL: in evergreen_vm_packet3_check()
Devergreend.h1564 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dsi.c4553 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_gfx_check()
4666 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_compute_check()
5725 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in si_get_csb_buffer()
Dr600d.h1600 #define PACKET3_CONTEXT_CONTROL 0x28 macro
Dr600_cs.c1688 case PACKET3_CONTEXT_CONTROL: in r600_packet3_check()
Dcik.c4024 radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_cp_gfx_start()
6771 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_get_csb_buffer()