| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_encoders.c | 148 struct drm_display_mode *adjusted_mode) in amdgpu_panel_mode_fixup() argument
159 adjusted_mode->clock = native_mode->clock; in amdgpu_panel_mode_fixup()
160 adjusted_mode->flags = native_mode->flags; in amdgpu_panel_mode_fixup()
162 adjusted_mode->hdisplay = native_mode->hdisplay; in amdgpu_panel_mode_fixup()
163 adjusted_mode->vdisplay = native_mode->vdisplay; in amdgpu_panel_mode_fixup()
165 adjusted_mode->htotal = native_mode->hdisplay + hblank; in amdgpu_panel_mode_fixup()
166 adjusted_mode->hsync_start = native_mode->hdisplay + hover; in amdgpu_panel_mode_fixup()
167 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; in amdgpu_panel_mode_fixup()
169 adjusted_mode->vtotal = native_mode->vdisplay + vblank; in amdgpu_panel_mode_fixup()
170 adjusted_mode->vsync_start = native_mode->vdisplay + vover; in amdgpu_panel_mode_fixup()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_encoders.c | 320 struct drm_display_mode *adjusted_mode) in radeon_panel_mode_fixup() argument
333 adjusted_mode->clock = native_mode->clock; in radeon_panel_mode_fixup()
334 adjusted_mode->flags = native_mode->flags; in radeon_panel_mode_fixup()
337 adjusted_mode->hdisplay = native_mode->hdisplay; in radeon_panel_mode_fixup()
338 adjusted_mode->vdisplay = native_mode->vdisplay; in radeon_panel_mode_fixup()
341 adjusted_mode->htotal = native_mode->hdisplay + hblank; in radeon_panel_mode_fixup()
342 adjusted_mode->hsync_start = native_mode->hdisplay + hover; in radeon_panel_mode_fixup()
343 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; in radeon_panel_mode_fixup()
345 adjusted_mode->vtotal = native_mode->vdisplay + vblank; in radeon_panel_mode_fixup()
346 adjusted_mode->vsync_start = native_mode->vdisplay + vover; in radeon_panel_mode_fixup()
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| /drivers/gpu/drm/gma500/ |
| D | mdfld_intel_display.c | 668 struct drm_display_mode *adjusted_mode, in mdfld_crtc_mode_set() argument
698 android_hdmi_crtc_mode_set(crtc, mode, adjusted_mode, in mdfld_crtc_mode_set()
709 adjusted_mode->hdisplay); in mdfld_crtc_mode_set()
711 adjusted_mode->vdisplay); in mdfld_crtc_mode_set()
713 adjusted_mode->hsync_start); in mdfld_crtc_mode_set()
715 adjusted_mode->hsync_end); in mdfld_crtc_mode_set()
717 adjusted_mode->htotal); in mdfld_crtc_mode_set()
719 adjusted_mode->vsync_start); in mdfld_crtc_mode_set()
721 adjusted_mode->vsync_end); in mdfld_crtc_mode_set()
723 adjusted_mode->vtotal); in mdfld_crtc_mode_set()
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| D | oaktrail_crtc.c | 368 struct drm_display_mode *adjusted_mode, in oaktrail_crtc_mode_set() argument
392 return oaktrail_crtc_hdmi_mode_set(crtc, mode, adjusted_mode, x, y, old_fb); in oaktrail_crtc_mode_set()
401 adjusted_mode, in oaktrail_crtc_mode_set()
446 offsetX = (adjusted_mode->crtc_hdisplay - in oaktrail_crtc_mode_set()
448 offsetY = (adjusted_mode->crtc_vdisplay - in oaktrail_crtc_mode_set()
453 ((adjusted_mode->crtc_htotal - 1) << 16), i); in oaktrail_crtc_mode_set()
455 ((adjusted_mode->crtc_vtotal - 1) << 16), i); in oaktrail_crtc_mode_set()
457 (adjusted_mode->crtc_hblank_start - offsetX - 1) | in oaktrail_crtc_mode_set()
458 ((adjusted_mode->crtc_hblank_end - offsetX - 1) << 16), i); in oaktrail_crtc_mode_set()
460 (adjusted_mode->crtc_hsync_start - offsetX - 1) | in oaktrail_crtc_mode_set()
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| D | oaktrail_hdmi.c | 261 struct drm_display_mode *adjusted_mode, in oaktrail_crtc_hdmi_mode_set() argument
304 oaktrail_hdmi_find_dpll(crtc, adjusted_mode->clock, refclk, &clock); in oaktrail_crtc_hdmi_mode_set()
325 temp = htotal_calculate(adjusted_mode); in oaktrail_crtc_hdmi_mode_set()
327 …REG_WRITE(hblank_reg, (adjusted_mode->crtc_hblank_start - 1) | ((adjusted_mode->crtc_hblank_end - … in oaktrail_crtc_hdmi_mode_set()
328 …REG_WRITE(hsync_reg, (adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1) … in oaktrail_crtc_hdmi_mode_set()
329 REG_WRITE(vtot_reg, (adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << 16)); in oaktrail_crtc_hdmi_mode_set()
330 …REG_WRITE(vblank_reg, (adjusted_mode->crtc_vblank_start - 1) | ((adjusted_mode->crtc_vblank_end - … in oaktrail_crtc_hdmi_mode_set()
331 …REG_WRITE(vsync_reg, (adjusted_mode->crtc_vsync_start - 1) | ((adjusted_mode->crtc_vsync_end - 1) … in oaktrail_crtc_hdmi_mode_set()
334 …REG_WRITE(PCH_HTOTAL_B, (adjusted_mode->crtc_hdisplay - 1) | ((adjusted_mode->crtc_htotal - 1) << … in oaktrail_crtc_hdmi_mode_set()
335 …REG_WRITE(PCH_HBLANK_B, (adjusted_mode->crtc_hblank_start - 1) | ((adjusted_mode->crtc_hblank_end … in oaktrail_crtc_hdmi_mode_set()
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| D | psb_intel_display.c | 104 struct drm_display_mode *adjusted_mode, in psb_intel_crtc_mode_set() argument
153 ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, in psb_intel_crtc_mode_set()
157 adjusted_mode->clock, clock.dot); in psb_intel_crtc_mode_set()
171 adjusted_mode->clock / mode->clock; in psb_intel_crtc_mode_set()
272 REG_WRITE(map->htotal, (adjusted_mode->crtc_hdisplay - 1) | in psb_intel_crtc_mode_set()
273 ((adjusted_mode->crtc_htotal - 1) << 16)); in psb_intel_crtc_mode_set()
274 REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - 1) | in psb_intel_crtc_mode_set()
275 ((adjusted_mode->crtc_hblank_end - 1) << 16)); in psb_intel_crtc_mode_set()
276 REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | in psb_intel_crtc_mode_set()
277 ((adjusted_mode->crtc_hsync_end - 1) << 16)); in psb_intel_crtc_mode_set()
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| D | cdv_intel_lvds.c | 274 struct drm_display_mode *adjusted_mode) in cdv_intel_lvds_mode_fixup() argument
299 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; in cdv_intel_lvds_mode_fixup()
300 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start; in cdv_intel_lvds_mode_fixup()
301 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end; in cdv_intel_lvds_mode_fixup()
302 adjusted_mode->htotal = panel_fixed_mode->htotal; in cdv_intel_lvds_mode_fixup()
303 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay; in cdv_intel_lvds_mode_fixup()
304 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start; in cdv_intel_lvds_mode_fixup()
305 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end; in cdv_intel_lvds_mode_fixup()
306 adjusted_mode->vtotal = panel_fixed_mode->vtotal; in cdv_intel_lvds_mode_fixup()
307 adjusted_mode->clock = panel_fixed_mode->clock; in cdv_intel_lvds_mode_fixup()
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| D | psb_intel_lvds.c | 376 struct drm_display_mode *adjusted_mode) in psb_intel_lvds_mode_fixup() argument
415 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; in psb_intel_lvds_mode_fixup()
416 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start; in psb_intel_lvds_mode_fixup()
417 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end; in psb_intel_lvds_mode_fixup()
418 adjusted_mode->htotal = panel_fixed_mode->htotal; in psb_intel_lvds_mode_fixup()
419 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay; in psb_intel_lvds_mode_fixup()
420 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start; in psb_intel_lvds_mode_fixup()
421 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end; in psb_intel_lvds_mode_fixup()
422 adjusted_mode->vtotal = panel_fixed_mode->vtotal; in psb_intel_lvds_mode_fixup()
423 adjusted_mode->clock = panel_fixed_mode->clock; in psb_intel_lvds_mode_fixup()
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| D | cdv_intel_display.c | 580 struct drm_display_mode *adjusted_mode, in cdv_intel_crtc_mode_set() argument
661 drm_mode_debug_printmodeline(adjusted_mode); in cdv_intel_crtc_mode_set()
665 ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, in cdv_intel_crtc_mode_set()
669 adjusted_mode->clock, clock.dot); in cdv_intel_crtc_mode_set()
682 cdv_intel_dp_set_m_n(crtc, mode, adjusted_mode); in cdv_intel_crtc_mode_set()
793 int sdvo_pixel_multiply = adjusted_mode->clock / mode->clock; in cdv_intel_crtc_mode_set()
797 REG_WRITE(map->htotal, (adjusted_mode->crtc_hdisplay - 1) | in cdv_intel_crtc_mode_set()
798 ((adjusted_mode->crtc_htotal - 1) << 16)); in cdv_intel_crtc_mode_set()
799 REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - 1) | in cdv_intel_crtc_mode_set()
800 ((adjusted_mode->crtc_hblank_end - 1) << 16)); in cdv_intel_crtc_mode_set()
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| D | cdv_intel_dp.c | 876 struct drm_display_mode *adjusted_mode) in cdv_intel_fixed_panel_mode() argument
878 adjusted_mode->hdisplay = fixed_mode->hdisplay; in cdv_intel_fixed_panel_mode()
879 adjusted_mode->hsync_start = fixed_mode->hsync_start; in cdv_intel_fixed_panel_mode()
880 adjusted_mode->hsync_end = fixed_mode->hsync_end; in cdv_intel_fixed_panel_mode()
881 adjusted_mode->htotal = fixed_mode->htotal; in cdv_intel_fixed_panel_mode()
883 adjusted_mode->vdisplay = fixed_mode->vdisplay; in cdv_intel_fixed_panel_mode()
884 adjusted_mode->vsync_start = fixed_mode->vsync_start; in cdv_intel_fixed_panel_mode()
885 adjusted_mode->vsync_end = fixed_mode->vsync_end; in cdv_intel_fixed_panel_mode()
886 adjusted_mode->vtotal = fixed_mode->vtotal; in cdv_intel_fixed_panel_mode()
888 adjusted_mode->clock = fixed_mode->clock; in cdv_intel_fixed_panel_mode()
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| D | oaktrail_lvds.c | 93 struct drm_display_mode *adjusted_mode) in oaktrail_lvds_mode_set() argument
143 if ((mode->vdisplay != adjusted_mode->crtc_vdisplay) || in oaktrail_lvds_mode_set()
144 (mode->hdisplay != adjusted_mode->crtc_hdisplay)) { in oaktrail_lvds_mode_set()
145 if ((adjusted_mode->crtc_hdisplay * mode->vdisplay) == in oaktrail_lvds_mode_set()
146 (mode->hdisplay * adjusted_mode->crtc_vdisplay)) in oaktrail_lvds_mode_set()
148 else if ((adjusted_mode->crtc_hdisplay * in oaktrail_lvds_mode_set()
150 adjusted_mode->crtc_vdisplay)) in oaktrail_lvds_mode_set()
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| /drivers/gpu/drm/i915/ |
| D | intel_dsi.c | 313 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; in intel_dsi_compute_config() local
319 intel_fixed_panel_mode(fixed_mode, adjusted_mode); in intel_dsi_compute_config()
330 adjusted_mode->flags = 0; in intel_dsi_compute_config()
1073 struct drm_display_mode *adjusted_mode = in bxt_dsi_get_pipe_config() local
1074 &pipe_config->base.adjusted_mode; in bxt_dsi_get_pipe_config()
1088 adjusted_mode_sw = &intel_crtc->config->base.adjusted_mode; in bxt_dsi_get_pipe_config()
1106 adjusted_mode->crtc_hdisplay = in bxt_dsi_get_pipe_config()
1108 adjusted_mode->crtc_vdisplay = in bxt_dsi_get_pipe_config()
1110 adjusted_mode->crtc_vtotal = in bxt_dsi_get_pipe_config()
1113 hactive = adjusted_mode->crtc_hdisplay; in bxt_dsi_get_pipe_config()
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| D | intel_panel.c | 42 struct drm_display_mode *adjusted_mode) in intel_fixed_panel_mode() argument
44 drm_mode_copy(adjusted_mode, fixed_mode); in intel_fixed_panel_mode()
46 drm_mode_set_crtcinfo(adjusted_mode, 0); in intel_fixed_panel_mode()
108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; in intel_pch_panel_fitting() local
112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && in intel_pch_panel_fitting()
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h && in intel_pch_panel_fitting()
121 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; in intel_pch_panel_fitting()
122 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; in intel_pch_panel_fitting()
128 u32 scaled_width = adjusted_mode->crtc_hdisplay in intel_pch_panel_fitting()
131 * adjusted_mode->crtc_vdisplay; in intel_pch_panel_fitting()
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| D | intel_audio.c | 177 static u32 audio_config_hdmi_pixel_clock(const struct drm_display_mode *adjusted_mode) in audio_config_hdmi_pixel_clock() argument
182 if (adjusted_mode->crtc_clock == hdmi_audio_clock[i].clock) in audio_config_hdmi_pixel_clock()
188 adjusted_mode->crtc_clock); in audio_config_hdmi_pixel_clock()
199 static int audio_config_hdmi_get_n(const struct drm_display_mode *adjusted_mode, in audio_config_hdmi_get_n() argument
206 adjusted_mode->crtc_clock == hdmi_aud_ncts[i].clock) { in audio_config_hdmi_get_n()
261 const struct drm_display_mode *adjusted_mode) in g4x_audio_codec_enable() argument
300 const struct drm_display_mode *adjusted_mode) in hsw_dp_audio_config_update() argument
344 const struct drm_display_mode *adjusted_mode) in hsw_hdmi_audio_config_update() argument
357 tmp |= audio_config_hdmi_pixel_clock(adjusted_mode); in hsw_hdmi_audio_config_update()
359 n = audio_config_hdmi_get_n(adjusted_mode, rate); in hsw_hdmi_audio_config_update()
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| D | dvo_ns2501.c | 550 const struct drm_display_mode *adjusted_mode) in ns2501_mode_set() argument
575 adjusted_mode->crtc_clock, in ns2501_mode_set()
576 adjusted_mode->crtc_hdisplay, in ns2501_mode_set()
577 adjusted_mode->crtc_hblank_start, in ns2501_mode_set()
578 adjusted_mode->crtc_hblank_end, in ns2501_mode_set()
579 adjusted_mode->crtc_hsync_start, in ns2501_mode_set()
580 adjusted_mode->crtc_hsync_end, in ns2501_mode_set()
581 adjusted_mode->crtc_htotal, in ns2501_mode_set()
582 adjusted_mode->crtc_hskew, in ns2501_mode_set()
583 adjusted_mode->crtc_vdisplay, in ns2501_mode_set()
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| D | intel_dvo.c | 172 pipe_config->base.adjusted_mode.flags |= flags; in intel_dvo_get_config()
174 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
202 &pipe_config->base.adjusted_mode); in intel_enable_dvo()
247 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; in intel_dvo_compute_config() local
255 intel_fixed_panel_mode(fixed_mode, adjusted_mode); in intel_dvo_compute_config()
266 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; in intel_dvo_pre_enable() local
282 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) in intel_dvo_pre_enable()
284 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) in intel_dvo_pre_enable()
291 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | in intel_dvo_pre_enable()
292 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); in intel_dvo_pre_enable()
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| D | intel_crt.c | 122 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder); in intel_crt_get_config()
124 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_crt_get_config()
134 pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC | in hsw_crt_get_config()
138 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder); in hsw_crt_get_config()
140 pipe_config->base.adjusted_mode.crtc_clock = lpt_get_iclkip(dev_priv); in hsw_crt_get_config()
152 const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode; in intel_crt_set_dpms() local
160 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) in intel_crt_set_dpms()
162 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) in intel_crt_set_dpms()
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| /drivers/gpu/drm/ |
| D | drm_bridge.c | 192 struct drm_display_mode *adjusted_mode) in drm_bridge_mode_fixup() argument
200 ret = bridge->funcs->mode_fixup(bridge, mode, adjusted_mode); in drm_bridge_mode_fixup()
202 ret = ret && drm_bridge_mode_fixup(bridge->next, mode, adjusted_mode); in drm_bridge_mode_fixup()
299 struct drm_display_mode *adjusted_mode) in drm_bridge_mode_set() argument
305 bridge->funcs->mode_set(bridge, mode, adjusted_mode); in drm_bridge_mode_set()
307 drm_bridge_mode_set(bridge->next, mode, adjusted_mode); in drm_bridge_mode_set()
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| D | drm_crtc_helper.c | 275 struct drm_display_mode *adjusted_mode, saved_mode, saved_hwmode; in drm_crtc_helper_set_mode() local
290 adjusted_mode = drm_mode_duplicate(dev, mode); in drm_crtc_helper_set_mode()
291 if (!adjusted_mode) { in drm_crtc_helper_set_mode()
322 mode, adjusted_mode); in drm_crtc_helper_set_mode()
331 adjusted_mode))) { in drm_crtc_helper_set_mode()
340 adjusted_mode))) { in drm_crtc_helper_set_mode()
347 crtc->hwmode = *adjusted_mode; in drm_crtc_helper_set_mode()
375 ret = !crtc_funcs->mode_set(crtc, mode, adjusted_mode, x, y, old_fb); in drm_crtc_helper_set_mode()
392 encoder_funcs->mode_set(encoder, mode, adjusted_mode); in drm_crtc_helper_set_mode()
394 drm_bridge_mode_set(encoder->bridge, mode, adjusted_mode); in drm_crtc_helper_set_mode()
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| D | drm_encoder_slave.c | 141 struct drm_display_mode *adjusted_mode) in drm_i2c_encoder_mode_fixup() argument
146 return get_slave_funcs(encoder)->mode_fixup(encoder, mode, adjusted_mode); in drm_i2c_encoder_mode_fixup()
164 struct drm_display_mode *adjusted_mode) in drm_i2c_encoder_mode_set() argument
166 get_slave_funcs(encoder)->mode_set(encoder, mode, adjusted_mode); in drm_i2c_encoder_mode_set()
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| /drivers/gpu/drm/ast/ |
| D | ast_mode.c | 81 struct drm_display_mode *adjusted_mode, in ast_get_vbios_mode_info() argument
183 adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht; in ast_get_vbios_mode_info()
184 adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder; in ast_get_vbios_mode_info()
185 adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder; in ast_get_vbios_mode_info()
186 adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder + in ast_get_vbios_mode_info()
188 adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder + in ast_get_vbios_mode_info()
192 adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt; in ast_get_vbios_mode_info()
193 adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder; in ast_get_vbios_mode_info()
194 adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder; in ast_get_vbios_mode_info()
195 adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder + in ast_get_vbios_mode_info()
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| /drivers/gpu/drm/rockchip/ |
| D | rockchip_drm_vop.c | 658 clip.x2 = crtc_state->adjusted_mode.hdisplay; in vop_plane_atomic_check()
659 clip.y2 = crtc_state->adjusted_mode.vdisplay; in vop_plane_atomic_check()
859 struct drm_display_mode *adjusted_mode) in vop_crtc_mode_fixup() argument
863 adjusted_mode->clock = in vop_crtc_mode_fixup()
876 struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode; in vop_crtc_atomic_enable() local
877 u16 hsync_len = adjusted_mode->hsync_end - adjusted_mode->hsync_start; in vop_crtc_atomic_enable()
878 u16 hdisplay = adjusted_mode->hdisplay; in vop_crtc_atomic_enable()
879 u16 htotal = adjusted_mode->htotal; in vop_crtc_atomic_enable()
880 u16 hact_st = adjusted_mode->htotal - adjusted_mode->hsync_start; in vop_crtc_atomic_enable()
882 u16 vdisplay = adjusted_mode->vdisplay; in vop_crtc_atomic_enable()
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| /drivers/gpu/drm/rcar-du/ |
| D | rcar_du_encoder.c | 62 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; in rcar_du_encoder_atomic_check() local
91 drm_mode_copy(adjusted_mode, panel_mode); in rcar_du_encoder_atomic_check()
95 rcar_du_lvdsenc_atomic_check(renc->lvds, adjusted_mode); in rcar_du_encoder_atomic_check()
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| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | dfp.c | 184 struct drm_display_mode *adjusted_mode) in nv04_dfp_mode_fixup() argument
193 nv_encoder->mode = *adjusted_mode; in nv04_dfp_mode_fixup()
197 adjusted_mode->clock = nv_connector->native_mode->clock; in nv04_dfp_mode_fixup()
281 struct drm_display_mode *adjusted_mode) in nv04_dfp_mode_set() argument
334 else if (adjusted_mode->hdisplay == output_mode->hdisplay && in nv04_dfp_mode_set()
335 adjusted_mode->vdisplay == output_mode->vdisplay) /* native mode */ in nv04_dfp_mode_set()
374 mode_ratio = (1 << 12) * adjusted_mode->hdisplay / adjusted_mode->vdisplay; in nv04_dfp_mode_set()
388 scale = (1 << 12) * adjusted_mode->vdisplay / output_mode->vdisplay; in nv04_dfp_mode_set()
404 scale = (1 << 12) * adjusted_mode->hdisplay / output_mode->hdisplay; in nv04_dfp_mode_set()
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| /drivers/gpu/drm/mediatek/ |
| D | mtk_hdmi.c | 1240 struct drm_display_mode adjusted_mode; in mtk_hdmi_conn_mode_valid() local
1242 drm_mode_copy(&adjusted_mode, mode); in mtk_hdmi_conn_mode_valid()
1244 &adjusted_mode)) in mtk_hdmi_conn_mode_valid()
1334 struct drm_display_mode *adjusted_mode) in mtk_hdmi_bridge_mode_fixup() argument
1368 struct drm_display_mode *adjusted_mode) in mtk_hdmi_bridge_mode_set() argument
1373 adjusted_mode->name, adjusted_mode->hdisplay); in mtk_hdmi_bridge_mode_set()
1375 adjusted_mode->hsync_start, adjusted_mode->hsync_end, in mtk_hdmi_bridge_mode_set()
1376 adjusted_mode->htotal); in mtk_hdmi_bridge_mode_set()
1378 adjusted_mode->hskew, adjusted_mode->vdisplay); in mtk_hdmi_bridge_mode_set()
1380 adjusted_mode->vsync_start, adjusted_mode->vsync_end, in mtk_hdmi_bridge_mode_set()
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