| /drivers/iio/counter/ |
| D | 104-quad-8.c | 66 const int base_offset = priv->base + 2 * chan->channel; in quad8_read_raw() local
79 flags = inb(base_offset + 1); in quad8_read_raw()
87 outb(0x11, base_offset + 1); in quad8_read_raw()
90 *val |= (unsigned int)inb(base_offset) << (8 * i); in quad8_read_raw()
109 const int base_offset = priv->base + 2 * chan->channel; in quad8_write_raw() local
123 outb(0x01, base_offset + 1); in quad8_write_raw()
127 outb(val >> (8 * i), base_offset); in quad8_write_raw()
130 outb(0x08, base_offset + 1); in quad8_write_raw()
133 outb(0x01, base_offset + 1); in quad8_write_raw()
138 outb(val >> (8 * i), base_offset); in quad8_write_raw()
[all …]
|
| /drivers/acpi/acpica/ |
| D | utbuffer.c | 68 void acpi_ut_dump_buffer(u8 *buffer, u32 count, u32 display, u32 base_offset) in acpi_ut_dump_buffer() argument
90 acpi_os_printf("%6.4X: ", (base_offset + i)); in acpi_ut_dump_buffer()
234 u8 *buffer, u32 count, u32 display, u32 base_offset) in acpi_ut_dump_buffer_to_file() argument
256 fprintf(file, "%6.4X: ", (base_offset + i)); in acpi_ut_dump_buffer_to_file()
|
| D | acutils.h | 352 u32 count, u32 display, u32 base_offset);
|
| /drivers/gpu/drm/i915/ |
| D | intel_dsi_vbt.c | 65 #define VLV_GPIO_PCONF0(base_offset) (base_offset) argument
66 #define VLV_GPIO_PAD_VAL(base_offset) ((base_offset) + 8) argument
69 u16 base_offset; member
234 pconf0 = VLV_GPIO_PCONF0(map->base_offset); in vlv_exec_gpio()
235 padval = VLV_GPIO_PAD_VAL(map->base_offset); in vlv_exec_gpio()
|
| /drivers/scsi/aic7xxx/ |
| D | aic79xx_osm_pci.c | 279 u_long base_offset; in ahd_linux_pci_reserve_mem_region() local
290 base_offset = start - base_page; in ahd_linux_pci_reserve_mem_region()
296 *maddr = ioremap_nocache(base_page, base_offset + 512); in ahd_linux_pci_reserve_mem_region()
301 *maddr += base_offset; in ahd_linux_pci_reserve_mem_region()
|
| /drivers/gpio/ |
| D | gpio-104-idi-48.c | 76 unsigned base_offset; in idi_48_gpio_get() local
81 base_offset = register_offset[i / 8]; in idi_48_gpio_get()
84 return !!(inb(idi48gpio->base + base_offset) & mask); in idi_48_gpio_get()
|
| /drivers/xen/xen-pciback/ |
| D | conf_space.h | 64 unsigned int base_offset; member
70 #define OFFSET(cfg_entry) ((cfg_entry)->base_offset+(cfg_entry)->field->offset)
|
| D | conf_space.c | 357 unsigned int base_offset) in xen_pcibk_config_add_field_offset() argument
372 cfg_entry->base_offset = base_offset; in xen_pcibk_config_add_field_offset()
|
| D | pci_stub.c | 1357 cfg_entry->base_offset + in quirks_show()
|
| /drivers/net/ethernet/brocade/bna/ |
| D | bnad_ethtool.c | 953 u32 *base_offset) in bnad_get_flash_partition_by_offset() argument
987 *base_offset = flash_attr->part[i].part_off; in bnad_get_flash_partition_by_offset()
1008 u32 flash_part = 0, base_offset = 0; in bnad_get_eeprom() local
1017 eeprom->offset, &base_offset); in bnad_get_eeprom()
1028 eeprom->offset - base_offset, in bnad_get_eeprom()
1048 u32 flash_part = 0, base_offset = 0; in bnad_set_eeprom() local
1059 eeprom->offset, &base_offset); in bnad_set_eeprom()
1070 eeprom->offset - base_offset, in bnad_set_eeprom()
|
| /drivers/gpu/drm/radeon/ |
| D | r600_cs.c | 355 u64 base_offset, base_align; in r600_cs_track_validate_cb() local
380 base_offset = track->cb_color_bo_mc[i] + track->cb_color_bo_offset[i]; in r600_cs_track_validate_cb()
423 if (!IS_ALIGNED(base_offset, base_align)) { in r600_cs_track_validate_cb()
425 base_offset, base_align, array_mode); in r600_cs_track_validate_cb()
524 u64 base_offset, base_align; in r600_cs_track_validate_db() local
575 base_offset = track->db_bo_mc + track->db_offset; in r600_cs_track_validate_db()
614 if (!IS_ALIGNED(base_offset, base_align)) { in r600_cs_track_validate_db()
616 base_offset, base_align, array_mode); in r600_cs_track_validate_db()
1472 u64 base_offset, in r600_check_texture_resource() argument
1491 base_offset <<= 8; in r600_check_texture_resource()
[all …]
|
| /drivers/net/ethernet/seeq/ |
| D | ether3.c | 778 ec->irqaddr = priv(dev)->base + data->base_offset; in ether3_probe()
781 priv(dev)->seeq = priv(dev)->base + data->base_offset; in ether3_probe()
861 .base_offset = 0,
866 .base_offset = 0x800,
|
| D | ether3.h | 173 unsigned long base_offset; member
|
| /drivers/pci/hotplug/ |
| D | shpchp.h | 202 volatile u32 base_offset; member
219 BASE_OFFSET = offsetof(struct ctrl_reg, base_offset),
|
| /drivers/thunderbolt/ |
| D | tb_regs.h | 99 u32 base_offset:8; /* member
|
| /drivers/staging/fsl-mc/bus/ |
| D | dprc.h | 244 u32 base_offset; member
|
| D | fsl-mc-bus.c | 429 region_desc.base_offset, in fsl_mc_device_get_mmio_regions()
434 region_desc.base_offset, in fsl_mc_device_get_mmio_regions()
|
| D | dprc.c | 715 region_desc->base_offset = le64_to_cpu(rsp_params->base_addr); in dprc_get_obj_region()
|
| /drivers/acpi/nfit/ |
| D | nfit.h | 195 u64 base_offset; member
|
| D | core.c | 1945 return mmio->base_offset + line_offset + table_offset + sub_line_offset; in to_interleave_offset()
1995 u64 base_offset; in acpi_nfit_blk_single_io() local
1998 base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES in acpi_nfit_blk_single_io()
2008 offset = to_interleave_offset(base_offset + copied, in acpi_nfit_blk_single_io()
2013 offset = base_offset + nfit_blk->bdw_offset; in acpi_nfit_blk_single_io()
2139 mmio->base_offset = nfit_mem->memdev_bdw->region_offset; in acpi_nfit_blk_region_enable()
2162 mmio->base_offset = nfit_mem->memdev_dcr->region_offset; in acpi_nfit_blk_region_enable()
|
| /drivers/dma/qcom/ |
| D | bam_dma.c | 116 u32 base_offset; member
417 return bdev->regs + r.base_offset + in bam_addr()
|