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Searched refs:default_dispclk (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atombios.c673 adev->clock.default_dispclk = in amdgpu_atombios_get_clock_info()
676 if (adev->clock.default_dispclk < 53900) { in amdgpu_atombios_get_clock_info()
678 adev->clock.default_dispclk / 100); in amdgpu_atombios_get_clock_info()
679 adev->clock.default_dispclk = 60000; in amdgpu_atombios_get_clock_info()
680 } else if (adev->clock.default_dispclk <= 60000) { in amdgpu_atombios_get_clock_info()
682 adev->clock.default_dispclk / 100); in amdgpu_atombios_get_clock_info()
683 adev->clock.default_dispclk = 62500; in amdgpu_atombios_get_clock_info()
687 adev->clock.current_dispclk = adev->clock.default_dispclk; in amdgpu_atombios_get_clock_info()
Ddce_v6_0.c1725 dce_v6_0_audio_set_dto(encoder, adev->clock.default_dispclk * 10); in dce_v6_0_afmt_setmode()
2757 amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); in dce_v6_0_hw_init()
Damdgpu_connectors.c1353 if ((adev->clock.default_dispclk >= 53900) && in amdgpu_connector_is_dp12_capable()
Ddce_v11_0.c3011 amdgpu_atombios_crtc_set_dce_clock(adev, adev->clock.default_dispclk, in dce_v11_0_hw_init()
3016 amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); in dce_v11_0_hw_init()
Damdgpu.h370 uint32_t default_dispclk; member
Ddce_v8_0.c2789 amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); in dce_v8_0_hw_init()
Ddce_v10_0.c2891 amdgpu_atombios_crtc_set_disp_eng_pll(adev, adev->clock.default_dispclk); in dce_v10_0_hw_init()
/drivers/gpu/drm/radeon/
Dradeon_atombios.c1256 rdev->clock.default_dispclk = in radeon_atom_get_clock_info()
1258 if (rdev->clock.default_dispclk == 0) { in radeon_atom_get_clock_info()
1260 rdev->clock.default_dispclk = 60000; /* 600 Mhz */ in radeon_atom_get_clock_info()
1262 rdev->clock.default_dispclk = 54000; /* 540 Mhz */ in radeon_atom_get_clock_info()
1264 rdev->clock.default_dispclk = 60000; /* 600 Mhz */ in radeon_atom_get_clock_info()
1267 if (ASIC_IS_DCE6(rdev) && (rdev->clock.default_dispclk < 53900)) { in radeon_atom_get_clock_info()
1269 rdev->clock.default_dispclk / 100); in radeon_atom_get_clock_info()
1270 rdev->clock.default_dispclk = 60000; in radeon_atom_get_clock_info()
1274 rdev->clock.current_dispclk = rdev->clock.default_dispclk; in radeon_atom_get_clock_info()
Datombios_crtc.c2021 atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk); in radeon_atom_disp_eng_pll_init()
2026 rdev->clock.default_dispclk); in radeon_atom_disp_eng_pll_init()
2030 atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk); in radeon_atom_disp_eng_pll_init()
Dtrinity_dpm.c1637 u64 disp_clk = rdev->clock.default_dispclk / 100; in trinity_add_dccac_value()
Dradeon_connectors.c1683 (rdev->clock.default_dispclk >= 53900) && in radeon_connector_is_dp12_capable()
Dradeon.h272 uint32_t default_dispclk; member