/drivers/vfio/platform/ |
D | vfio_platform_irq.c | 57 if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE)) in vfio_platform_set_irq_mask() 64 return vfio_virqfd_enable((void *) &vdev->irqs[index], in vfio_platform_set_irq_mask() 67 &vdev->irqs[index].mask, fd); in vfio_platform_set_irq_mask() 69 vfio_virqfd_disable(&vdev->irqs[index].mask); in vfio_platform_set_irq_mask() 74 vfio_platform_mask(&vdev->irqs[index]); in vfio_platform_set_irq_mask() 80 vfio_platform_mask(&vdev->irqs[index]); in vfio_platform_set_irq_mask() 117 if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE)) in vfio_platform_set_irq_unmask() 124 return vfio_virqfd_enable((void *) &vdev->irqs[index], in vfio_platform_set_irq_unmask() 127 &vdev->irqs[index].unmask, in vfio_platform_set_irq_unmask() 130 vfio_virqfd_disable(&vdev->irqs[index].unmask); in vfio_platform_set_irq_unmask() [all …]
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/drivers/staging/fsl-mc/bus/ |
D | fsl-mc-allocator.c | 435 struct fsl_mc_device_irq **irqs = NULL; in fsl_mc_allocate_irqs() local 439 if (WARN_ON(mc_dev->irqs)) in fsl_mc_allocate_irqs() 461 irqs = devm_kzalloc(&mc_dev->dev, irq_count * sizeof(irqs[0]), in fsl_mc_allocate_irqs() 463 if (!irqs) in fsl_mc_allocate_irqs() 474 irqs[i] = to_fsl_mc_irq(resource); in fsl_mc_allocate_irqs() 477 WARN_ON(irqs[i]->mc_dev); in fsl_mc_allocate_irqs() 478 irqs[i]->mc_dev = mc_dev; in fsl_mc_allocate_irqs() 479 irqs[i]->dev_irq_index = i; in fsl_mc_allocate_irqs() 482 mc_dev->irqs = irqs; in fsl_mc_allocate_irqs() 487 irqs[i]->mc_dev = NULL; in fsl_mc_allocate_irqs() [all …]
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/drivers/pci/pcie/ |
D | portdrv_core.c | 56 static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask) in pcie_port_enable_irq_vec() argument 94 irqs[PCIE_PORT_SERVICE_PME_SHIFT] = pci_irq_vector(dev, entry); in pcie_port_enable_irq_vec() 95 irqs[PCIE_PORT_SERVICE_HP_SHIFT] = pci_irq_vector(dev, entry); in pcie_port_enable_irq_vec() 122 irqs[PCIE_PORT_SERVICE_AER_SHIFT] = pci_irq_vector(dev, entry); in pcie_port_enable_irq_vec() 149 irqs[PCIE_PORT_SERVICE_DPC_SHIFT] = pci_irq_vector(dev, entry); in pcie_port_enable_irq_vec() 185 static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask) in pcie_init_service_irqs() argument 190 irqs[i] = -1; in pcie_init_service_irqs() 204 if (pcie_port_enable_irq_vec(dev, irqs, mask) == 0) in pcie_init_service_irqs() 215 irqs[i] = pci_irq_vector(dev, 0); in pcie_init_service_irqs() 337 int irqs[PCIE_PORT_DEVICE_MAXSERVICES]; in pcie_port_device_register() local [all …]
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/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/ |
D | gp_timer_defs.h | 27 … HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(… argument 28 …E_GP_TIMER_IRQ_ENABLE_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irqs,… argument
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/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ |
D | gp_timer_defs.h | 27 … HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(… argument 28 …E_GP_TIMER_IRQ_ENABLE_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irqs,… argument
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/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/ |
D | gp_timer_defs.h | 27 … HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(… argument 28 …E_GP_TIMER_IRQ_ENABLE_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irqs,… argument
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/drivers/pci/host/ |
D | vmd.c | 77 struct vmd_irq_list *irqs; member 96 struct vmd_irq_list *irqs) in index_from_irqs() argument 98 return irqs - vmd->irqs; in index_from_irqs() 187 return &vmd->irqs[0]; in vmd_next_irq() 197 return &vmd->irqs[0]; in vmd_next_irq() 202 if (vmd->irqs[i].count < vmd->irqs[best].count) in vmd_next_irq() 204 vmd->irqs[best].count++; in vmd_next_irq() 207 return &vmd->irqs[best]; in vmd_next_irq() 668 struct vmd_irq_list *irqs = data; in vmd_irq() local 672 idx = srcu_read_lock(&irqs->srcu); in vmd_irq() [all …]
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/drivers/irqchip/ |
D | irq-nvic.c | 90 unsigned int irqs, i, ret, numbanks; in nvic_of_init() local 102 irqs = numbanks * 32; in nvic_of_init() 103 if (irqs > NVIC_MAX_IRQ) in nvic_of_init() 104 irqs = NVIC_MAX_IRQ; in nvic_of_init() 107 irq_domain_add_linear(node, irqs, &nvic_irq_domain_ops, NULL); in nvic_of_init() 142 for (i = 0; i < irqs; i += 4) in nvic_of_init()
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/drivers/misc/cxl/ |
D | irq.c | 195 irq_off = hwirq - ctx->irqs.offset[r]; in cxl_irq_afu() 196 range = ctx->irqs.range[r]; in cxl_irq_afu() 314 if ((rc = cxl_ops->alloc_irq_ranges(&ctx->irqs, ctx->afu->adapter, in afu_allocate_irqs() 320 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in afu_allocate_irqs() 321 ctx->irqs.range[0] = 1; in afu_allocate_irqs() 335 for (i = 0; i < ctx->irqs.range[r]; i++) { in afu_allocate_irqs() 355 cxl_ops->release_irq_ranges(&ctx->irqs, ctx->afu->adapter); in afu_allocate_irqs() 370 hwirq = ctx->irqs.offset[r]; in afu_register_hwirqs() 371 for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) { in afu_register_hwirqs() 412 hwirq = ctx->irqs.offset[r]; in afu_release_irqs() [all …]
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D | guest.c | 309 static int guest_alloc_irq_ranges(struct cxl_irq_ranges *irqs, in guest_alloc_irq_ranges() argument 314 memset(irqs, 0, sizeof(struct cxl_irq_ranges)); in guest_alloc_irq_ranges() 326 irqs->offset[i] = irq; in guest_alloc_irq_ranges() 327 irqs->range[i] = try; in guest_alloc_irq_ranges() 337 irq_free_range(adapter, irqs->offset[i], irqs->range[i]); in guest_alloc_irq_ranges() 342 static void guest_release_irq_ranges(struct cxl_irq_ranges *irqs, in guest_release_irq_ranges() argument 349 irq_free_range(adapter, irqs->offset[i], irqs->range[i]); in guest_release_irq_ranges() 391 hwirq = ctx->irqs.offset[r]; in disable_afu_irqs() 392 for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) { in disable_afu_irqs() 407 hwirq = ctx->irqs.offset[r]; in enable_afu_irqs() [all …]
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D | native.c | 646 ctx->elem->ivte_offsets[r] = cpu_to_be16(ctx->irqs.offset[r]); in update_ivtes_directed() 647 ctx->elem->ivte_ranges[r] = cpu_to_be16(ctx->irqs.range[r]); in update_ivtes_directed() 698 if (ctx->irqs.range[0] == 0) { in process_element_entry_psl9() 699 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in process_element_entry_psl9() 700 ctx->irqs.range[0] = 1; in process_element_entry_psl9() 761 if (ctx->irqs.range[0] == 0) { in cxl_attach_afu_directed_psl8() 762 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in cxl_attach_afu_directed_psl8() 763 ctx->irqs.range[0] = 1; in cxl_attach_afu_directed_psl8() 875 ctx->elem->ivte_offsets[r] = cpu_to_be16(ctx->irqs.offset[r]); in cxl_update_dedicated_ivtes_psl9() 876 ctx->elem->ivte_ranges[r] = cpu_to_be16(ctx->irqs.range[r]); in cxl_update_dedicated_ivtes_psl9() [all …]
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/drivers/pci/hotplug/ |
D | cpqphp_ctrl.c | 1542 res_lists.irqs = NULL; in board_added() 2389 struct irq_mapping irqs; in configure_new_function() local 2469 if (!resources->irqs) { in configure_new_function() 2470 irqs.barber_pole = 0; in configure_new_function() 2471 irqs.interrupt[0] = 0; in configure_new_function() 2472 irqs.interrupt[1] = 0; in configure_new_function() 2473 irqs.interrupt[2] = 0; in configure_new_function() 2474 irqs.interrupt[3] = 0; in configure_new_function() 2475 irqs.valid_INT = 0; in configure_new_function() 2477 irqs.barber_pole = resources->irqs->barber_pole; in configure_new_function() [all …]
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/drivers/mfd/ |
D | motorola-cpcap.c | 31 struct regmap_irq *irqs; member 149 struct regmap_irq *rirq = &cpcap->irqs[i]; in cpcap_init_irq_chip() 153 chip->irqs = &cpcap->irqs[irq_start]; in cpcap_init_irq_chip() 175 cpcap->irqs = devm_kzalloc(&cpcap->spi->dev, in cpcap_init_irq() 176 sizeof(*cpcap->irqs) * in cpcap_init_irq() 180 if (!cpcap->irqs) in cpcap_init_irq()
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D | mc13xxx-core.c | 133 if (irq < 0 || irq >= ARRAY_SIZE(mc13xxx->irqs)) in mc13xxx_irq_status() 430 for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) { in mc13xxx_common_init() 431 mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG; in mc13xxx_common_init() 432 mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG); in mc13xxx_common_init() 443 mc13xxx->irq_chip.irqs = mc13xxx->irqs; in mc13xxx_common_init() 444 mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs); in mc13xxx_common_init()
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D | intel_soc_pmic_bxtwc.c | 147 .irqs = bxtwc_regmap_irqs, 156 .irqs = bxtwc_regmap_irqs_pwrbtn, 165 .irqs = bxtwc_regmap_irqs_tmu, 174 .irqs = bxtwc_regmap_irqs_bcu, 183 .irqs = bxtwc_regmap_irqs_adc, 192 .irqs = bxtwc_regmap_irqs_chgr, 201 .irqs = bxtwc_regmap_irqs_crit,
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D | sec-irq.c | 384 .irqs = s2mps11_irqs, 393 .irqs = s2mps14_irqs, \ 417 .irqs = s2mpu02_irqs, 427 .irqs = s5m8767_irqs, 437 .irqs = s5m8763_irqs,
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/drivers/gpio/ |
D | gpio-reg.c | 23 const int *irqs; member 104 int irq = r->irqs[offset]; in gpio_reg_to_irq() 135 const char *const *names, struct irq_domain *irqdom, const int *irqs) in gpio_reg_init() argument 157 if (irqs) in gpio_reg_init() 165 r->irqs = irqs; in gpio_reg_init()
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/drivers/ssb/ |
D | driver_gpio.c | 128 unsigned long irqs = (val ^ pol) & mask; in ssb_gpio_irq_chipco_handler() local 131 if (!irqs) in ssb_gpio_irq_chipco_handler() 134 for_each_set_bit(gpio, &irqs, bus->gpio.ngpio) in ssb_gpio_irq_chipco_handler() 136 ssb_chipco_gpio_polarity(chipco, irqs, val & irqs); in ssb_gpio_irq_chipco_handler() 325 unsigned long irqs = (val ^ pol) & mask; in ssb_gpio_irq_extif_handler() local 328 if (!irqs) in ssb_gpio_irq_extif_handler() 331 for_each_set_bit(gpio, &irqs, bus->gpio.ngpio) in ssb_gpio_irq_extif_handler() 333 ssb_extif_gpio_polarity(extif, irqs, val & irqs); in ssb_gpio_irq_extif_handler()
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/drivers/net/wan/ |
D | z85230.c | 711 struct z8530_irqhandler *irqs; in z8530_interrupt() local 735 irqs=dev->chanA.irqs; in z8530_interrupt() 740 irqs->rx(&dev->chanA); in z8530_interrupt() 742 irqs->tx(&dev->chanA); in z8530_interrupt() 744 irqs->status(&dev->chanA); in z8530_interrupt() 747 irqs=dev->chanB.irqs; in z8530_interrupt() 752 irqs->rx(&dev->chanB); in z8530_interrupt() 754 irqs->tx(&dev->chanB); in z8530_interrupt() 756 irqs->status(&dev->chanB); in z8530_interrupt() 799 c->irqs = &z8530_sync; in z8530_sync_open() [all …]
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/drivers/input/serio/ |
D | i8042-sparcio.h | 63 unsigned int irq = kbd->archdata.irqs[0]; in sparc_i8042_probe() 65 irq = op->archdata.irqs[0]; in sparc_i8042_probe() 73 unsigned int irq = ms->archdata.irqs[0]; in sparc_i8042_probe() 75 irq = op->archdata.irqs[0]; in sparc_i8042_probe()
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/drivers/bcma/ |
D | driver_gpio.c | 109 unsigned long irqs = (val ^ pol) & mask; in bcma_gpio_irq_handler() local 112 if (!irqs) in bcma_gpio_irq_handler() 115 for_each_set_bit(gpio, &irqs, gc->ngpio) in bcma_gpio_irq_handler() 117 bcma_chipco_gpio_polarity(cc, irqs, val & irqs); in bcma_gpio_irq_handler()
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/drivers/fpga/ |
D | socfpga.c | 264 static void socfpga_fpga_enable_irqs(struct socfpga_fpga_priv *priv, u32 irqs) in socfpga_fpga_enable_irqs() argument 270 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INT_POL_OFST, irqs); in socfpga_fpga_enable_irqs() 273 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_PORTA_EOI_OFST, irqs); in socfpga_fpga_enable_irqs() 279 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTEN_OFST, irqs); in socfpga_fpga_enable_irqs() 290 u32 irqs, st; in socfpga_fpga_isr() local 294 irqs = socfpga_fpga_raw_readl(priv, SOCFPGA_FPGMGR_GPIO_INTSTAT_OFST); in socfpga_fpga_isr() 296 socfpga_fpga_raw_writel(priv, SOCFPGA_FPGMGR_GPIO_PORTA_EOI_OFST, irqs); in socfpga_fpga_isr()
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/drivers/base/regmap/ |
D | regmap-irq.c | 53 return &data->chip->irqs[irq]; in irq_to_regmap_irq() 371 if (data->status_buf[chip->irqs[i].reg_offset / in regmap_irq_thread() 372 map->reg_stride] & chip->irqs[i].mask) { in regmap_irq_thread() 440 if (chip->irqs[i].reg_offset % map->reg_stride) in regmap_add_irq_chip() 442 if (chip->irqs[i].reg_offset / map->reg_stride >= in regmap_add_irq_chip() 523 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] in regmap_add_irq_chip() 524 |= chip->irqs[i].mask; in regmap_add_irq_chip() 605 reg = chip->irqs[i].type_reg_offset / map->reg_stride; in regmap_add_irq_chip() 606 d->type_buf_def[reg] |= chip->irqs[i].type_rising_mask | in regmap_add_irq_chip() 607 chip->irqs[i].type_falling_mask; in regmap_add_irq_chip() [all …]
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/drivers/gpu/drm/bridge/synopsys/ |
D | dw-hdmi-cec.c | 200 unsigned int irqs; in dw_hdmi_cec_enable() local 210 irqs = CEC_STAT_ERROR_INIT | CEC_STAT_NACK | CEC_STAT_EOM | in dw_hdmi_cec_enable() 212 dw_hdmi_write(cec, irqs, HDMI_CEC_POLARITY); in dw_hdmi_cec_enable() 213 dw_hdmi_write(cec, ~irqs, HDMI_CEC_MASK); in dw_hdmi_cec_enable() 214 dw_hdmi_write(cec, ~irqs, HDMI_IH_MUTE_CEC_STAT0); in dw_hdmi_cec_enable()
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/drivers/mtd/nand/ |
D | cafe_nand.c | 107 uint32_t irqs = cafe_readl(cafe, NAND_IRQ); in cafe_device_ready() local 109 cafe_writel(cafe, irqs, NAND_IRQ); in cafe_device_ready() 112 result?"":" not", irqs, cafe_readl(cafe, NAND_IRQ), in cafe_device_ready() 284 uint32_t irqs; in cafe_nand_cmdfunc() local 287 irqs = cafe_readl(cafe, NAND_IRQ); in cafe_nand_cmdfunc() 288 if (irqs & doneint) in cafe_nand_cmdfunc() 292 cafe_dev_dbg(&cafe->pdev->dev, "Wait for ready, IRQ %x\n", irqs); in cafe_nand_cmdfunc() 297 command, 500000-c, irqs, cafe_readl(cafe, NAND_IRQ)); in cafe_nand_cmdfunc() 339 uint32_t irqs = cafe_readl(cafe, NAND_IRQ); in cafe_nand_interrupt() local 340 cafe_writel(cafe, irqs & ~0x90000000, NAND_IRQ); in cafe_nand_interrupt() [all …]
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