Searched refs:max_sh_per_se (Results 1 – 14 of 14) sorted by relevance
1314 adev->gfx.config.max_sh_per_se); in gfx_v6_0_get_rb_active_bitmap()1355 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); in gfx_v6_0_write_harvested_raster_configs()1448 adev->gfx.config.max_sh_per_se; in gfx_v6_0_setup_rb()1453 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v6_0_setup_rb()1457 ((i * adev->gfx.config.max_sh_per_se + j) * in gfx_v6_0_setup_rb()1481 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v6_0_setup_rb()1529 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v6_0_setup_spi()1567 adev->gfx.config.max_sh_per_se = 2; in gfx_v6_0_gpu_init()1584 adev->gfx.config.max_sh_per_se = 2; in gfx_v6_0_gpu_init()1601 adev->gfx.config.max_sh_per_se = 2; in gfx_v6_0_gpu_init()[all …]
1629 adev->gfx.config.max_sh_per_se); in gfx_v7_0_get_rb_active_bitmap()1671 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); in gfx_v7_0_write_harvested_raster_configs()1791 adev->gfx.config.max_sh_per_se; in gfx_v7_0_setup_rb()1796 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v7_0_setup_rb()1799 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * in gfx_v7_0_setup_rb()3422 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v7_0_wait_for_rlc_serdes()4357 adev->gfx.config.max_sh_per_se = 1; in gfx_v7_0_gpu_early_init()4374 adev->gfx.config.max_sh_per_se = 1; in gfx_v7_0_gpu_early_init()4392 adev->gfx.config.max_sh_per_se = 1; in gfx_v7_0_gpu_early_init()4410 adev->gfx.config.max_sh_per_se = 1; in gfx_v7_0_gpu_early_init()[all …]
1666 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()1683 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()1729 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()1745 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()1762 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()1780 adev->gfx.config.max_sh_per_se = 1; in gfx_v8_0_gpu_early_init()3421 adev->gfx.config.max_sh_per_se); in gfx_v8_0_get_rb_active_bitmap()3471 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); in gfx_v8_0_write_harvested_raster_configs()3582 adev->gfx.config.max_sh_per_se; in gfx_v8_0_setup_rb()3587 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v8_0_setup_rb()[all …]
1424 adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se); in amdgpu_device_parse_gpu_info_fw()3089 if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) || in amdgpu_debugfs_regs_read()3165 if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) || in amdgpu_debugfs_regs_write()3390 config[no_regs++] = adev->gfx.config.max_sh_per_se; in amdgpu_debugfs_gca_config_read()
1447 adev->gfx.config.max_sh_per_se); in gfx_v9_0_get_rb_active_bitmap()1458 adev->gfx.config.max_sh_per_se; in gfx_v9_0_setup_rb()1462 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v9_0_setup_rb()1465 active_rbs |= data << ((i * adev->gfx.config.max_sh_per_se + j) * in gfx_v9_0_setup_rb()1546 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v9_0_wait_for_rlc_serdes()4345 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { in gfx_v9_0_get_cu_info()
726 adev->gfx.config.max_sh_per_se = gfx_info->info.max_sh_per_se; in amdgpu_atombios_get_gfx_info()
538 dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; in amdgpu_info_ioctl()
897 unsigned max_sh_per_se; member
470 *value = rdev->config.cik.max_sh_per_se; in radeon_info_ioctl()472 *value = rdev->config.si.max_sh_per_se; in radeon_info_ioctl()
3103 rdev->config.si.max_sh_per_se = 2; in si_gpu_init()3120 rdev->config.si.max_sh_per_se = 2; in si_gpu_init()3138 rdev->config.si.max_sh_per_se = 2; in si_gpu_init()3155 rdev->config.si.max_sh_per_se = 1; in si_gpu_init()3172 rdev->config.si.max_sh_per_se = 1; in si_gpu_init()3289 rdev->config.si.max_sh_per_se, in si_gpu_init()3293 rdev->config.si.max_sh_per_se, in si_gpu_init()3298 for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { in si_gpu_init()5325 for (j = 0; j < rdev->config.si.max_sh_per_se; j++) { in si_init_ao_cu_mask()
3199 rdev->config.cik.max_sh_per_se = 1; in cik_gpu_init()3216 rdev->config.cik.max_sh_per_se = 1; in cik_gpu_init()3234 rdev->config.cik.max_sh_per_se = 1; in cik_gpu_init()3252 rdev->config.cik.max_sh_per_se = 1; in cik_gpu_init()3354 rdev->config.cik.max_sh_per_se, in cik_gpu_init()3359 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { in cik_gpu_init()5834 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { in cik_wait_for_rlc_serdes()6612 for (j = 0; j < rdev->config.cik.max_sh_per_se; j++) { in cik_init_ao_cu_mask()
2136 unsigned max_sh_per_se; member2167 unsigned max_sh_per_se; member
1142 uint8_t max_sh_per_se; member
5645 UCHAR max_sh_per_se; member