| /drivers/gpu/drm/radeon/ |
| D | rs780_dpm.c | 426 struct radeon_ps *new_ps, in rs780_set_engine_clock_scaling() argument
430 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_engine_clock_scaling()
474 struct radeon_ps *new_ps, in rs780_set_engine_clock_spc() argument
477 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_engine_clock_spc()
493 struct radeon_ps *new_ps, in rs780_activate_engine_clk_scaling() argument
496 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_activate_engine_clk_scaling()
523 struct radeon_ps *new_ps) in rs780_enable_voltage_scaling() argument
525 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_enable_voltage_scaling()
564 struct radeon_ps *new_ps, in rs780_set_uvd_clock_before_set_eng_clock() argument
567 struct igp_ps *new_state = rs780_get_ps(new_ps); in rs780_set_uvd_clock_before_set_eng_clock()
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| D | sumo_dpm.c | 668 struct sumo_ps *new_ps = sumo_get_ps(rps); in sumo_patch_boost_state() local
670 if (new_ps->flags & SUMO_POWERSTATE_FLAGS_BOOST_STATE) { in sumo_patch_boost_state()
671 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1]; in sumo_patch_boost_state()
682 struct sumo_ps *new_ps = sumo_get_ps(new_rps); in sumo_pre_notify_alt_vddnb_change() local
690 nbps1_new = (new_ps->flags & SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE) ? 1 : 0; in sumo_pre_notify_alt_vddnb_change()
700 struct sumo_ps *new_ps = sumo_get_ps(new_rps); in sumo_post_notify_alt_vddnb_change() local
708 nbps1_new = (new_ps->flags & SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE)? 1 : 0; in sumo_post_notify_alt_vddnb_change()
718 struct sumo_ps *new_ps = sumo_get_ps(rps); in sumo_enable_boost() local
721 if (new_ps->flags & SUMO_POWERSTATE_FLAGS_BOOST_STATE) in sumo_enable_boost()
740 struct sumo_ps *new_ps = sumo_get_ps(rps); in sumo_program_wl() local
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| D | rv6xx_dpm.c | 967 struct radeon_ps *new_ps, in rv6xx_enable_static_voltage_control() argument
970 struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); in rv6xx_enable_static_voltage_control()
1047 struct radeon_ps *new_ps) in rv6xx_calculate_stepping_parameters() argument
1049 struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); in rv6xx_calculate_stepping_parameters()
1200 struct radeon_ps *new_ps, in rv6xx_set_sw_voltage_to_safe() argument
1203 struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); in rv6xx_set_sw_voltage_to_safe()
1230 struct radeon_ps *new_ps, in rv6xx_set_safe_backbias() argument
1233 struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); in rv6xx_set_safe_backbias()
1244 struct radeon_ps *new_ps, in rv6xx_set_safe_pcie_gen2() argument
1247 struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps); in rv6xx_set_safe_pcie_gen2()
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| D | trinity_dpm.c | 842 struct trinity_ps *new_ps = trinity_get_ps(new_rps); in trinity_program_power_levels_0_to_n() local
847 for (i = 0; i < new_ps->num_levels; i++) { in trinity_program_power_levels_0_to_n()
848 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
852 for (i = new_ps->num_levels; i < n_current_state_levels; i++) in trinity_program_power_levels_0_to_n()
965 struct trinity_ps *new_ps = trinity_get_ps(new_rps); in trinity_set_uvd_clock_before_set_eng_clock() local
968 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
979 struct trinity_ps *new_ps = trinity_get_ps(new_rps); in trinity_set_uvd_clock_after_set_eng_clock() local
982 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
1069 struct trinity_ps *new_ps = trinity_get_ps(rps); in trinity_update_current_ps() local
1073 pi->current_ps = *new_ps; in trinity_update_current_ps()
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| D | kv_dpm.c | 1141 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_current_ps() local
1145 pi->current_ps = *new_ps; in kv_update_current_ps()
1152 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_requested_ps() local
1156 pi->requested_ps = *new_ps; in kv_update_requested_ps()
1708 struct kv_ps *new_ps = kv_get_ps(new_rps); in kv_set_valid_clock_range() local
1716 if ((table->entries[i].clk >= new_ps->levels[0].sclk) || in kv_set_valid_clock_range()
1724 if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk) in kv_set_valid_clock_range()
1730 if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) > in kv_set_valid_clock_range()
1731 (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk)) in kv_set_valid_clock_range()
1741 if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk || in kv_set_valid_clock_range()
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| D | btc_dpm.c | 2260 struct rv7xx_ps *new_ps = rv770_get_ps(rps); in btc_update_current_ps() local
2264 eg_pi->current_ps = *new_ps; in btc_update_current_ps()
2271 struct rv7xx_ps *new_ps = rv770_get_ps(rps); in btc_update_requested_ps() local
2275 eg_pi->requested_ps = *new_ps; in btc_update_requested_ps()
2293 struct radeon_ps *new_ps = &requested_ps; in btc_dpm_pre_set_power_state() local
2295 btc_update_requested_ps(rdev, new_ps); in btc_dpm_pre_set_power_state()
2305 struct radeon_ps *new_ps = &eg_pi->requested_rps; in btc_dpm_set_power_state() local
2317 cypress_notify_link_speed_change_before_state_change(rdev, new_ps, old_ps); in btc_dpm_set_power_state()
2319 rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); in btc_dpm_set_power_state()
2325 btc_set_at_for_uvd(rdev, new_ps); in btc_dpm_set_power_state()
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| D | ni_dpm.c | 3507 struct radeon_ps *new_ps, in ni_set_uvd_clock_before_set_eng_clock() argument
3510 struct ni_ps *new_state = ni_get_ps(new_ps); in ni_set_uvd_clock_before_set_eng_clock()
3513 if ((new_ps->vclk == old_ps->vclk) && in ni_set_uvd_clock_before_set_eng_clock()
3514 (new_ps->dclk == old_ps->dclk)) in ni_set_uvd_clock_before_set_eng_clock()
3521 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in ni_set_uvd_clock_before_set_eng_clock()
3525 struct radeon_ps *new_ps, in ni_set_uvd_clock_after_set_eng_clock() argument
3528 struct ni_ps *new_state = ni_get_ps(new_ps); in ni_set_uvd_clock_after_set_eng_clock()
3531 if ((new_ps->vclk == old_ps->vclk) && in ni_set_uvd_clock_after_set_eng_clock()
3532 (new_ps->dclk == old_ps->dclk)) in ni_set_uvd_clock_after_set_eng_clock()
3539 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in ni_set_uvd_clock_after_set_eng_clock()
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| D | rv770_dpm.c | 1433 struct radeon_ps *new_ps, in rv770_set_uvd_clock_before_set_eng_clock() argument
1436 struct rv7xx_ps *new_state = rv770_get_ps(new_ps); in rv770_set_uvd_clock_before_set_eng_clock()
1439 if ((new_ps->vclk == old_ps->vclk) && in rv770_set_uvd_clock_before_set_eng_clock()
1440 (new_ps->dclk == old_ps->dclk)) in rv770_set_uvd_clock_before_set_eng_clock()
1446 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv770_set_uvd_clock_before_set_eng_clock()
1450 struct radeon_ps *new_ps, in rv770_set_uvd_clock_after_set_eng_clock() argument
1453 struct rv7xx_ps *new_state = rv770_get_ps(new_ps); in rv770_set_uvd_clock_after_set_eng_clock()
1456 if ((new_ps->vclk == old_ps->vclk) && in rv770_set_uvd_clock_after_set_eng_clock()
1457 (new_ps->dclk == old_ps->dclk)) in rv770_set_uvd_clock_after_set_eng_clock()
1463 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv770_set_uvd_clock_after_set_eng_clock()
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| D | ni_dpm.h | 242 struct radeon_ps *new_ps,
245 struct radeon_ps *new_ps,
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| D | rv770_dpm.h | 273 struct radeon_ps *new_ps,
276 struct radeon_ps *new_ps,
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| D | cypress_dpm.c | 1957 struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; in cypress_dpm_set_power_state() local
1967 cypress_notify_link_speed_change_before_state_change(rdev, new_ps, old_ps); in cypress_dpm_set_power_state()
1969 rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); in cypress_dpm_set_power_state()
1975 ret = cypress_upload_sw_state(rdev, new_ps); in cypress_dpm_set_power_state()
1981 ret = cypress_upload_mc_reg_table(rdev, new_ps); in cypress_dpm_set_power_state()
1988 cypress_program_memory_timing_parameters(rdev, new_ps); in cypress_dpm_set_power_state()
2000 rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); in cypress_dpm_set_power_state()
2003 cypress_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); in cypress_dpm_set_power_state()
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| D | si_dpm.c | 6520 struct radeon_ps *new_ps = &requested_ps; in si_dpm_pre_set_power_state() local
6522 ni_update_requested_ps(rdev, new_ps); in si_dpm_pre_set_power_state()
6531 struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; in si_power_control_set_level() local
6540 ret = si_populate_smc_tdp_limits(rdev, new_ps); in si_power_control_set_level()
6543 ret = si_populate_smc_tdp_limits_2(rdev, new_ps); in si_power_control_set_level()
6558 struct radeon_ps *new_ps = &eg_pi->requested_rps; in si_dpm_set_power_state() local
6573 si_request_link_speed_change_before_state_change(rdev, new_ps, old_ps); in si_dpm_set_power_state()
6574 ni_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); in si_dpm_set_power_state()
6575 ret = si_enable_power_containment(rdev, new_ps, false); in si_dpm_set_power_state()
6580 ret = si_enable_smc_cac(rdev, new_ps, false); in si_dpm_set_power_state()
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| D | ci_dpm.c | 5085 struct ci_ps *new_ps = ci_get_ps(rps); in ci_update_current_ps() local
5089 pi->current_ps = *new_ps; in ci_update_current_ps()
5096 struct ci_ps *new_ps = ci_get_ps(rps); in ci_update_requested_ps() local
5100 pi->requested_ps = *new_ps; in ci_update_requested_ps()
5108 struct radeon_ps *new_ps = &requested_ps; in ci_dpm_pre_set_power_state() local
5110 ci_update_requested_ps(rdev, new_ps); in ci_dpm_pre_set_power_state()
5120 struct radeon_ps *new_ps = &pi->requested_rps; in ci_dpm_post_set_power_state() local
5122 ci_update_current_ps(rdev, new_ps); in ci_dpm_post_set_power_state()
5328 struct radeon_ps *new_ps = &pi->requested_rps; in ci_dpm_set_power_state() local
5332 ci_find_dpm_states_clocks_in_dpm_table(rdev, new_ps); in ci_dpm_set_power_state()
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| /drivers/net/wireless/ath/ |
| D | dfs_pri_detector.c | 230 struct pri_sequence ps, *new_ps; in pseq_handler_create_sequences() local
286 new_ps = pool_get_pseq_elem(); in pseq_handler_create_sequences()
287 if (new_ps == NULL) { in pseq_handler_create_sequences()
288 new_ps = kmalloc(sizeof(*new_ps), GFP_ATOMIC); in pseq_handler_create_sequences()
289 if (new_ps == NULL) { in pseq_handler_create_sequences()
296 memcpy(new_ps, &ps, sizeof(ps)); in pseq_handler_create_sequences()
297 INIT_LIST_HEAD(&new_ps->head); in pseq_handler_create_sequences()
298 list_add(&new_ps->head, &pde->sequences); in pseq_handler_create_sequences()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | kv_dpm.c | 1227 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_current_ps() local
1231 pi->current_ps = *new_ps; in kv_update_current_ps()
1239 struct kv_ps *new_ps = kv_get_ps(rps); in kv_update_requested_ps() local
1243 pi->requested_ps = *new_ps; in kv_update_requested_ps()
1764 struct kv_ps *new_ps = kv_get_ps(new_rps); in kv_set_valid_clock_range() local
1772 if ((table->entries[i].clk >= new_ps->levels[0].sclk) || in kv_set_valid_clock_range()
1780 if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk) in kv_set_valid_clock_range()
1786 if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) > in kv_set_valid_clock_range()
1787 (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk)) in kv_set_valid_clock_range()
1797 if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk || in kv_set_valid_clock_range()
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| D | si_dpm.c | 3146 struct si_ps *new_ps = si_get_ps(rps); in ni_update_current_ps() local
3151 ni_pi->current_ps = *new_ps; in ni_update_current_ps()
3159 struct si_ps *new_ps = si_get_ps(rps); in ni_update_requested_ps() local
3164 ni_pi->requested_ps = *new_ps; in ni_update_requested_ps()
3170 struct amdgpu_ps *new_ps, in ni_set_uvd_clock_before_set_eng_clock() argument
3173 struct si_ps *new_state = si_get_ps(new_ps); in ni_set_uvd_clock_before_set_eng_clock()
3176 if ((new_ps->vclk == old_ps->vclk) && in ni_set_uvd_clock_before_set_eng_clock()
3177 (new_ps->dclk == old_ps->dclk)) in ni_set_uvd_clock_before_set_eng_clock()
3184 amdgpu_asic_set_uvd_clocks(adev, new_ps->vclk, new_ps->dclk); in ni_set_uvd_clock_before_set_eng_clock()
3188 struct amdgpu_ps *new_ps, in ni_set_uvd_clock_after_set_eng_clock() argument
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| D | ci_dpm.c | 5273 struct ci_ps *new_ps = ci_get_ps(rps); in ci_update_current_ps() local
5277 pi->current_ps = *new_ps; in ci_update_current_ps()
5285 struct ci_ps *new_ps = ci_get_ps(rps); in ci_update_requested_ps() local
5289 pi->requested_ps = *new_ps; in ci_update_requested_ps()
5298 struct amdgpu_ps *new_ps = &requested_ps; in ci_dpm_pre_set_power_state() local
5300 ci_update_requested_ps(adev, new_ps); in ci_dpm_pre_set_power_state()
5310 struct amdgpu_ps *new_ps = &pi->requested_rps; in ci_dpm_post_set_power_state() local
5312 ci_update_current_ps(adev, new_ps); in ci_dpm_post_set_power_state()
5485 struct amdgpu_ps *new_ps = &pi->requested_rps; in ci_dpm_set_power_state() local
5489 ci_find_dpm_states_clocks_in_dpm_table(adev, new_ps); in ci_dpm_set_power_state()
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| /drivers/net/wireless/ath/carl9170/ |
| D | rx.c | 79 bool new_ps; in carl9170_handle_ps() local
83 new_ps = (ps & CARL9170_PSM_COUNTER) != CARL9170_PSM_WAKE; in carl9170_handle_ps()
84 if (ar->ps.state != new_ps) { in carl9170_handle_ps()
85 if (!new_ps) { in carl9170_handle_ps()
92 ar->ps.state = new_ps; in carl9170_handle_ps()
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