Searched refs:num_instances (Results 1 – 13 of 13) sorted by relevance
245 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_free_microcode()296 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()325 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()520 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_stop()581 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_ctx_switch_enable()623 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_enable()650 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()730 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()777 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_load_microcode()813 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_start()[all …]
74 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_free_microcode()133 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()146 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()322 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_stop()381 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_ctx_switch_enable()419 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_enable()445 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_resume()511 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_resume()558 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_load_microcode()962 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in cik_sdma_early_init()[all …]
111 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_free_microcode()144 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_init_microcode()174 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_init_microcode()353 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_gfx_stop()395 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_enable()421 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_gfx_resume()487 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_gfx_resume()534 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_load_microcode()907 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in sdma_v2_4_early_init()947 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_sw_init()[all …]
129 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_stop()149 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_start()503 adev->sdma.num_instances = 2; in si_dma_early_init()529 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_sw_init()551 for (i = 0; i < adev->sdma.num_instances; i++) in si_dma_sw_fini()701 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_set_clockgating_state()713 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_set_clockgating_state()797 for (i = 0; i < adev->sdma.num_instances; i++) in si_dma_set_ring_funcs()901 for (i = 0; i < adev->sdma.num_instances; i++) in si_dma_set_vm_pte_funcs()905 adev->vm_manager.vm_pte_num_rings = adev->sdma.num_instances; in si_dma_set_vm_pte_funcs()
187 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()218 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()462 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_stop()524 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_ctx_switch_enable()559 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_enable()586 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_resume()807 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_load_microcode()1197 adev->sdma.num_instances = 1; in sdma_v4_0_early_init()1199 adev->sdma.num_instances = 2; in sdma_v4_0_early_init()1234 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()[all …]
240 ip_num_rings = adev->sdma.num_instances; in amdgpu_queue_mgr_map()
200 if (query_fw->index >= adev->sdma.num_instances) in amdgpu_firmware_info()299 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_info_ioctl()1123 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_debugfs_firmware_info()
1160 int num_instances; member1704 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_get_sdma_instance()
72 unsigned short num_instances; member
1494 if (!drv_data || fimc->index >= drv_data->num_instances || in fimc_lite_probe()1657 .num_instances = 2,1668 .num_instances = 3,
204 u8 num_instances; member216 u8 num_instances; member532 return ff_resp.num_instances; in aem_find_aem1_count()668 fi_resp->num_instances <= instance_num) in aem_find_aem2()
383 atomic_t num_instances; /* count of driver instances */ member2368 if (atomic_inc_return(&dev->num_instances) == 1) in vpe_open()2431 if (atomic_dec_return(&dev->num_instances) == 0) in vpe_release()2532 atomic_set(&dev->num_instances, 0); in vpe_probe()
426 int vf, int num_instances) in initialize_res_quotas() argument428 res_alloc->guaranteed[vf] = num_instances / in initialize_res_quotas()430 res_alloc->quota[vf] = (num_instances / 2) + res_alloc->guaranteed[vf]; in initialize_res_quotas()432 res_alloc->res_free = num_instances; in initialize_res_quotas()