Home
last modified time | relevance | path

Searched refs:sclk_frequency (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/radeon/
Dkv_dpm.c737 if (table->entries[i].sclk_frequency == pi->boot_pl.sclk) in kv_program_bootup_state()
1106 if (kv_get_clock_difference(table->entries[i].sclk_frequency, 40000) < 200) in kv_calculate_dfs_bypass_settings()
1108 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 30000) < 200) in kv_calculate_dfs_bypass_settings()
1110 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 26600) < 200) in kv_calculate_dfs_bypass_settings()
1112 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 20000) < 200) in kv_calculate_dfs_bypass_settings()
1114 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 10000) < 200) in kv_calculate_dfs_bypass_settings()
1741 if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk || in kv_set_valid_clock_range()
1749 if (table->entries[i].sclk_frequency <= in kv_set_valid_clock_range()
1757 table->entries[pi->highest_valid].sclk_frequency) > in kv_set_valid_clock_range()
1758 (table->entries[pi->lowest_valid].sclk_frequency - in kv_set_valid_clock_range()
[all …]
Dsumo_dpm.h70 u32 sclk_frequency; member
Dsumo_dpm.c1036 if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit) in sumo_get_valid_engine_clock()
1037 return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency; in sumo_get_valid_engine_clock()
1040 …ping_table.entries[pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries - 1].sclk_frequency; in sumo_get_valid_engine_clock()
1602 sclk_voltage_mapping_table->entries[n].sclk_frequency = in sumo_construct_sclk_voltage_mapping_table()
Dtrinity_dpm.c1387 if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit) in trinity_get_valid_engine_clock()
1388 return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency; in trinity_get_valid_engine_clock()
/drivers/gpu/drm/amd/amdgpu/
Dkv_dpm.c148 sclk_voltage_mapping_table->entries[n].sclk_frequency = in sumo_construct_sclk_voltage_mapping_table()
823 if (table->entries[i].sclk_frequency == pi->boot_pl.sclk) in kv_program_bootup_state()
1192 if (kv_get_clock_difference(table->entries[i].sclk_frequency, 40000) < 200) in kv_calculate_dfs_bypass_settings()
1194 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 30000) < 200) in kv_calculate_dfs_bypass_settings()
1196 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 26600) < 200) in kv_calculate_dfs_bypass_settings()
1198 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 20000) < 200) in kv_calculate_dfs_bypass_settings()
1200 else if (kv_get_clock_difference(table->entries[i].sclk_frequency, 10000) < 200) in kv_calculate_dfs_bypass_settings()
1797 if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk || in kv_set_valid_clock_range()
1805 if (table->entries[i].sclk_frequency <= in kv_set_valid_clock_range()
1813 table->entries[pi->highest_valid].sclk_frequency) > in kv_set_valid_clock_range()
[all …]
Dkv_dpm.h48 u32 sclk_frequency; member
/drivers/gpu/drm/amd/powerplay/smumgr/
Dpolaris10_smc.c988 uint32_t sclk_frequency; in polaris10_populate_smc_acpi_level() local
1000 sclk_frequency = data->vbios_boot_state.sclk_bootup_value; in polaris10_populate_smc_acpi_level()
1003 sclk_frequency, in polaris10_populate_smc_acpi_level()
1010 result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency, &(table->ACPILevel.SclkSetting)); in polaris10_populate_smc_acpi_level()