Home
last modified time | relevance | path

Searched refs:timers (Results 1 – 24 of 24) sorted by relevance

/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/
Dgp_timer_defs.h23 #define HIVE_GP_TIMER_VALUE_REG_IDX(timer,timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(timer… argument
24 …define HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer,timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers argument
25 …ne HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer,timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer… argument
26 … HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq,timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(time… argument
27 …HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(i… argument
28 …ine HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_ID… argument
/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/
Dgp_timer_defs.h23 #define HIVE_GP_TIMER_VALUE_REG_IDX(timer,timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(timer… argument
24 …define HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer,timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers argument
25 …ne HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer,timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer… argument
26 … HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq,timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(time… argument
27 …HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(i… argument
28 …ine HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_ID… argument
/drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/
Dgp_timer_defs.h23 #define HIVE_GP_TIMER_VALUE_REG_IDX(timer,timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(timer… argument
24 …define HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer,timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers argument
25 …ne HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer,timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer… argument
26 … HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq,timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(time… argument
27 …HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(i… argument
28 …ine HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq,timers,irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_ID… argument
/drivers/clocksource/
Dbcm_kona_timer.c42 static struct kona_bcm_timers timers; variable
118 ret = kona_timer_get_counter(timers.tmr_regs, &msw, &lsw); in kona_timer_set_next_event()
123 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET); in kona_timer_set_next_event()
126 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
128 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
135 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_shutdown()
158 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_interrupt()
187 timers.tmr_irq = irq_of_parse_and_map(node, 0); in kona_timer_init()
190 timers.tmr_regs = of_iomap(node, 0); in kona_timer_init()
192 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_init()
[all …]
Dtimer-probe.c32 unsigned timers = 0; in timer_probe() local
47 timers++; in timer_probe()
50 timers += acpi_probe_device_table(timer); in timer_probe()
52 if (!timers) in timer_probe()
Darm_arch_timer.c1420 struct arch_timer_mem *timers, *timer; in arch_timer_mem_acpi_init() local
1424 timers = kcalloc(platform_timer_count, sizeof(*timers), in arch_timer_mem_acpi_init()
1426 if (!timers) in arch_timer_mem_acpi_init()
1429 ret = acpi_arch_timer_mem_init(timers, &timer_count); in arch_timer_mem_acpi_init()
1438 timer = &timers[i]; in arch_timer_mem_acpi_init()
1462 kfree(timers); in arch_timer_mem_acpi_init()
DKconfig251 Support to use the timers of EFM32 SoCs as clock source and clock
314 This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP)
419 This option enables support for the Meta per-thread timers.
457 This enables support for the Oxford Semiconductor OXNAS RPS timers.
/drivers/leds/
Dleds-netxbig.c389 struct netxbig_led_timer *timers; in netxbig_leds_get_of_pdata() local
418 timers = devm_kzalloc(dev, num_timers * sizeof(*timers), in netxbig_leds_get_of_pdata()
420 if (!timers) in netxbig_leds_get_of_pdata()
426 &timers[i].mode); in netxbig_leds_get_of_pdata()
427 if (timers[i].mode >= NETXBIG_LED_MODE_NUM) in netxbig_leds_get_of_pdata()
431 timers[i].delay_on = tmp; in netxbig_leds_get_of_pdata()
434 timers[i].delay_off = tmp; in netxbig_leds_get_of_pdata()
436 pdata->timer = timers; in netxbig_leds_get_of_pdata()
/drivers/misc/
Dcs5535-mfgpt.c294 int timers = 0; in scan_timers() local
311 timers++; in scan_timers()
316 return timers; in scan_timers()
DKconfig234 drivers that need timers. MFGPTs are available in the CS5535 and
237 than the generic PIT, and are suitable for use as high-res timers.
259 generic PIT, and are suitable for use as high-res timers.
/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dmac80211_if.c319 for (t = wl->timers; t; t = next) { in brcms_free()
1501 t->next = wl->timers; in brcms_init_timer()
1502 wl->timers = t; in brcms_init_timer()
1566 if (wl->timers == t) { in brcms_free_timer()
1567 wl->timers = wl->timers->next; in brcms_free_timer()
1576 tmp = wl->timers; in brcms_free_timer()
Dmac80211_if.h78 struct brcms_timer *timers; /* timer cleanup queue */ member
/drivers/iio/trigger/
DKconfig13 timers as interrupt source.
/drivers/isdn/hardware/mISDN/
Dhfcsusb.c644 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
651 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
654 hw->timers |= NT_ACTIVATION_TIMER; in ph_state_nt()
662 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
670 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
1366 && (hw->timers & NT_ACTIVATION_TIMER)) { in tx_iso_complete()
Dhfcsusb.h304 __u8 timers; member
/drivers/net/wireless/ath/ath9k/
Dhw.c3118 timer_table->timers[timer_index] = timer; in ath_gen_timer_alloc()
3220 timer_table->timers[timer->index] = NULL; in ath_gen_timer_free()
3241 for_each_set_bit(index, &thresh_mask, ARRAY_SIZE(timer_table->timers)) { in ath_gen_timer_isr()
3242 timer = timer_table->timers[index]; in ath_gen_timer_isr()
3252 for_each_set_bit(index, &trigger_mask, ARRAY_SIZE(timer_table->timers)) { in ath_gen_timer_isr()
3253 timer = timer_table->timers[index]; in ath_gen_timer_isr()
Dhw.h555 struct ath_gen_timer *timers[ATH_MAX_GEN_TIMER]; member
/drivers/mfd/
DMakefile228 obj-$(CONFIG_MFD_STM32_TIMERS) += stm32-timers.o
DKconfig1780 Select this option to enable STM32 timers driver used
/drivers/net/ethernet/chelsio/cxgb3/
Dt3_hw.c2608 unsigned int timers = 0, timers_shift = 22; in partition_mem() local
2612 timers = 1; in partition_mem()
2615 timers = 2; in partition_mem()
2618 timers = 3; in partition_mem()
2645 t3_write_reg(adap, A_TP_CMM_TIMER_BASE, V_CMTIMERMAXNUM(timers) | m); in partition_mem()
/drivers/char/
DKconfig515 open selects one of the timers supported by the HPET. The timers are
/drivers/net/ethernet/intel/i40e/
Di40e_type.h1415 u16 timers; member
/drivers/media/rc/
DKconfig375 The driver uses omap DM timers for generating the carrier
/drivers/watchdog/
DKconfig1491 SoC processors. There are apparently two watchdog timers
1787 This is the driver for the hardware watchdog timers present on