| /drivers/gpu/drm/radeon/ |
| D | btc_dpm.c | 1309 u16 *vddc, u16 *vddci) in btc_apply_voltage_delta_rules() argument
1314 if ((0 == *vddc) || (0 == *vddci)) in btc_apply_voltage_delta_rules()
1317 if (*vddc > *vddci) { in btc_apply_voltage_delta_rules()
1318 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1321 *vddci = (new_voltage < max_vddci) ? new_voltage : max_vddci; in btc_apply_voltage_delta_rules()
1324 if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1326 (*vddci - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
1800 if (state->low.vddci != ulv_pl->vddci) in btc_is_state_ulv_compatible()
2101 u16 vddc, vddci; in btc_apply_state_adjust_rules() local
2121 if (ps->high.vddci > max_limits->vddci) in btc_apply_state_adjust_rules()
[all …]
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| D | ni_dpm.c | 792 u16 vddci; in ni_apply_state_adjust_rules() local
814 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()
815 ps->performance_levels[i].vddci = max_limits->vddci; in ni_apply_state_adjust_rules()
825 ps->performance_levels[0].vddci = in ni_apply_state_adjust_rules()
826 ps->performance_levels[ps->performance_level_count - 1].vddci; in ni_apply_state_adjust_rules()
843 vddci = ps->performance_levels[0].vddci; in ni_apply_state_adjust_rules()
847 if (vddci < ps->performance_levels[i].vddci) in ni_apply_state_adjust_rules()
848 vddci = ps->performance_levels[i].vddci; in ni_apply_state_adjust_rules()
852 ps->performance_levels[i].vddci = vddci; in ni_apply_state_adjust_rules()
858 if (ps->performance_levels[i].vddci < ps->performance_levels[i - 1].vddci) in ni_apply_state_adjust_rules()
[all …]
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| D | si_dpm.c | 2974 u16 vddc, vddci, min_vce_voltage = 0; in si_apply_state_adjust_rules() local
3041 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()
3042 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
3081 vddci = ps->performance_levels[ps->performance_level_count - 1].vddci; in si_apply_state_adjust_rules()
3084 vddci = ps->performance_levels[0].vddci; in si_apply_state_adjust_rules()
3106 ps->performance_levels[0].vddci = vddci; in si_apply_state_adjust_rules()
3135 ps->performance_levels[i].vddci = vddci; in si_apply_state_adjust_rules()
3141 if (ps->performance_levels[i].vddci < ps->performance_levels[i - 1].vddci) in si_apply_state_adjust_rules()
3142 ps->performance_levels[i].vddci = ps->performance_levels[i - 1].vddci; in si_apply_state_adjust_rules()
3158 max_limits->vddci, &ps->performance_levels[i].vddci); in si_apply_state_adjust_rules()
[all …]
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| D | btc_dpm.h | 53 u16 *vddc, u16 *vddci);
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| D | rv770_dpm.c | 2204 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI); in rv7xx_parse_pplib_clock_info()
2228 eg_pi->acpi_vddci = pl->vddci; in rv7xx_parse_pplib_clock_info()
2250 u16 vddc, vddci, mvdd; in rv7xx_parse_pplib_clock_info() local
2251 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in rv7xx_parse_pplib_clock_info()
2255 pl->vddci = vddci; in rv7xx_parse_pplib_clock_info()
2263 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; in rv7xx_parse_pplib_clock_info()
2444 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2447 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2450 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2487 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_debugfs_print_current_performance_level()
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| D | rv770_smc.h | 112 RV770_SMC_VOLTAGE_VALUE vddci; member
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| D | nislands_smc.h | 112 NISLANDS_SMC_VOLTAGE_VALUE vddci; member
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| D | radeon_atombios.c | 2371 u16 *vddc, u16 *vddci, u16 *mvdd) in radeon_atombios_get_default_voltages() argument
2380 *vddci = 0; in radeon_atombios_get_default_voltages()
2390 *vddci = le16_to_cpu(firmware_info->info_22.usBootUpVDDCIVoltage); in radeon_atombios_get_default_voltages()
2403 u16 vddc, vddci, mvdd; in radeon_atombios_parse_pplib_non_clock_info() local
2405 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in radeon_atombios_parse_pplib_non_clock_info()
2446 rdev->pm.default_vddci = rdev->pm.power_state[state_index].clock_info[0].voltage.vddci; in radeon_atombios_parse_pplib_non_clock_info()
2464 rdev->pm.power_state[state_index].clock_info[j].voltage.vddci = in radeon_atombios_parse_pplib_non_clock_info()
2508 rdev->pm.power_state[state_index].clock_info[mode_index].voltage.vddci = in radeon_atombios_parse_pplib_clock_info()
2521 rdev->pm.power_state[state_index].clock_info[mode_index].voltage.vddci = in radeon_atombios_parse_pplib_clock_info()
3208 u16 *vddc, u16 *vddci, in radeon_atom_get_leakage_vddc_based_on_leakage_params() argument
[all …]
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| D | rv770_dpm.h | 145 u16 vddci; /* eg+ only */ member
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| D | sislands_smc.h | 157 SISLANDS_SMC_VOLTAGE_VALUE vddci; member
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| D | cypress_dpm.c | 751 pl->vddci, in cypress_convert_power_level_to_smc()
752 &level->vddci); in cypress_convert_power_level_to_smc()
1290 initial_state->low.vddci, in cypress_populate_smc_initial_state()
1291 &table->initialState.levels[0].vddci); in cypress_populate_smc_initial_state()
1387 &table->ACPIState.levels[0].vddci); in cypress_populate_smc_acpi_state()
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| /drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | polaris10_smc.c | 82 uint16_t vddci; in polaris10_get_dependency_volt_by_clk() local
99 else if (dep_table->entries[i].vddci) in polaris10_get_dependency_volt_by_clk()
100 *voltage |= (dep_table->entries[i].vddci * in polaris10_get_dependency_volt_by_clk()
103 vddci = phm_find_closest_vddci(&(data->vddci_voltage_table), in polaris10_get_dependency_volt_by_clk()
106 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; in polaris10_get_dependency_volt_by_clk()
127 else if (dep_table->entries[i-1].vddci) { in polaris10_get_dependency_volt_by_clk()
128 vddci = phm_find_closest_vddci(&(data->vddci_voltage_table), in polaris10_get_dependency_volt_by_clk()
131 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; in polaris10_get_dependency_volt_by_clk()
1088 uint32_t vddci; in polaris10_populate_smc_vce_level() local
1100 vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table), in polaris10_populate_smc_vce_level()
[all …]
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| D | fiji_smc.c | 89 uint16_t vddci; in fiji_get_dependency_volt_by_clk() local
106 else if (dep_table->entries[i].vddci) in fiji_get_dependency_volt_by_clk()
107 *voltage |= (dep_table->entries[i].vddci * in fiji_get_dependency_volt_by_clk()
110 vddci = phm_find_closest_vddci(&(data->vddci_voltage_table), in fiji_get_dependency_volt_by_clk()
113 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; in fiji_get_dependency_volt_by_clk()
134 else if (dep_table->entries[i-1].vddci) { in fiji_get_dependency_volt_by_clk()
135 vddci = phm_find_closest_vddci(&(data->vddci_voltage_table), in fiji_get_dependency_volt_by_clk()
138 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; in fiji_get_dependency_volt_by_clk()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_atombios.h | 175 u16 *vddc, u16 *vddci,
212 u16 *vddc, u16 *vddci, u16 *mvdd);
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| D | si_dpm.c | 3313 u16 *vddc, u16 *vddci) in btc_apply_voltage_delta_rules() argument
3318 if ((0 == *vddc) || (0 == *vddci)) in btc_apply_voltage_delta_rules()
3321 if (*vddc > *vddci) { in btc_apply_voltage_delta_rules()
3322 if ((*vddc - *vddci) > adev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
3325 *vddci = (new_voltage < max_vddci) ? new_voltage : max_vddci; in btc_apply_voltage_delta_rules()
3328 if ((*vddci - *vddc) > adev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
3330 (*vddci - adev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
3432 u16 vddc, vddci, min_vce_voltage = 0; in si_apply_state_adjust_rules() local
3499 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()
3500 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
[all …]
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| D | si_dpm.h | 443 RV770_SMC_VOLTAGE_VALUE vddci; member
602 u16 vddci; /* eg+ only */ member
763 NISLANDS_SMC_VOLTAGE_VALUE vddci; member
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| D | amdgpu_atombios.c | 1155 u16 *vddc, u16 *vddci, u16 *mvdd) in amdgpu_atombios_get_default_voltages() argument
1164 *vddci = 0; in amdgpu_atombios_get_default_voltages()
1174 *vddci = le16_to_cpu(firmware_info->info_22.usBootUpVDDCIVoltage); in amdgpu_atombios_get_default_voltages()
1263 u16 *vddc, u16 *vddci, in amdgpu_atombios_get_leakage_vddc_based_on_leakage_params() argument
1275 *vddci = 0; in amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
1326 *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i]; in amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
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| D | sislands_smc.h | 157 SISLANDS_SMC_VOLTAGE_VALUE vddci; member
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| /drivers/gpu/drm/amd/powerplay/hwmgr/ |
| D | hwmgr_ppt.h | 39 uint16_t vddci; member
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| D | hwmgr.c | 414 vol_table->entries[i].value = dep_table->entries[i].vddci; in phm_get_svi2_vddci_voltage_table()
551 uint16_t phm_find_closest_vddci(struct pp_atomctrl_voltage_table *vddci_table, uint16_t vddci) in phm_find_closest_vddci() argument
556 if (vddci_table->entries[i].value >= vddci) in phm_find_closest_vddci()
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| D | process_pptables_v1_0.c | 365 limits->vddci = (uint16_t)limitable->entries[0].usVddciLimit; in get_hard_limits()
406 mclk_table_record->vddci = mclk_dep_record->usVddci; in get_mclk_voltage_dependency_table()
822 hwmgr->dyn_state.max_clock_voltage_on_dc.vddci = in init_clock_voltage_dependency()
823 pp_table_information->max_clock_voltage_on_dc.vddci; in init_clock_voltage_dependency()
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| D | smu7_hwmgr.c | 1880 table_info->max_clock_voltage_on_ac.vddci = in smu7_set_private_data_based_on_pptable_v1()
1881 allowed_mclk_vdd_table->entries[allowed_mclk_vdd_table->count - 1].vddci; in smu7_set_private_data_based_on_pptable_v1()
1886 hwmgr->dyn_state.max_clock_voltage_on_ac.vddci = table_info->max_clock_voltage_on_ac.vddci; in smu7_set_private_data_based_on_pptable_v1()
2154 uint32_t vddc, vddci; in smu7_patch_limits_vddc() local
2162 vddci = tab->vddci; in smu7_patch_limits_vddc()
2163 smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &vddci, in smu7_patch_limits_vddc()
2165 tab->vddci = vddci; in smu7_patch_limits_vddc()
2278 …hwmgr->dyn_state.max_clock_voltage_on_ac.vddci = hwmgr->dyn_state.vddci_dependency_on_mclk->entrie… in smu7_set_private_data_based_on_pptable_v0()
3079 if (dep_mclk_table->entries[0].vddci != in smu7_get_pp_table_entry_v1()
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| D | vega10_hwmgr.h | 184 uint16_t vddci; member
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| /drivers/gpu/drm/amd/powerplay/inc/ |
| D | hardwaremanager.h | 259 uint32_t vddci; member
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| D | hwmgr.h | 538 uint16_t vddci; member
824 …ern uint16_t phm_find_closest_vddci(struct pp_atomctrl_voltage_table *vddci_table, uint16_t vddci);
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