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Searched refs:workarounds (Results 1 – 5 of 5) sorted by relevance

/drivers/firewire/
Dsbp2.c115 module_param_named(workarounds, sbp2_param_workarounds, int, 0644);
116 MODULE_PARM_DESC(workarounds, "Work around device bugs (default = 0"
173 unsigned int workarounds; member
345 unsigned int workarounds; member
350 .workarounds = SBP2_WORKAROUND_INQUIRY_36 |
357 .workarounds = SBP2_WORKAROUND_POWER_CONDITION,
362 .workarounds = SBP2_WORKAROUND_INQUIRY_36,
367 .workarounds = SBP2_WORKAROUND_POWER_CONDITION,
372 .workarounds = SBP2_WORKAROUND_128K_MAX_TRANS,
377 .workarounds = SBP2_WORKAROUND_128K_MAX_TRANS,
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/drivers/gpu/drm/i915/
Dintel_engine_cs.c646 const u32 idx = dev_priv->workarounds.count; in wa_add()
651 dev_priv->workarounds.reg[idx].addr = addr; in wa_add()
652 dev_priv->workarounds.reg[idx].value = val; in wa_add()
653 dev_priv->workarounds.reg[idx].mask = mask; in wa_add()
655 dev_priv->workarounds.count++; in wa_add()
684 struct i915_workarounds *wa = &dev_priv->workarounds; in wa_ring_whitelist_reg()
1183 dev_priv->workarounds.count = 0; in init_workarounds_ring()
1184 dev_priv->workarounds.hw_whitelist_count[engine->id] = 0; in init_workarounds_ring()
1206 engine->name, dev_priv->workarounds.count); in init_workarounds_ring()
1212 struct i915_workarounds *w = &req->i915->workarounds; in intel_ring_workarounds_emit()
Di915_debugfs.c3493 struct i915_workarounds *workarounds = &dev_priv->workarounds; in i915_wa_registers() local
3502 seq_printf(m, "Workarounds applied: %d\n", workarounds->count); in i915_wa_registers()
3505 engine->name, workarounds->hw_whitelist_count[id]); in i915_wa_registers()
3506 for (i = 0; i < workarounds->count; ++i) { in i915_wa_registers()
3511 addr = workarounds->reg[i].addr; in i915_wa_registers()
3512 mask = workarounds->reg[i].mask; in i915_wa_registers()
3513 value = workarounds->reg[i].value; in i915_wa_registers()
Di915_drv.h2331 struct i915_workarounds workarounds; member
/drivers/usb/phy/
DKconfig156 handles PHY initialization, clock management, and workarounds
172 and workarounds required after resetting the hardware.