Searched refs:clocks (Results 1 – 10 of 10) sorted by relevance
| /sound/soc/mediatek/mt2701/ |
| D | mt2701-afe-clock-ctrl.c | 77 afe_priv->clocks[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt2701_init_clock()
78 if (IS_ERR(afe_priv->clocks[i])) { in mt2701_init_clock()
149 ret = clk_prepare_enable(afe_priv->clocks[MT2701_AUD_AUD_MUX1_SEL]); in mt2701_turn_on_a1sys_clock()
156 ret = clk_set_parent(afe_priv->clocks[MT2701_AUD_AUD_MUX1_SEL], in mt2701_turn_on_a1sys_clock()
157 afe_priv->clocks[MT2701_AUD_AUD1PLL_98M]); in mt2701_turn_on_a1sys_clock()
166 ret = clk_prepare_enable(afe_priv->clocks[MT2701_AUD_AUD_MUX1_DIV]); in mt2701_turn_on_a1sys_clock()
175 ret = clk_set_rate(afe_priv->clocks[MT2701_AUD_AUD_MUX1_DIV], in mt2701_turn_on_a1sys_clock()
185 ret = clk_prepare_enable(afe_priv->clocks[MT2701_AUD_AUD_48K_TIMING]); in mt2701_turn_on_a1sys_clock()
193 ret = clk_prepare_enable(afe_priv->clocks[MT2701_AUD_INFRA_SYS_AUDIO]); in mt2701_turn_on_a1sys_clock()
203 clk_disable_unprepare(afe_priv->clocks[MT2701_AUD_INFRA_SYS_AUDIO]); in mt2701_turn_on_a1sys_clock()
[all …]
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| D | mt2701-afe-common.h | 167 struct clk *clocks[MT2701_CLOCK_NUM]; member
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| D | mt2701-afe-pcm.c | 109 ret = clk_prepare_enable(afe_priv->clocks[clk_num]); in mt2701_afe_i2s_startup()
188 clk_disable_unprepare(afe_priv->clocks[clk_num]); in mt2701_afe_i2s_shutdown()
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| /sound/soc/mediatek/mt8173/ |
| D | mt8173-afe-pcm.c | 158 struct clk *clocks[MT8173_CLK_NUM]; member
341 mt8173_afe_dais_set_clks(afe, afe_priv->clocks[MT8173_CLK_I2S1_M], in mt8173_afe_i2s_prepare()
343 mt8173_afe_dais_set_clks(afe, afe_priv->clocks[MT8173_CLK_I2S2_M], in mt8173_afe_i2s_prepare()
365 mt8173_afe_dais_enable_clks(afe, afe_priv->clocks[MT8173_CLK_I2S3_M], in mt8173_afe_hdmi_startup()
366 afe_priv->clocks[MT8173_CLK_I2S3_B]); in mt8173_afe_hdmi_startup()
380 mt8173_afe_dais_disable_clks(afe, afe_priv->clocks[MT8173_CLK_I2S3_M], in mt8173_afe_hdmi_shutdown()
381 afe_priv->clocks[MT8173_CLK_I2S3_B]); in mt8173_afe_hdmi_shutdown()
394 mt8173_afe_dais_set_clks(afe, afe_priv->clocks[MT8173_CLK_I2S3_M], in mt8173_afe_hdmi_prepare()
396 afe_priv->clocks[MT8173_CLK_I2S3_B], in mt8173_afe_hdmi_prepare()
994 clk_disable_unprepare(afe_priv->clocks[MT8173_CLK_I2S1_M]); in mt8173_afe_runtime_suspend()
[all …]
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| /sound/soc/hisilicon/ |
| D | hi6210-i2s.c | 47 int clocks; member
112 for (n = 0; n < i2s->clocks; n++) { in hi6210_i2s_startup()
185 for (n = 0; n < i2s->clocks; n++) in hi6210_i2s_shutdown()
584 i2s->clocks++; in hi6210_i2s_probe()
589 i2s->clocks++; in hi6210_i2s_probe()
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| /sound/isa/es1688/ |
| D | es1688_lib.c | 293 static const struct snd_ratnum clocks[2] = { variable
310 .rats = clocks,
318 if (runtime->rate_num == clocks[0].num) in snd_es1688_set_rate()
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| /sound/pci/echoaudio/ |
| D | echoaudio.c | 1782 int detected, clocks, bit, src; in snd_echo_channels_info_get() local
1793 clocks = 0; in snd_echo_channels_info_get()
1799 clocks |= 1 << src; in snd_echo_channels_info_get()
1802 ucontrol->value.integer.value[5] = clocks; in snd_echo_channels_info_get()
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| /sound/pci/ |
| D | es1938.c | 439 static const struct snd_ratnum clocks[2] = { variable
456 .rats = clocks,
466 if (runtime->rate_num == clocks[0].num) in snd_es1938_rate_set()
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| /sound/isa/cs423x/ |
| D | cs4236_lib.c | 141 static const struct snd_ratnum clocks[CLOCKS] = { variable
154 .rats = clocks,
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| /sound/oss/ |
| D | mpu401.c | 1240 static unsigned long clocks2ticks(unsigned long clocks) in clocks2ticks() argument
1248 return ((clocks * curr_timebase) + (hw_timebase / 2)) / hw_timebase; in clocks2ticks()
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