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Searched refs:regs (Results 1 – 25 of 70) sorted by relevance

123

/sound/soc/samsung/
Ds3c24xx-i2s.c44 void __iomem *regs; member
59 iisfcon = readl(s3c24xx_i2s.regs + S3C2410_IISFCON); in s3c24xx_snd_txctrl()
60 iiscon = readl(s3c24xx_i2s.regs + S3C2410_IISCON); in s3c24xx_snd_txctrl()
61 iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD); in s3c24xx_snd_txctrl()
71 writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD); in s3c24xx_snd_txctrl()
72 writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON); in s3c24xx_snd_txctrl()
73 writel(iiscon, s3c24xx_i2s.regs + S3C2410_IISCON); in s3c24xx_snd_txctrl()
88 writel(iiscon, s3c24xx_i2s.regs + S3C2410_IISCON); in s3c24xx_snd_txctrl()
89 writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON); in s3c24xx_snd_txctrl()
90 writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD); in s3c24xx_snd_txctrl()
[all …]
Ds3c-i2s-v2.c78 void __iomem *regs = i2s->regs; in s3c2412_snd_txctrl() local
83 fic = readl(regs + S3C2412_IISFIC); in s3c2412_snd_txctrl()
84 con = readl(regs + S3C2412_IISCON); in s3c2412_snd_txctrl()
85 mod = readl(regs + S3C2412_IISMOD); in s3c2412_snd_txctrl()
111 writel(con, regs + S3C2412_IISCON); in s3c2412_snd_txctrl()
112 writel(mod, regs + S3C2412_IISMOD); in s3c2412_snd_txctrl()
140 writel(mod, regs + S3C2412_IISMOD); in s3c2412_snd_txctrl()
141 writel(con, regs + S3C2412_IISCON); in s3c2412_snd_txctrl()
144 fic = readl(regs + S3C2412_IISFIC); in s3c2412_snd_txctrl()
151 void __iomem *regs = i2s->regs; in s3c2412_snd_rxctrl() local
[all …]
Dspdif.c86 void __iomem *regs; member
106 void __iomem *regs = spdif->regs; in spdif_snd_txctrl() local
111 clkcon = readl(regs + CLKCON) & CLKCTL_MASK; in spdif_snd_txctrl()
113 writel(clkcon | CLKCTL_PWR_ON, regs + CLKCON); in spdif_snd_txctrl()
115 writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON); in spdif_snd_txctrl()
126 clkcon = readl(spdif->regs + CLKCON); in spdif_set_sysclk()
133 writel(clkcon, spdif->regs + CLKCON); in spdif_set_sysclk()
181 void __iomem *regs = spdif->regs; in spdif_hw_params() local
200 con = readl(regs + CON) & CON_MASK; in spdif_hw_params()
201 cstas = readl(regs + CSTAS) & CSTAS_MASK; in spdif_hw_params()
[all …]
Dpcm.c120 void __iomem *regs; member
156 void __iomem *regs = pcm->regs; in s3c_pcm_snd_txctrl() local
159 clkctl = readl(regs + S3C_PCM_CLKCTL); in s3c_pcm_snd_txctrl()
160 ctl = readl(regs + S3C_PCM_CTL); in s3c_pcm_snd_txctrl()
181 writel(clkctl, regs + S3C_PCM_CLKCTL); in s3c_pcm_snd_txctrl()
182 writel(ctl, regs + S3C_PCM_CTL); in s3c_pcm_snd_txctrl()
187 void __iomem *regs = pcm->regs; in s3c_pcm_snd_rxctrl() local
190 ctl = readl(regs + S3C_PCM_CTL); in s3c_pcm_snd_rxctrl()
191 clkctl = readl(regs + S3C_PCM_CLKCTL); in s3c_pcm_snd_rxctrl()
212 writel(clkctl, regs + S3C_PCM_CLKCTL); in s3c_pcm_snd_rxctrl()
[all …]
Didma.c58 void __iomem *regs; member
67 (readl(idma.regs + I2STRNCNT) & 0xffffff) * 4; in idma_getpos()
82 writel(val, idma.regs + I2SLVL0ADDR); in idma_enqueue()
86 writel(val, idma.regs + I2SSTR0); in idma_enqueue()
92 val = readl(idma.regs + I2SSIZE); in idma_enqueue()
96 writel(val, idma.regs + I2SSIZE); in idma_enqueue()
98 val = readl(idma.regs + I2SAHB); in idma_enqueue()
100 writel(val, idma.regs + I2SAHB); in idma_enqueue()
117 u32 val = readl(idma.regs + I2SAHB); in idma_control()
133 writel(val, idma.regs + I2SAHB); in idma_control()
[all …]
Ds3c2412-i2s.c108 iismod = readl(i2s->regs + S3C2412_IISMOD); in s3c2412_i2s_hw_params()
120 writel(iismod, i2s->regs + S3C2412_IISMOD); in s3c2412_i2s_hw_params()
169 s3c2412_i2s.regs = devm_ioremap_resource(&pdev->dev, res); in s3c2412_iis_dev_probe()
170 if (IS_ERR(s3c2412_i2s.regs)) in s3c2412_iis_dev_probe()
171 return PTR_ERR(s3c2412_i2s.regs); in s3c2412_iis_dev_probe()
/sound/soc/omap/
Domap-mcbsp.c257 struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; in omap_mcbsp_dai_hw_params() local
326 regs->rcr2 &= ~(RPHASE | RFRLEN2(0x7f) | RWDLEN2(7)); in omap_mcbsp_dai_hw_params()
327 regs->xcr2 &= ~(RPHASE | XFRLEN2(0x7f) | XWDLEN2(7)); in omap_mcbsp_dai_hw_params()
328 regs->rcr1 &= ~(RFRLEN1(0x7f) | RWDLEN1(7)); in omap_mcbsp_dai_hw_params()
329 regs->xcr1 &= ~(XFRLEN1(0x7f) | XWDLEN1(7)); in omap_mcbsp_dai_hw_params()
335 regs->rcr2 |= RPHASE; in omap_mcbsp_dai_hw_params()
336 regs->xcr2 |= XPHASE; in omap_mcbsp_dai_hw_params()
339 regs->rcr2 |= RFRLEN2(wpf - 1); in omap_mcbsp_dai_hw_params()
340 regs->xcr2 |= XFRLEN2(wpf - 1); in omap_mcbsp_dai_hw_params()
343 regs->rcr1 |= RFRLEN1(wpf - 1); in omap_mcbsp_dai_hw_params()
[all …]
/sound/soc/fsl/
Dfsl_ssi.c226 struct regmap *regs; member
355 struct regmap *regs = ssi_private->regs; in fsl_ssi_isr() local
363 regmap_read(regs, CCSR_SSI_SISR, &sisr); in fsl_ssi_isr()
368 regmap_write(regs, CCSR_SSI_SISR, sisr2); in fsl_ssi_isr()
381 struct regmap *regs = ssi_private->regs; in fsl_ssi_rxtx_config() local
385 regmap_update_bits(regs, CCSR_SSI_SIER, in fsl_ssi_rxtx_config()
388 regmap_update_bits(regs, CCSR_SSI_SRCR, in fsl_ssi_rxtx_config()
391 regmap_update_bits(regs, CCSR_SSI_STCR, in fsl_ssi_rxtx_config()
395 regmap_update_bits(regs, CCSR_SSI_SRCR, in fsl_ssi_rxtx_config()
397 regmap_update_bits(regs, CCSR_SSI_STCR, in fsl_ssi_rxtx_config()
[all …]
Dmpc5200_psc_ac97.c102 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; in psc_ac97_warm_reset() local
106 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); in psc_ac97_warm_reset()
108 out_be32(&regs->sicr, psc_dma->sicr); in psc_ac97_warm_reset()
115 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; in psc_ac97_cold_reset() local
123 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB); in psc_ac97_cold_reset()
126 out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); in psc_ac97_cold_reset()
211 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; in psc_ac97_probe() local
214 out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); in psc_ac97_probe()
285 struct mpc52xx_psc __iomem *regs; in psc_ac97_of_probe() local
305 regs = psc_dma->psc_regs; in psc_ac97_of_probe()
[all …]
Dimx-pcm-fiq.c54 struct pt_regs regs; in snd_hrtimer_callback() local
59 get_fiq_regs(&regs); in snd_hrtimer_callback()
62 iprtd->offset = regs.ARM_r8 & 0xffff; in snd_hrtimer_callback()
64 iprtd->offset = regs.ARM_r9 & 0xffff; in snd_hrtimer_callback()
97 struct pt_regs regs; in snd_imx_pcm_prepare() local
99 get_fiq_regs(&regs); in snd_imx_pcm_prepare()
101 regs.ARM_r8 = (iprtd->period * iprtd->periods - 1) << 16; in snd_imx_pcm_prepare()
103 regs.ARM_r9 = (iprtd->period * iprtd->periods - 1) << 16; in snd_imx_pcm_prepare()
105 set_fiq_regs(&regs); in snd_imx_pcm_prepare()
Dmpc5200_dma.c31 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; in psc_dma_status_irq() local
34 isr = in_be16(&regs->mpc52xx_psc_isr); in psc_dma_status_irq()
44 out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT); in psc_dma_status_irq()
117 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; in psc_dma_trigger() local
152 out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT); in psc_dma_trigger()
183 out_be16(&regs->isr_imr.imr, psc_dma->imr | imr); in psc_dma_trigger()
372 void __iomem *regs; in mpc5200_audio_dma_create() local
381 regs = ioremap(res.start, resource_size(&res)); in mpc5200_audio_dma_create()
382 if (!regs) { in mpc5200_audio_dma_create()
405 psc_dma->psc_regs = regs; in mpc5200_audio_dma_create()
[all …]
/sound/soc/bcm/
Dcygnus-ssp.c261 value = readl(aio->cygaud->audio + aio->regs.i2s_stream_cfg); in audio_ssp_init_portregs()
266 aio->cygaud->audio + aio->regs.bf_sourcech_grp); in audio_ssp_init_portregs()
272 writel(value, aio->cygaud->audio + aio->regs.i2s_stream_cfg); in audio_ssp_init_portregs()
275 value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg); in audio_ssp_init_portregs()
279 writel(value, aio->cygaud->audio + aio->regs.bf_sourcech_cfg); in audio_ssp_init_portregs()
283 aio->regs.i2s_cap_stream_cfg); in audio_ssp_init_portregs()
287 aio->regs.i2s_cap_stream_cfg); in audio_ssp_init_portregs()
292 value = readl(aio->cygaud->audio + aio->regs.bf_destch_cfg); in audio_ssp_init_portregs()
297 writel(value, aio->cygaud->audio + aio->regs.bf_destch_cfg); in audio_ssp_init_portregs()
318 value = readl(aio->cygaud->audio + aio->regs.bf_sourcech_cfg); in audio_ssp_init_portregs()
[all …]
/sound/soc/blackfin/
Dbf5xx-sport.c54 if ((sport->regs->tcr1 & TSPEN) || (sport->regs->rcr1 & RSPEN)) in sport_set_multichannel()
64 sport->regs->mcmc1 = ((tdm_count>>3)-1) << 12; in sport_set_multichannel()
65 sport->regs->mcmc2 = FRAME_DELAY | MCMEN | \ in sport_set_multichannel()
68 sport->regs->mtcs0 = tx_mask; in sport_set_multichannel()
69 sport->regs->mrcs0 = rx_mask; in sport_set_multichannel()
70 sport->regs->mtcs1 = 0; in sport_set_multichannel()
71 sport->regs->mrcs1 = 0; in sport_set_multichannel()
72 sport->regs->mtcs2 = 0; in sport_set_multichannel()
73 sport->regs->mrcs2 = 0; in sport_set_multichannel()
74 sport->regs->mtcs3 = 0; in sport_set_multichannel()
[all …]
/sound/soc/atmel/
Datmel-pcm-pdc.c179 ssc_writex(params->ssc->regs, ATMEL_PDC_PTCR, in atmel_pcm_dma_irq()
185 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_dma_irq()
187 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_dma_irq()
189 ssc_writex(params->ssc->regs, ATMEL_PDC_PTCR, in atmel_pcm_dma_irq()
199 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_dma_irq()
201 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_dma_irq()
247 ssc_writex(params->ssc->regs, SSC_PDC_PTCR, in atmel_pcm_hw_free()
260 ssc_writex(params->ssc->regs, SSC_IDR, in atmel_pcm_prepare()
262 ssc_writex(params->ssc->regs, ATMEL_PDC_PTCR, in atmel_pcm_prepare()
283 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_trigger()
[all …]
Datmel_ssc_dai.c163 ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR) in atmel_ssc_interrupt()
164 & (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR); in atmel_ssc_interrupt()
295 ssc_readl(ssc_p->ssc->regs, SR)); in atmel_ssc_startup()
304 ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST)); in atmel_ssc_startup()
380 ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST)); in atmel_ssc_shutdown()
807 ssc_writel(ssc_p->ssc->regs, PDC_RPR, 0); in atmel_ssc_hw_params()
808 ssc_writel(ssc_p->ssc->regs, PDC_RCR, 0); in atmel_ssc_hw_params()
809 ssc_writel(ssc_p->ssc->regs, PDC_RNPR, 0); in atmel_ssc_hw_params()
810 ssc_writel(ssc_p->ssc->regs, PDC_RNCR, 0); in atmel_ssc_hw_params()
812 ssc_writel(ssc_p->ssc->regs, PDC_TPR, 0); in atmel_ssc_hw_params()
[all …]
/sound/pci/
Dak4531_codec.c52 idx, ak4531->regs[idx]);
96 val = (ak4531->regs[reg] >> shift) & mask; in snd_ak4531_get_single()
121 val = (ak4531->regs[reg] & ~(mask << shift)) | val; in snd_ak4531_put_single()
122 change = val != ak4531->regs[reg]; in snd_ak4531_put_single()
123 ak4531->write(ak4531, reg, ak4531->regs[reg] = val); in snd_ak4531_put_single()
165 left = (ak4531->regs[left_reg] >> left_shift) & mask; in snd_ak4531_get_double()
166 right = (ak4531->regs[right_reg] >> right_shift) & mask; in snd_ak4531_get_double()
199 left = (ak4531->regs[left_reg] & ~((mask << left_shift) | (mask << right_shift))) | left | right; in snd_ak4531_put_double()
200 change = left != ak4531->regs[left_reg]; in snd_ak4531_put_double()
201 ak4531->write(ak4531, left_reg, ak4531->regs[left_reg] = left); in snd_ak4531_put_double()
[all …]
/sound/i2c/
Dtea6330t.c53 unsigned char regs[8]; member
123 if (tea->regs[TEA6330T_SADDR_VOLUME_LEFT] != 0) { in snd_tea6330t_put_master_volume()
125 bytes[count++] = tea->regs[TEA6330T_SADDR_VOLUME_LEFT] = tea->mleft; in snd_tea6330t_put_master_volume()
127 if (tea->regs[TEA6330T_SADDR_VOLUME_RIGHT] != 0) { in snd_tea6330t_put_master_volume()
130 bytes[count++] = tea->regs[TEA6330T_SADDR_VOLUME_RIGHT] = tea->mright; in snd_tea6330t_put_master_volume()
153 ucontrol->value.integer.value[0] = tea->regs[TEA6330T_SADDR_VOLUME_LEFT] == 0 ? 0 : 1; in snd_tea6330t_get_master_switch()
154 ucontrol->value.integer.value[1] = tea->regs[TEA6330T_SADDR_VOLUME_RIGHT] == 0 ? 0 : 1; in snd_tea6330t_get_master_switch()
170 oval1 = tea->regs[TEA6330T_SADDR_VOLUME_LEFT] == 0 ? 0 : 1; in snd_tea6330t_put_master_switch()
171 oval2 = tea->regs[TEA6330T_SADDR_VOLUME_RIGHT] == 0 ? 0 : 1; in snd_tea6330t_put_master_switch()
173 tea->regs[TEA6330T_SADDR_VOLUME_LEFT] = val1 ? tea->mleft : 0; in snd_tea6330t_put_master_switch()
[all …]
/sound/mips/
Dhal2.c100 #define H2_INDIRECT_WAIT(regs) while (hal2_read(&regs->isr) & H2_ISR_TSTATUS); argument
119 struct hal2_ctl_regs *regs = hal2->ctl_regs; in hal2_i_read32() local
121 hal2_write(H2_READ_ADDR(addr), &regs->iar); in hal2_i_read32()
122 H2_INDIRECT_WAIT(regs); in hal2_i_read32()
123 ret = hal2_read(&regs->idr0) & 0xffff; in hal2_i_read32()
124 hal2_write(H2_READ_ADDR(addr) | 0x1, &regs->iar); in hal2_i_read32()
125 H2_INDIRECT_WAIT(regs); in hal2_i_read32()
126 ret |= (hal2_read(&regs->idr0) & 0xffff) << 16; in hal2_i_read32()
132 struct hal2_ctl_regs *regs = hal2->ctl_regs; in hal2_i_write16() local
134 hal2_write(val, &regs->idr0); in hal2_i_write16()
[all …]
/sound/soc/codecs/
Dadau-utils.c17 uint8_t regs[5]) in adau_calc_pll_cfg()
47 regs[0] = m >> 8; in adau_calc_pll_cfg()
48 regs[1] = m & 0xff; in adau_calc_pll_cfg()
49 regs[2] = n >> 8; in adau_calc_pll_cfg()
50 regs[3] = n & 0xff; in adau_calc_pll_cfg()
51 regs[4] = (r << 3) | (div << 1); in adau_calc_pll_cfg()
53 regs[4] |= 1; /* Fractional mode */ in adau_calc_pll_cfg()
/sound/sparc/
Damd7930.c317 void __iomem *regs; member
352 sbus_writeb(AMR_INIT, amd->regs + AMD7930_CR); in amd7930_idle()
353 sbus_writeb(0, amd->regs + AMD7930_DR); in amd7930_idle()
363 sbus_writeb(AMR_INIT, amd->regs + AMD7930_CR); in amd7930_enable_ints()
364 sbus_writeb(AM_INIT_ACTIVE, amd->regs + AMD7930_DR); in amd7930_enable_ints()
374 sbus_writeb(AMR_INIT, amd->regs + AMD7930_CR); in amd7930_disable_ints()
375 sbus_writeb(AM_INIT_ACTIVE | AM_INIT_DISABLE_INTS, amd->regs + AMD7930_DR); in amd7930_disable_ints()
386 sbus_writeb(AMR_MAP_GX, amd->regs + AMD7930_CR); in __amd7930_write_map()
387 sbus_writeb(((map->gx >> 0) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
388 sbus_writeb(((map->gx >> 8) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
[all …]
Ddbri.c309 void __iomem *regs; /* dbri HW regs */ member
641 while ((--maxloops) > 0 && (sbus_readl(dbri->regs + REG0) & D_P)) { in dbri_cmdwait()
667 else if (len < sbus_readl(dbri->regs + REG8) - dvma_addr) in dbri_cmdlock()
719 tmp = sbus_readl(dbri->regs + REG0); in dbri_cmdsend()
721 sbus_writel(tmp, dbri->regs + REG0); in dbri_cmdsend()
734 sbus_readl(dbri->regs + REG0), in dbri_reset()
735 sbus_readl(dbri->regs + REG2), in dbri_reset()
736 sbus_readl(dbri->regs + REG8), sbus_readl(dbri->regs + REG9)); in dbri_reset()
738 sbus_writel(D_R, dbri->regs + REG0); /* Soft Reset */ in dbri_reset()
739 for (i = 0; (sbus_readl(dbri->regs + REG0) & D_R) && i < 64; i++) in dbri_reset()
[all …]
/sound/atmel/
Dac97c.c54 void __iomem *regs; member
63 __raw_writel((val), (chip)->regs + AC97C_##reg)
65 __raw_readl((chip)->regs + AC97C_##reg)
275 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR); in atmel_ac97c_playback_prepare()
276 writel(block_size / 2, chip->regs + ATMEL_PDC_TCR); in atmel_ac97c_playback_prepare()
277 writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_TNPR); in atmel_ac97c_playback_prepare()
278 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); in atmel_ac97c_playback_prepare()
357 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR); in atmel_ac97c_capture_prepare()
358 writel(block_size / 2, chip->regs + ATMEL_PDC_RCR); in atmel_ac97c_capture_prepare()
359 writel(runtime->dma_addr + block_size, chip->regs + ATMEL_PDC_RNPR); in atmel_ac97c_capture_prepare()
[all …]
/sound/pci/hda/
Dhda_tegra.c75 void __iomem *regs; member
193 v = readl(hda->regs + HDA_IPFS_CONFIG); in hda_tegra_init()
195 writel(v, hda->regs + HDA_IPFS_CONFIG); in hda_tegra_init()
198 v = readl(hda->regs + HDA_CFG_CMD); in hda_tegra_init()
202 writel(v, hda->regs + HDA_CFG_CMD); in hda_tegra_init()
204 writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0); in hda_tegra_init()
205 writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0); in hda_tegra_init()
206 writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0); in hda_tegra_init()
208 v = readl(hda->regs + HDA_IPFS_INTR_MASK); in hda_tegra_init()
210 writel(v, hda->regs + HDA_IPFS_INTR_MASK); in hda_tegra_init()
[all …]
/sound/spi/
Dat73c213.c196 ssc_writel(chip->ssc->regs, CMR, ssc_div/2); in snd_at73c213_set_bitrate()
244 val = ssc_readl(chip->ssc->regs, TFMR); in snd_at73c213_pcm_hw_params()
246 ssc_writel(chip->ssc->regs, TFMR, val); in snd_at73c213_pcm_hw_params()
267 ssc_writel(chip->ssc->regs, PDC_TPR, in snd_at73c213_pcm_prepare()
269 ssc_writel(chip->ssc->regs, PDC_TCR, in snd_at73c213_pcm_prepare()
271 ssc_writel(chip->ssc->regs, PDC_TNPR, in snd_at73c213_pcm_prepare()
273 ssc_writel(chip->ssc->regs, PDC_TNCR, in snd_at73c213_pcm_prepare()
289 ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX)); in snd_at73c213_pcm_trigger()
290 ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN)); in snd_at73c213_pcm_trigger()
293 ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS)); in snd_at73c213_pcm_trigger()
[all …]
/sound/soc/sh/rcar/
Dgen.c33 struct regmap_field *regs[RSND_REG_MAX]; member
68 if (!gen->regs[reg]) { in rsnd_is_accessible_reg()
88 regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val); in rsnd_read()
107 regmap_fields_force_write(gen->regs[reg], rsnd_mod_id(mod), data); in rsnd_write()
123 regmap_fields_force_update_bits(gen->regs[reg], in rsnd_bset()
153 struct regmap_field *regs; in _rsnd_gen_regmap_init() local
192 regs = devm_regmap_field_alloc(dev, regmap, regf); in _rsnd_gen_regmap_init()
193 if (IS_ERR(regs)) in _rsnd_gen_regmap_init()
194 return PTR_ERR(regs); in _rsnd_gen_regmap_init()
197 gen->regs[conf[i].idx] = regs; in _rsnd_gen_regmap_init()

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