1/* 2 * Device Tree file for Marvell Armada 370 Reference Design board 3 * (RD-88F6710-A1) 4 * 5 * Copied from arch/arm/boot/dts/armada-370-db.dts 6 * 7 * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org> 8 * 9 * This file is dual-licensed: you can use it either under the terms 10 * of the GPL or the X11 license, at your option. Note that this dual 11 * licensing only applies to this file, and not this project as a 12 * whole. 13 * 14 * a) This file is free software; you can redistribute it and/or 15 * modify it under the terms of the GNU General Public License as 16 * published by the Free Software Foundation; either version 2 of the 17 * License, or (at your option) any later version. 18 * 19 * This file is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 * 24 * Or, alternatively, 25 * 26 * b) Permission is hereby granted, free of charge, to any person 27 * obtaining a copy of this software and associated documentation 28 * files (the "Software"), to deal in the Software without 29 * restriction, including without limitation the rights to use, 30 * copy, modify, merge, publish, distribute, sublicense, and/or 31 * sell copies of the Software, and to permit persons to whom the 32 * Software is furnished to do so, subject to the following 33 * conditions: 34 * 35 * The above copyright notice and this permission notice shall be 36 * included in all copies or substantial portions of the Software. 37 * 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45 * OTHER DEALINGS IN THE SOFTWARE. 46 * 47 * Note: this Device Tree assumes that the bootloader has remapped the 48 * internal registers to 0xf1000000 (instead of the default 49 * 0xd0000000). The 0xf1000000 is the default used by the recent, 50 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 51 * boards were delivered with an older version of the bootloader that 52 * left internal registers mapped at 0xd0000000. If you are in this 53 * situation, you should either update your bootloader (preferred 54 * solution) or the below Device Tree should be adjusted. 55 */ 56 57/dts-v1/; 58#include <dt-bindings/input/input.h> 59#include <dt-bindings/gpio/gpio.h> 60#include "armada-370.dtsi" 61 62/ { 63 model = "Marvell Armada 370 Reference Design"; 64 compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp"; 65 66 chosen { 67 stdout-path = "serial0:115200n8"; 68 }; 69 70 memory@0 { 71 device_type = "memory"; 72 reg = <0x00000000 0x20000000>; /* 512 MB */ 73 }; 74 75 soc { 76 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 77 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000 78 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>; 79 80 internal-regs { 81 serial@12000 { 82 status = "okay"; 83 }; 84 sata@a0000 { 85 nr-ports = <2>; 86 status = "okay"; 87 }; 88 89 ethernet@70000 { 90 status = "okay"; 91 phy = <&phy0>; 92 phy-mode = "sgmii"; 93 }; 94 ethernet@74000 { 95 pinctrl-0 = <&ge1_rgmii_pins>; 96 pinctrl-names = "default"; 97 status = "okay"; 98 phy-mode = "rgmii-id"; 99 fixed-link { 100 speed = <1000>; 101 full-duplex; 102 }; 103 }; 104 105 mvsdio@d4000 { 106 pinctrl-0 = <&sdio_pins1>; 107 pinctrl-names = "default"; 108 status = "okay"; 109 /* No CD or WP GPIOs */ 110 broken-cd; 111 }; 112 113 usb@50000 { 114 status = "okay"; 115 }; 116 117 usb@51000 { 118 status = "okay"; 119 }; 120 121 gpio-keys { 122 compatible = "gpio-keys"; 123 #address-cells = <1>; 124 #size-cells = <0>; 125 button { 126 label = "Software Button"; 127 linux,code = <KEY_POWER>; 128 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 129 }; 130 }; 131 132 gpio-fan { 133 compatible = "gpio-fan"; 134 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; 135 gpio-fan,speed-map = <0 0 3000 1>; 136 pinctrl-0 = <&fan_pins>; 137 pinctrl-names = "default"; 138 }; 139 140 gpio_leds { 141 compatible = "gpio-leds"; 142 pinctrl-names = "default"; 143 pinctrl-0 = <&led_pins>; 144 145 sw_led { 146 label = "370rd:green:sw"; 147 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 148 default-state = "keep"; 149 }; 150 }; 151 152 nand@d0000 { 153 status = "okay"; 154 num-cs = <1>; 155 marvell,nand-keep-config; 156 marvell,nand-enable-arbiter; 157 nand-on-flash-bbt; 158 159 partition@0 { 160 label = "U-Boot"; 161 reg = <0 0x800000>; 162 }; 163 partition@800000 { 164 label = "Linux"; 165 reg = <0x800000 0x800000>; 166 }; 167 partition@1000000 { 168 label = "Filesystem"; 169 reg = <0x1000000 0x3f000000>; 170 }; 171 }; 172 }; 173 }; 174 175 dsa { 176 status = "disabled"; 177 178 compatible = "marvell,dsa"; 179 #address-cells = <2>; 180 #size-cells = <0>; 181 182 dsa,ethernet = <ð1>; 183 dsa,mii-bus = <&mdio>; 184 185 switch@0 { 186 #address-cells = <1>; 187 #size-cells = <0>; 188 reg = <0x10 0>; /* MDIO address 16, switch 0 in tree */ 189 190 port@0 { 191 reg = <0>; 192 label = "lan0"; 193 }; 194 195 port@1 { 196 reg = <1>; 197 label = "lan1"; 198 }; 199 200 port@2 { 201 reg = <2>; 202 label = "lan2"; 203 }; 204 205 port@3 { 206 reg = <3>; 207 label = "lan3"; 208 }; 209 210 port@5 { 211 reg = <5>; 212 label = "cpu"; 213 }; 214 }; 215 }; 216}; 217 218&pciec { 219 status = "okay"; 220 221 /* Internal mini-PCIe connector */ 222 pcie@1,0 { 223 /* Port 0, Lane 0 */ 224 status = "okay"; 225 }; 226 227 /* Internal mini-PCIe connector */ 228 pcie@2,0 { 229 /* Port 1, Lane 0 */ 230 status = "okay"; 231 }; 232}; 233 234&mdio { 235 pinctrl-0 = <&mdio_pins>; 236 pinctrl-names = "default"; 237 phy0: ethernet-phy@0 { 238 reg = <0>; 239 }; 240 241 switch: switch@10 { 242 compatible = "marvell,mv88e6085"; 243 #address-cells = <1>; 244 #size-cells = <0>; 245 reg = <0x10>; 246 247 ports { 248 #address-cells = <1>; 249 #size-cells = <0>; 250 251 port@0 { 252 reg = <0>; 253 label = "lan0"; 254 }; 255 256 port@1 { 257 reg = <1>; 258 label = "lan1"; 259 }; 260 261 port@2 { 262 reg = <2>; 263 label = "lan2"; 264 }; 265 266 port@3 { 267 reg = <3>; 268 label = "lan3"; 269 }; 270 271 port@5 { 272 reg = <5>; 273 label = "cpu"; 274 ethernet = <ð1>; 275 fixed-link { 276 speed = <1000>; 277 full-duplex; 278 }; 279 }; 280 }; 281 }; 282}; 283 284 285&pinctrl { 286 fan_pins: fan-pins { 287 marvell,pins = "mpp8"; 288 marvell,function = "gpio"; 289 }; 290 291 led_pins: led-pins { 292 marvell,pins = "mpp32"; 293 marvell,function = "gpio"; 294 }; 295}; 296