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1// SPDX-License-Identifier: GPL-2.0
2#include "skeleton.dtsi"
3
4/ {
5	model = "Aspeed BMC";
6	compatible = "aspeed,ast2400";
7	#address-cells = <1>;
8	#size-cells = <1>;
9	interrupt-parent = <&vic>;
10
11	cpus {
12		#address-cells = <1>;
13		#size-cells = <0>;
14
15		cpu@0 {
16			compatible = "arm,arm926ej-s";
17			device_type = "cpu";
18			reg = <0>;
19		};
20	};
21
22	ahb {
23		compatible = "simple-bus";
24		#address-cells = <1>;
25		#size-cells = <1>;
26		ranges;
27
28		fmc: flash-controller@1e620000 {
29			reg = < 0x1e620000 0x94
30				0x20000000 0x10000000 >;
31			#address-cells = <1>;
32			#size-cells = <0>;
33			compatible = "aspeed,ast2400-fmc";
34			status = "disabled";
35			interrupts = <19>;
36			flash@0 {
37				reg = < 0 >;
38				compatible = "jedec,spi-nor";
39				status = "disabled";
40			};
41		};
42
43		spi: flash-controller@1e630000 {
44			reg = < 0x1e630000 0x18
45				0x30000000 0x10000000 >;
46			#address-cells = <1>;
47			#size-cells = <0>;
48			compatible = "aspeed,ast2400-spi";
49			status = "disabled";
50			flash@0 {
51				reg = < 0 >;
52				compatible = "jedec,spi-nor";
53				status = "disabled";
54			};
55		};
56
57		vic: interrupt-controller@1e6c0080 {
58			compatible = "aspeed,ast2400-vic";
59			interrupt-controller;
60			#interrupt-cells = <1>;
61			valid-sources = <0xffffffff 0x0007ffff>;
62			reg = <0x1e6c0080 0x80>;
63		};
64
65		mac0: ethernet@1e660000 {
66			compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
67			reg = <0x1e660000 0x180>;
68			interrupts = <2>;
69			status = "disabled";
70		};
71
72		mac1: ethernet@1e680000 {
73			compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
74			reg = <0x1e680000 0x180>;
75			interrupts = <3>;
76			status = "disabled";
77		};
78
79		apb {
80			compatible = "simple-bus";
81			#address-cells = <1>;
82			#size-cells = <1>;
83			ranges;
84
85			syscon: syscon@1e6e2000 {
86				compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
87				reg = <0x1e6e2000 0x1a8>;
88				#address-cells = <1>;
89				#size-cells = <0>;
90
91                                clk_clkin: clk_clkin {
92                                        #clock-cells = <0>;
93                                        compatible = "fixed-clock";
94                                        clock-frequency = <48000000>;
95                                };
96
97                                clk_hpll: clk_hpll@70 {
98                                        #clock-cells = <0>;
99                                        compatible = "aspeed,g4-hpll-clock", "fixed-clock";
100                                        reg = <0x70>;
101                                        clocks = <&clk_clkin>;
102                                        clock-frequency = <384000000>;
103                                };
104
105                                clk_ahb: clk_ahb@70 {
106                                        #clock-cells = <0>;
107                                        compatible = "aspeed,g4-ahb-clock", "fixed-clock";
108                                        reg = <0x70>;
109                                        clocks = <&clk_hpll>;
110                                        clock-frequency = <192000000>;
111                                };
112
113                                clk_apb: clk_apb@08 {
114                                        #clock-cells = <0>;
115                                        compatible = "aspeed,g4-apb-clock", "fixed-clock";
116                                        reg = <0x08>;
117                                        clocks = <&clk_hpll>;
118                                        clock-frequency = <48000000>;
119                                };
120
121                                clk_uart: clk_uart@2c{
122                                        #clock-cells = <0>;
123                                        compatible = "aspeed,g4-uart-clock", "fixed-clock";
124                                        reg = <0x2c>;
125                                        clock-frequency = <24000000>;
126                                };
127
128				pinctrl: pinctrl {
129					compatible = "aspeed,g4-pinctrl";
130
131					pinctrl_acpi_default: acpi_default {
132						function = "ACPI";
133						groups = "ACPI";
134					};
135
136					pinctrl_adc0_default: adc0_default {
137						function = "ADC0";
138						groups = "ADC0";
139					};
140
141					pinctrl_adc1_default: adc1_default {
142						function = "ADC1";
143						groups = "ADC1";
144					};
145
146					pinctrl_adc10_default: adc10_default {
147						function = "ADC10";
148						groups = "ADC10";
149					};
150
151					pinctrl_adc11_default: adc11_default {
152						function = "ADC11";
153						groups = "ADC11";
154					};
155
156					pinctrl_adc12_default: adc12_default {
157						function = "ADC12";
158						groups = "ADC12";
159					};
160
161					pinctrl_adc13_default: adc13_default {
162						function = "ADC13";
163						groups = "ADC13";
164					};
165
166					pinctrl_adc14_default: adc14_default {
167						function = "ADC14";
168						groups = "ADC14";
169					};
170
171					pinctrl_adc15_default: adc15_default {
172						function = "ADC15";
173						groups = "ADC15";
174					};
175
176					pinctrl_adc2_default: adc2_default {
177						function = "ADC2";
178						groups = "ADC2";
179					};
180
181					pinctrl_adc3_default: adc3_default {
182						function = "ADC3";
183						groups = "ADC3";
184					};
185
186					pinctrl_adc4_default: adc4_default {
187						function = "ADC4";
188						groups = "ADC4";
189					};
190
191					pinctrl_adc5_default: adc5_default {
192						function = "ADC5";
193						groups = "ADC5";
194					};
195
196					pinctrl_adc6_default: adc6_default {
197						function = "ADC6";
198						groups = "ADC6";
199					};
200
201					pinctrl_adc7_default: adc7_default {
202						function = "ADC7";
203						groups = "ADC7";
204					};
205
206					pinctrl_adc8_default: adc8_default {
207						function = "ADC8";
208						groups = "ADC8";
209					};
210
211					pinctrl_adc9_default: adc9_default {
212						function = "ADC9";
213						groups = "ADC9";
214					};
215
216					pinctrl_bmcint_default: bmcint_default {
217						function = "BMCINT";
218						groups = "BMCINT";
219					};
220
221					pinctrl_ddcclk_default: ddcclk_default {
222						function = "DDCCLK";
223						groups = "DDCCLK";
224					};
225
226					pinctrl_ddcdat_default: ddcdat_default {
227						function = "DDCDAT";
228						groups = "DDCDAT";
229					};
230
231					pinctrl_extrst_default: extrst_default {
232						function = "EXTRST";
233						groups = "EXTRST";
234					};
235
236					pinctrl_flack_default: flack_default {
237						function = "FLACK";
238						groups = "FLACK";
239					};
240
241					pinctrl_flbusy_default: flbusy_default {
242						function = "FLBUSY";
243						groups = "FLBUSY";
244					};
245
246					pinctrl_flwp_default: flwp_default {
247						function = "FLWP";
248						groups = "FLWP";
249					};
250
251					pinctrl_gpid_default: gpid_default {
252						function = "GPID";
253						groups = "GPID";
254					};
255
256					pinctrl_gpid0_default: gpid0_default {
257						function = "GPID0";
258						groups = "GPID0";
259					};
260
261					pinctrl_gpid2_default: gpid2_default {
262						function = "GPID2";
263						groups = "GPID2";
264					};
265
266					pinctrl_gpid4_default: gpid4_default {
267						function = "GPID4";
268						groups = "GPID4";
269					};
270
271					pinctrl_gpid6_default: gpid6_default {
272						function = "GPID6";
273						groups = "GPID6";
274					};
275
276					pinctrl_gpie0_default: gpie0_default {
277						function = "GPIE0";
278						groups = "GPIE0";
279					};
280
281					pinctrl_gpie2_default: gpie2_default {
282						function = "GPIE2";
283						groups = "GPIE2";
284					};
285
286					pinctrl_gpie4_default: gpie4_default {
287						function = "GPIE4";
288						groups = "GPIE4";
289					};
290
291					pinctrl_gpie6_default: gpie6_default {
292						function = "GPIE6";
293						groups = "GPIE6";
294					};
295
296					pinctrl_i2c10_default: i2c10_default {
297						function = "I2C10";
298						groups = "I2C10";
299					};
300
301					pinctrl_i2c11_default: i2c11_default {
302						function = "I2C11";
303						groups = "I2C11";
304					};
305
306					pinctrl_i2c12_default: i2c12_default {
307						function = "I2C12";
308						groups = "I2C12";
309					};
310
311					pinctrl_i2c13_default: i2c13_default {
312						function = "I2C13";
313						groups = "I2C13";
314					};
315
316					pinctrl_i2c14_default: i2c14_default {
317						function = "I2C14";
318						groups = "I2C14";
319					};
320
321					pinctrl_i2c3_default: i2c3_default {
322						function = "I2C3";
323						groups = "I2C3";
324					};
325
326					pinctrl_i2c4_default: i2c4_default {
327						function = "I2C4";
328						groups = "I2C4";
329					};
330
331					pinctrl_i2c5_default: i2c5_default {
332						function = "I2C5";
333						groups = "I2C5";
334					};
335
336					pinctrl_i2c6_default: i2c6_default {
337						function = "I2C6";
338						groups = "I2C6";
339					};
340
341					pinctrl_i2c7_default: i2c7_default {
342						function = "I2C7";
343						groups = "I2C7";
344					};
345
346					pinctrl_i2c8_default: i2c8_default {
347						function = "I2C8";
348						groups = "I2C8";
349					};
350
351					pinctrl_i2c9_default: i2c9_default {
352						function = "I2C9";
353						groups = "I2C9";
354					};
355
356					pinctrl_lpcpd_default: lpcpd_default {
357						function = "LPCPD";
358						groups = "LPCPD";
359					};
360
361					pinctrl_lpcpme_default: lpcpme_default {
362						function = "LPCPME";
363						groups = "LPCPME";
364					};
365
366					pinctrl_lpcrst_default: lpcrst_default {
367						function = "LPCRST";
368						groups = "LPCRST";
369					};
370
371					pinctrl_lpcsmi_default: lpcsmi_default {
372						function = "LPCSMI";
373						groups = "LPCSMI";
374					};
375
376					pinctrl_mac1link_default: mac1link_default {
377						function = "MAC1LINK";
378						groups = "MAC1LINK";
379					};
380
381					pinctrl_mac2link_default: mac2link_default {
382						function = "MAC2LINK";
383						groups = "MAC2LINK";
384					};
385
386					pinctrl_mdio1_default: mdio1_default {
387						function = "MDIO1";
388						groups = "MDIO1";
389					};
390
391					pinctrl_mdio2_default: mdio2_default {
392						function = "MDIO2";
393						groups = "MDIO2";
394					};
395
396					pinctrl_ncts1_default: ncts1_default {
397						function = "NCTS1";
398						groups = "NCTS1";
399					};
400
401					pinctrl_ncts2_default: ncts2_default {
402						function = "NCTS2";
403						groups = "NCTS2";
404					};
405
406					pinctrl_ncts3_default: ncts3_default {
407						function = "NCTS3";
408						groups = "NCTS3";
409					};
410
411					pinctrl_ncts4_default: ncts4_default {
412						function = "NCTS4";
413						groups = "NCTS4";
414					};
415
416					pinctrl_ndcd1_default: ndcd1_default {
417						function = "NDCD1";
418						groups = "NDCD1";
419					};
420
421					pinctrl_ndcd2_default: ndcd2_default {
422						function = "NDCD2";
423						groups = "NDCD2";
424					};
425
426					pinctrl_ndcd3_default: ndcd3_default {
427						function = "NDCD3";
428						groups = "NDCD3";
429					};
430
431					pinctrl_ndcd4_default: ndcd4_default {
432						function = "NDCD4";
433						groups = "NDCD4";
434					};
435
436					pinctrl_ndsr1_default: ndsr1_default {
437						function = "NDSR1";
438						groups = "NDSR1";
439					};
440
441					pinctrl_ndsr2_default: ndsr2_default {
442						function = "NDSR2";
443						groups = "NDSR2";
444					};
445
446					pinctrl_ndsr3_default: ndsr3_default {
447						function = "NDSR3";
448						groups = "NDSR3";
449					};
450
451					pinctrl_ndsr4_default: ndsr4_default {
452						function = "NDSR4";
453						groups = "NDSR4";
454					};
455
456					pinctrl_ndtr1_default: ndtr1_default {
457						function = "NDTR1";
458						groups = "NDTR1";
459					};
460
461					pinctrl_ndtr2_default: ndtr2_default {
462						function = "NDTR2";
463						groups = "NDTR2";
464					};
465
466					pinctrl_ndtr3_default: ndtr3_default {
467						function = "NDTR3";
468						groups = "NDTR3";
469					};
470
471					pinctrl_ndtr4_default: ndtr4_default {
472						function = "NDTR4";
473						groups = "NDTR4";
474					};
475
476					pinctrl_ndts4_default: ndts4_default {
477						function = "NDTS4";
478						groups = "NDTS4";
479					};
480
481					pinctrl_nri1_default: nri1_default {
482						function = "NRI1";
483						groups = "NRI1";
484					};
485
486					pinctrl_nri2_default: nri2_default {
487						function = "NRI2";
488						groups = "NRI2";
489					};
490
491					pinctrl_nri3_default: nri3_default {
492						function = "NRI3";
493						groups = "NRI3";
494					};
495
496					pinctrl_nri4_default: nri4_default {
497						function = "NRI4";
498						groups = "NRI4";
499					};
500
501					pinctrl_nrts1_default: nrts1_default {
502						function = "NRTS1";
503						groups = "NRTS1";
504					};
505
506					pinctrl_nrts2_default: nrts2_default {
507						function = "NRTS2";
508						groups = "NRTS2";
509					};
510
511					pinctrl_nrts3_default: nrts3_default {
512						function = "NRTS3";
513						groups = "NRTS3";
514					};
515
516					pinctrl_oscclk_default: oscclk_default {
517						function = "OSCCLK";
518						groups = "OSCCLK";
519					};
520
521					pinctrl_pwm0_default: pwm0_default {
522						function = "PWM0";
523						groups = "PWM0";
524					};
525
526					pinctrl_pwm1_default: pwm1_default {
527						function = "PWM1";
528						groups = "PWM1";
529					};
530
531					pinctrl_pwm2_default: pwm2_default {
532						function = "PWM2";
533						groups = "PWM2";
534					};
535
536					pinctrl_pwm3_default: pwm3_default {
537						function = "PWM3";
538						groups = "PWM3";
539					};
540
541					pinctrl_pwm4_default: pwm4_default {
542						function = "PWM4";
543						groups = "PWM4";
544					};
545
546					pinctrl_pwm5_default: pwm5_default {
547						function = "PWM5";
548						groups = "PWM5";
549					};
550
551					pinctrl_pwm6_default: pwm6_default {
552						function = "PWM6";
553						groups = "PWM6";
554					};
555
556					pinctrl_pwm7_default: pwm7_default {
557						function = "PWM7";
558						groups = "PWM7";
559					};
560
561					pinctrl_rgmii1_default: rgmii1_default {
562						function = "RGMII1";
563						groups = "RGMII1";
564					};
565
566					pinctrl_rgmii2_default: rgmii2_default {
567						function = "RGMII2";
568						groups = "RGMII2";
569					};
570
571					pinctrl_rmii1_default: rmii1_default {
572						function = "RMII1";
573						groups = "RMII1";
574					};
575
576					pinctrl_rmii2_default: rmii2_default {
577						function = "RMII2";
578						groups = "RMII2";
579					};
580
581					pinctrl_rom16_default: rom16_default {
582						function = "ROM16";
583						groups = "ROM16";
584					};
585
586					pinctrl_rom8_default: rom8_default {
587						function = "ROM8";
588						groups = "ROM8";
589					};
590
591					pinctrl_romcs1_default: romcs1_default {
592						function = "ROMCS1";
593						groups = "ROMCS1";
594					};
595
596					pinctrl_romcs2_default: romcs2_default {
597						function = "ROMCS2";
598						groups = "ROMCS2";
599					};
600
601					pinctrl_romcs3_default: romcs3_default {
602						function = "ROMCS3";
603						groups = "ROMCS3";
604					};
605
606					pinctrl_romcs4_default: romcs4_default {
607						function = "ROMCS4";
608						groups = "ROMCS4";
609					};
610
611					pinctrl_rxd1_default: rxd1_default {
612						function = "RXD1";
613						groups = "RXD1";
614					};
615
616					pinctrl_rxd2_default: rxd2_default {
617						function = "RXD2";
618						groups = "RXD2";
619					};
620
621					pinctrl_rxd3_default: rxd3_default {
622						function = "RXD3";
623						groups = "RXD3";
624					};
625
626					pinctrl_rxd4_default: rxd4_default {
627						function = "RXD4";
628						groups = "RXD4";
629					};
630
631					pinctrl_salt1_default: salt1_default {
632						function = "SALT1";
633						groups = "SALT1";
634					};
635
636					pinctrl_salt2_default: salt2_default {
637						function = "SALT2";
638						groups = "SALT2";
639					};
640
641					pinctrl_salt3_default: salt3_default {
642						function = "SALT3";
643						groups = "SALT3";
644					};
645
646					pinctrl_salt4_default: salt4_default {
647						function = "SALT4";
648						groups = "SALT4";
649					};
650
651					pinctrl_sd1_default: sd1_default {
652						function = "SD1";
653						groups = "SD1";
654					};
655
656					pinctrl_sd2_default: sd2_default {
657						function = "SD2";
658						groups = "SD2";
659					};
660
661					pinctrl_sgpmck_default: sgpmck_default {
662						function = "SGPMCK";
663						groups = "SGPMCK";
664					};
665
666					pinctrl_sgpmi_default: sgpmi_default {
667						function = "SGPMI";
668						groups = "SGPMI";
669					};
670
671					pinctrl_sgpmld_default: sgpmld_default {
672						function = "SGPMLD";
673						groups = "SGPMLD";
674					};
675
676					pinctrl_sgpmo_default: sgpmo_default {
677						function = "SGPMO";
678						groups = "SGPMO";
679					};
680
681					pinctrl_sgpsck_default: sgpsck_default {
682						function = "SGPSCK";
683						groups = "SGPSCK";
684					};
685
686					pinctrl_sgpsi0_default: sgpsi0_default {
687						function = "SGPSI0";
688						groups = "SGPSI0";
689					};
690
691					pinctrl_sgpsi1_default: sgpsi1_default {
692						function = "SGPSI1";
693						groups = "SGPSI1";
694					};
695
696					pinctrl_sgpsld_default: sgpsld_default {
697						function = "SGPSLD";
698						groups = "SGPSLD";
699					};
700
701					pinctrl_sioonctrl_default: sioonctrl_default {
702						function = "SIOONCTRL";
703						groups = "SIOONCTRL";
704					};
705
706					pinctrl_siopbi_default: siopbi_default {
707						function = "SIOPBI";
708						groups = "SIOPBI";
709					};
710
711					pinctrl_siopbo_default: siopbo_default {
712						function = "SIOPBO";
713						groups = "SIOPBO";
714					};
715
716					pinctrl_siopwreq_default: siopwreq_default {
717						function = "SIOPWREQ";
718						groups = "SIOPWREQ";
719					};
720
721					pinctrl_siopwrgd_default: siopwrgd_default {
722						function = "SIOPWRGD";
723						groups = "SIOPWRGD";
724					};
725
726					pinctrl_sios3_default: sios3_default {
727						function = "SIOS3";
728						groups = "SIOS3";
729					};
730
731					pinctrl_sios5_default: sios5_default {
732						function = "SIOS5";
733						groups = "SIOS5";
734					};
735
736					pinctrl_siosci_default: siosci_default {
737						function = "SIOSCI";
738						groups = "SIOSCI";
739					};
740
741					pinctrl_spi1_default: spi1_default {
742						function = "SPI1";
743						groups = "SPI1";
744					};
745
746					pinctrl_spi1debug_default: spi1debug_default {
747						function = "SPI1DEBUG";
748						groups = "SPI1DEBUG";
749					};
750
751					pinctrl_spi1passthru_default: spi1passthru_default {
752						function = "SPI1PASSTHRU";
753						groups = "SPI1PASSTHRU";
754					};
755
756					pinctrl_spics1_default: spics1_default {
757						function = "SPICS1";
758						groups = "SPICS1";
759					};
760
761					pinctrl_timer3_default: timer3_default {
762						function = "TIMER3";
763						groups = "TIMER3";
764					};
765
766					pinctrl_timer4_default: timer4_default {
767						function = "TIMER4";
768						groups = "TIMER4";
769					};
770
771					pinctrl_timer5_default: timer5_default {
772						function = "TIMER5";
773						groups = "TIMER5";
774					};
775
776					pinctrl_timer6_default: timer6_default {
777						function = "TIMER6";
778						groups = "TIMER6";
779					};
780
781					pinctrl_timer7_default: timer7_default {
782						function = "TIMER7";
783						groups = "TIMER7";
784					};
785
786					pinctrl_timer8_default: timer8_default {
787						function = "TIMER8";
788						groups = "TIMER8";
789					};
790
791					pinctrl_txd1_default: txd1_default {
792						function = "TXD1";
793						groups = "TXD1";
794					};
795
796					pinctrl_txd2_default: txd2_default {
797						function = "TXD2";
798						groups = "TXD2";
799					};
800
801					pinctrl_txd3_default: txd3_default {
802						function = "TXD3";
803						groups = "TXD3";
804					};
805
806					pinctrl_txd4_default: txd4_default {
807						function = "TXD4";
808						groups = "TXD4";
809					};
810
811					pinctrl_uart6_default: uart6_default {
812						function = "UART6";
813						groups = "UART6";
814					};
815
816					pinctrl_usbcki_default: usbcki_default {
817						function = "USBCKI";
818						groups = "USBCKI";
819					};
820
821					pinctrl_vgabios_rom_default: vgabios_rom_default {
822						function = "VGABIOS_ROM";
823						groups = "VGABIOS_ROM";
824					};
825
826					pinctrl_vgahs_default: vgahs_default {
827						function = "VGAHS";
828						groups = "VGAHS";
829					};
830
831					pinctrl_vgavs_default: vgavs_default {
832						function = "VGAVS";
833						groups = "VGAVS";
834					};
835
836					pinctrl_vpi18_default: vpi18_default {
837						function = "VPI18";
838						groups = "VPI18";
839					};
840
841					pinctrl_vpi24_default: vpi24_default {
842						function = "VPI24";
843						groups = "VPI24";
844					};
845
846					pinctrl_vpi30_default: vpi30_default {
847						function = "VPI30";
848						groups = "VPI30";
849					};
850
851					pinctrl_vpo12_default: vpo12_default {
852						function = "VPO12";
853						groups = "VPO12";
854					};
855
856					pinctrl_vpo24_default: vpo24_default {
857						function = "VPO24";
858						groups = "VPO24";
859					};
860
861					pinctrl_wdtrst1_default: wdtrst1_default {
862						function = "WDTRST1";
863						groups = "WDTRST1";
864					};
865
866					pinctrl_wdtrst2_default: wdtrst2_default {
867						function = "WDTRST2";
868						groups = "WDTRST2";
869					};
870
871				};
872			};
873
874			sram@1e720000 {
875				compatible = "mmio-sram";
876				reg = <0x1e720000 0x8000>;	// 32K
877			};
878
879			gpio: gpio@1e780000 {
880				#gpio-cells = <2>;
881				gpio-controller;
882				compatible = "aspeed,ast2400-gpio";
883				reg = <0x1e780000 0x1000>;
884				interrupts = <20>;
885				gpio-ranges = <&pinctrl 0 0 220>;
886				interrupt-controller;
887			};
888
889			timer: timer@1e782000 {
890				/* This timer is a Faraday FTTMR010 derivative */
891				compatible = "aspeed,ast2400-timer";
892				reg = <0x1e782000 0x90>;
893				interrupts = <16 17 18 35 36 37 38 39>;
894				clocks = <&clk_apb>;
895				clock-names = "PCLK";
896			};
897
898			wdt1: wdt@1e785000 {
899				compatible = "aspeed,ast2400-wdt";
900				reg = <0x1e785000 0x1c>;
901				interrupts = <27>;
902			};
903
904			wdt2: wdt@1e785020 {
905				compatible = "aspeed,ast2400-wdt";
906				reg = <0x1e785020 0x1c>;
907				interrupts = <27>;
908				clocks = <&clk_apb>;
909				status = "disabled";
910			};
911
912			uart1: serial@1e783000 {
913				compatible = "ns16550a";
914				reg = <0x1e783000 0x1000>;
915				reg-shift = <2>;
916				interrupts = <9>;
917				clocks = <&clk_uart>;
918				no-loopback-test;
919				status = "disabled";
920			};
921
922			uart2: serial@1e78d000 {
923				compatible = "ns16550a";
924				reg = <0x1e78d000 0x1000>;
925				reg-shift = <2>;
926				interrupts = <32>;
927				clocks = <&clk_uart>;
928				no-loopback-test;
929				status = "disabled";
930			};
931
932			uart3: serial@1e78e000 {
933				compatible = "ns16550a";
934				reg = <0x1e78e000 0x1000>;
935				reg-shift = <2>;
936				interrupts = <33>;
937				clocks = <&clk_uart>;
938				no-loopback-test;
939				status = "disabled";
940			};
941
942			uart4: serial@1e78f000 {
943				compatible = "ns16550a";
944				reg = <0x1e78f000 0x1000>;
945				reg-shift = <2>;
946				interrupts = <34>;
947				clocks = <&clk_uart>;
948				no-loopback-test;
949				status = "disabled";
950			};
951
952			uart5: serial@1e784000 {
953				compatible = "ns16550a";
954				reg = <0x1e784000 0x1000>;
955				reg-shift = <2>;
956				interrupts = <10>;
957				clocks = <&clk_uart>;
958				current-speed = <38400>;
959				no-loopback-test;
960				status = "disabled";
961			};
962
963			uart6: serial@1e787000 {
964				compatible = "ns16550a";
965				reg = <0x1e787000 0x1000>;
966				reg-shift = <2>;
967				interrupts = <10>;
968				clocks = <&clk_uart>;
969				no-loopback-test;
970				status = "disabled";
971			};
972
973			adc: adc@1e6e9000 {
974				compatible = "aspeed,ast2400-adc";
975				reg = <0x1e6e9000 0xb0>;
976				clocks = <&clk_apb>;
977				#io-channel-cells = <1>;
978				status = "disabled";
979			};
980		};
981	};
982};
983