1/* 2 * Copyright 2012 Freescale Semiconductor, Inc. 3 * 4 * The code contained herein is licensed under the GNU General Public 5 * License. You may obtain a copy of the GNU General Public License 6 * Version 2 or later at the following locations: 7 * 8 * http://www.opensource.org/licenses/gpl-license.html 9 * http://www.gnu.org/copyleft/gpl.html 10 */ 11 12#include "imx23-pinfunc.h" 13 14/ { 15 #address-cells = <1>; 16 #size-cells = <1>; 17 18 interrupt-parent = <&icoll>; 19 /* 20 * The decompressor and also some bootloaders rely on a 21 * pre-existing /chosen node to be available to insert the 22 * command line and merge other ATAGS info. 23 * Also for U-Boot there must be a pre-existing /memory node. 24 */ 25 chosen {}; 26 memory { device_type = "memory"; reg = <0 0>; }; 27 28 aliases { 29 gpio0 = &gpio0; 30 gpio1 = &gpio1; 31 gpio2 = &gpio2; 32 serial0 = &auart0; 33 serial1 = &auart1; 34 spi0 = &ssp0; 35 spi1 = &ssp1; 36 usbphy0 = &usbphy0; 37 }; 38 39 cpus { 40 #address-cells = <1>; 41 #size-cells = <0>; 42 43 cpu@0 { 44 compatible = "arm,arm926ej-s"; 45 device_type = "cpu"; 46 reg = <0>; 47 }; 48 }; 49 50 apb@80000000 { 51 compatible = "simple-bus"; 52 #address-cells = <1>; 53 #size-cells = <1>; 54 reg = <0x80000000 0x80000>; 55 ranges; 56 57 apbh@80000000 { 58 compatible = "simple-bus"; 59 #address-cells = <1>; 60 #size-cells = <1>; 61 reg = <0x80000000 0x40000>; 62 ranges; 63 64 icoll: interrupt-controller@80000000 { 65 compatible = "fsl,imx23-icoll", "fsl,icoll"; 66 interrupt-controller; 67 #interrupt-cells = <1>; 68 reg = <0x80000000 0x2000>; 69 }; 70 71 dma_apbh: dma-apbh@80004000 { 72 compatible = "fsl,imx23-dma-apbh"; 73 reg = <0x80004000 0x2000>; 74 interrupts = <0 14 20 0 75 13 13 13 13>; 76 interrupt-names = "empty", "ssp0", "ssp1", "empty", 77 "gpmi0", "gpmi1", "gpmi2", "gpmi3"; 78 #dma-cells = <1>; 79 dma-channels = <8>; 80 clocks = <&clks 15>; 81 }; 82 83 ecc@80008000 { 84 reg = <0x80008000 0x2000>; 85 status = "disabled"; 86 }; 87 88 gpmi-nand@8000c000 { 89 compatible = "fsl,imx23-gpmi-nand"; 90 #address-cells = <1>; 91 #size-cells = <1>; 92 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; 93 reg-names = "gpmi-nand", "bch"; 94 interrupts = <56>; 95 interrupt-names = "bch"; 96 clocks = <&clks 34>; 97 clock-names = "gpmi_io"; 98 dmas = <&dma_apbh 4>; 99 dma-names = "rx-tx"; 100 status = "disabled"; 101 }; 102 103 ssp0: ssp@80010000 { 104 reg = <0x80010000 0x2000>; 105 interrupts = <15>; 106 clocks = <&clks 33>; 107 dmas = <&dma_apbh 1>; 108 dma-names = "rx-tx"; 109 status = "disabled"; 110 }; 111 112 etm@80014000 { 113 reg = <0x80014000 0x2000>; 114 status = "disabled"; 115 }; 116 117 pinctrl@80018000 { 118 #address-cells = <1>; 119 #size-cells = <0>; 120 compatible = "fsl,imx23-pinctrl", "simple-bus"; 121 reg = <0x80018000 0x2000>; 122 123 gpio0: gpio@0 { 124 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 125 reg = <0>; 126 interrupts = <16>; 127 gpio-controller; 128 #gpio-cells = <2>; 129 interrupt-controller; 130 #interrupt-cells = <2>; 131 }; 132 133 gpio1: gpio@1 { 134 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 135 reg = <1>; 136 interrupts = <17>; 137 gpio-controller; 138 #gpio-cells = <2>; 139 interrupt-controller; 140 #interrupt-cells = <2>; 141 }; 142 143 gpio2: gpio@2 { 144 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 145 reg = <2>; 146 interrupts = <18>; 147 gpio-controller; 148 #gpio-cells = <2>; 149 interrupt-controller; 150 #interrupt-cells = <2>; 151 }; 152 153 duart_pins_a: duart@0 { 154 reg = <0>; 155 fsl,pinmux-ids = < 156 MX23_PAD_PWM0__DUART_RX 157 MX23_PAD_PWM1__DUART_TX 158 >; 159 fsl,drive-strength = <MXS_DRIVE_4mA>; 160 fsl,voltage = <MXS_VOLTAGE_HIGH>; 161 fsl,pull-up = <MXS_PULL_DISABLE>; 162 }; 163 164 auart0_pins_a: auart0@0 { 165 reg = <0>; 166 fsl,pinmux-ids = < 167 MX23_PAD_AUART1_RX__AUART1_RX 168 MX23_PAD_AUART1_TX__AUART1_TX 169 MX23_PAD_AUART1_CTS__AUART1_CTS 170 MX23_PAD_AUART1_RTS__AUART1_RTS 171 >; 172 fsl,drive-strength = <MXS_DRIVE_4mA>; 173 fsl,voltage = <MXS_VOLTAGE_HIGH>; 174 fsl,pull-up = <MXS_PULL_DISABLE>; 175 }; 176 177 auart0_2pins_a: auart0-2pins@0 { 178 reg = <0>; 179 fsl,pinmux-ids = < 180 MX23_PAD_I2C_SCL__AUART1_TX 181 MX23_PAD_I2C_SDA__AUART1_RX 182 >; 183 fsl,drive-strength = <MXS_DRIVE_4mA>; 184 fsl,voltage = <MXS_VOLTAGE_HIGH>; 185 fsl,pull-up = <MXS_PULL_DISABLE>; 186 }; 187 188 auart1_2pins_a: auart1-2pins@0 { 189 reg = <0>; 190 fsl,pinmux-ids = < 191 MX23_PAD_GPMI_D14__AUART2_RX 192 MX23_PAD_GPMI_D15__AUART2_TX 193 >; 194 fsl,drive-strength = <MXS_DRIVE_4mA>; 195 fsl,voltage = <MXS_VOLTAGE_HIGH>; 196 fsl,pull-up = <MXS_PULL_DISABLE>; 197 }; 198 199 gpmi_pins_a: gpmi-nand@0 { 200 reg = <0>; 201 fsl,pinmux-ids = < 202 MX23_PAD_GPMI_D00__GPMI_D00 203 MX23_PAD_GPMI_D01__GPMI_D01 204 MX23_PAD_GPMI_D02__GPMI_D02 205 MX23_PAD_GPMI_D03__GPMI_D03 206 MX23_PAD_GPMI_D04__GPMI_D04 207 MX23_PAD_GPMI_D05__GPMI_D05 208 MX23_PAD_GPMI_D06__GPMI_D06 209 MX23_PAD_GPMI_D07__GPMI_D07 210 MX23_PAD_GPMI_CLE__GPMI_CLE 211 MX23_PAD_GPMI_ALE__GPMI_ALE 212 MX23_PAD_GPMI_RDY0__GPMI_RDY0 213 MX23_PAD_GPMI_RDY1__GPMI_RDY1 214 MX23_PAD_GPMI_WPN__GPMI_WPN 215 MX23_PAD_GPMI_WRN__GPMI_WRN 216 MX23_PAD_GPMI_RDN__GPMI_RDN 217 MX23_PAD_GPMI_CE1N__GPMI_CE1N 218 MX23_PAD_GPMI_CE0N__GPMI_CE0N 219 >; 220 fsl,drive-strength = <MXS_DRIVE_4mA>; 221 fsl,voltage = <MXS_VOLTAGE_HIGH>; 222 fsl,pull-up = <MXS_PULL_DISABLE>; 223 }; 224 225 gpmi_pins_fixup: gpmi-pins-fixup { 226 fsl,pinmux-ids = < 227 MX23_PAD_GPMI_WPN__GPMI_WPN 228 MX23_PAD_GPMI_WRN__GPMI_WRN 229 MX23_PAD_GPMI_RDN__GPMI_RDN 230 >; 231 fsl,drive-strength = <MXS_DRIVE_12mA>; 232 }; 233 234 mmc0_4bit_pins_a: mmc0-4bit@0 { 235 reg = <0>; 236 fsl,pinmux-ids = < 237 MX23_PAD_SSP1_DATA0__SSP1_DATA0 238 MX23_PAD_SSP1_DATA1__SSP1_DATA1 239 MX23_PAD_SSP1_DATA2__SSP1_DATA2 240 MX23_PAD_SSP1_DATA3__SSP1_DATA3 241 MX23_PAD_SSP1_CMD__SSP1_CMD 242 MX23_PAD_SSP1_SCK__SSP1_SCK 243 >; 244 fsl,drive-strength = <MXS_DRIVE_8mA>; 245 fsl,voltage = <MXS_VOLTAGE_HIGH>; 246 fsl,pull-up = <MXS_PULL_ENABLE>; 247 }; 248 249 mmc0_8bit_pins_a: mmc0-8bit@0 { 250 reg = <0>; 251 fsl,pinmux-ids = < 252 MX23_PAD_SSP1_DATA0__SSP1_DATA0 253 MX23_PAD_SSP1_DATA1__SSP1_DATA1 254 MX23_PAD_SSP1_DATA2__SSP1_DATA2 255 MX23_PAD_SSP1_DATA3__SSP1_DATA3 256 MX23_PAD_GPMI_D08__SSP1_DATA4 257 MX23_PAD_GPMI_D09__SSP1_DATA5 258 MX23_PAD_GPMI_D10__SSP1_DATA6 259 MX23_PAD_GPMI_D11__SSP1_DATA7 260 MX23_PAD_SSP1_CMD__SSP1_CMD 261 MX23_PAD_SSP1_DETECT__SSP1_DETECT 262 MX23_PAD_SSP1_SCK__SSP1_SCK 263 >; 264 fsl,drive-strength = <MXS_DRIVE_8mA>; 265 fsl,voltage = <MXS_VOLTAGE_HIGH>; 266 fsl,pull-up = <MXS_PULL_ENABLE>; 267 }; 268 269 mmc0_pins_fixup: mmc0-pins-fixup { 270 fsl,pinmux-ids = < 271 MX23_PAD_SSP1_DETECT__SSP1_DETECT 272 MX23_PAD_SSP1_SCK__SSP1_SCK 273 >; 274 fsl,pull-up = <MXS_PULL_DISABLE>; 275 }; 276 277 mmc1_4bit_pins_a: mmc1-4bit@0 { 278 reg = <0>; 279 fsl,pinmux-ids = < 280 MX23_PAD_GPMI_D00__SSP2_DATA0 281 MX23_PAD_GPMI_D01__SSP2_DATA1 282 MX23_PAD_GPMI_D02__SSP2_DATA2 283 MX23_PAD_GPMI_D03__SSP2_DATA3 284 MX23_PAD_GPMI_RDY1__SSP2_CMD 285 MX23_PAD_GPMI_WRN__SSP2_SCK 286 >; 287 fsl,drive-strength = <MXS_DRIVE_8mA>; 288 fsl,voltage = <MXS_VOLTAGE_HIGH>; 289 fsl,pull-up = <MXS_PULL_ENABLE>; 290 }; 291 292 mmc1_8bit_pins_a: mmc1-8bit@0 { 293 reg = <0>; 294 fsl,pinmux-ids = < 295 MX23_PAD_GPMI_D00__SSP2_DATA0 296 MX23_PAD_GPMI_D01__SSP2_DATA1 297 MX23_PAD_GPMI_D02__SSP2_DATA2 298 MX23_PAD_GPMI_D03__SSP2_DATA3 299 MX23_PAD_GPMI_D04__SSP2_DATA4 300 MX23_PAD_GPMI_D05__SSP2_DATA5 301 MX23_PAD_GPMI_D06__SSP2_DATA6 302 MX23_PAD_GPMI_D07__SSP2_DATA7 303 MX23_PAD_GPMI_RDY1__SSP2_CMD 304 MX23_PAD_GPMI_WRN__SSP2_SCK 305 >; 306 fsl,drive-strength = <MXS_DRIVE_8mA>; 307 fsl,voltage = <MXS_VOLTAGE_HIGH>; 308 fsl,pull-up = <MXS_PULL_ENABLE>; 309 }; 310 311 pwm2_pins_a: pwm2@0 { 312 reg = <0>; 313 fsl,pinmux-ids = < 314 MX23_PAD_PWM2__PWM2 315 >; 316 fsl,drive-strength = <MXS_DRIVE_4mA>; 317 fsl,voltage = <MXS_VOLTAGE_HIGH>; 318 fsl,pull-up = <MXS_PULL_DISABLE>; 319 }; 320 321 lcdif_24bit_pins_a: lcdif-24bit@0 { 322 reg = <0>; 323 fsl,pinmux-ids = < 324 MX23_PAD_LCD_D00__LCD_D00 325 MX23_PAD_LCD_D01__LCD_D01 326 MX23_PAD_LCD_D02__LCD_D02 327 MX23_PAD_LCD_D03__LCD_D03 328 MX23_PAD_LCD_D04__LCD_D04 329 MX23_PAD_LCD_D05__LCD_D05 330 MX23_PAD_LCD_D06__LCD_D06 331 MX23_PAD_LCD_D07__LCD_D07 332 MX23_PAD_LCD_D08__LCD_D08 333 MX23_PAD_LCD_D09__LCD_D09 334 MX23_PAD_LCD_D10__LCD_D10 335 MX23_PAD_LCD_D11__LCD_D11 336 MX23_PAD_LCD_D12__LCD_D12 337 MX23_PAD_LCD_D13__LCD_D13 338 MX23_PAD_LCD_D14__LCD_D14 339 MX23_PAD_LCD_D15__LCD_D15 340 MX23_PAD_LCD_D16__LCD_D16 341 MX23_PAD_LCD_D17__LCD_D17 342 MX23_PAD_GPMI_D08__LCD_D18 343 MX23_PAD_GPMI_D09__LCD_D19 344 MX23_PAD_GPMI_D10__LCD_D20 345 MX23_PAD_GPMI_D11__LCD_D21 346 MX23_PAD_GPMI_D12__LCD_D22 347 MX23_PAD_GPMI_D13__LCD_D23 348 MX23_PAD_LCD_DOTCK__LCD_DOTCK 349 MX23_PAD_LCD_ENABLE__LCD_ENABLE 350 MX23_PAD_LCD_HSYNC__LCD_HSYNC 351 MX23_PAD_LCD_VSYNC__LCD_VSYNC 352 >; 353 fsl,drive-strength = <MXS_DRIVE_4mA>; 354 fsl,voltage = <MXS_VOLTAGE_HIGH>; 355 fsl,pull-up = <MXS_PULL_DISABLE>; 356 }; 357 358 spi2_pins_a: spi2@0 { 359 reg = <0>; 360 fsl,pinmux-ids = < 361 MX23_PAD_GPMI_WRN__SSP2_SCK 362 MX23_PAD_GPMI_RDY1__SSP2_CMD 363 MX23_PAD_GPMI_D00__SSP2_DATA0 364 MX23_PAD_GPMI_D03__SSP2_DATA3 365 >; 366 fsl,drive-strength = <MXS_DRIVE_8mA>; 367 fsl,voltage = <MXS_VOLTAGE_HIGH>; 368 fsl,pull-up = <MXS_PULL_ENABLE>; 369 }; 370 371 i2c_pins_a: i2c@0 { 372 reg = <0>; 373 fsl,pinmux-ids = < 374 MX23_PAD_I2C_SCL__I2C_SCL 375 MX23_PAD_I2C_SDA__I2C_SDA 376 >; 377 fsl,drive-strength = <MXS_DRIVE_8mA>; 378 fsl,voltage = <MXS_VOLTAGE_HIGH>; 379 fsl,pull-up = <MXS_PULL_ENABLE>; 380 }; 381 382 i2c_pins_b: i2c@1 { 383 reg = <1>; 384 fsl,pinmux-ids = < 385 MX23_PAD_LCD_ENABLE__I2C_SCL 386 MX23_PAD_LCD_HSYNC__I2C_SDA 387 >; 388 fsl,drive-strength = <MXS_DRIVE_8mA>; 389 fsl,voltage = <MXS_VOLTAGE_HIGH>; 390 fsl,pull-up = <MXS_PULL_ENABLE>; 391 }; 392 393 i2c_pins_c: i2c@2 { 394 reg = <2>; 395 fsl,pinmux-ids = < 396 MX23_PAD_SSP1_DATA1__I2C_SCL 397 MX23_PAD_SSP1_DATA2__I2C_SDA 398 >; 399 fsl,drive-strength = <MXS_DRIVE_8mA>; 400 fsl,voltage = <MXS_VOLTAGE_HIGH>; 401 fsl,pull-up = <MXS_PULL_ENABLE>; 402 }; 403 }; 404 405 digctl@8001c000 { 406 compatible = "fsl,imx23-digctl"; 407 reg = <0x8001c000 2000>; 408 status = "disabled"; 409 }; 410 411 emi@80020000 { 412 reg = <0x80020000 0x2000>; 413 status = "disabled"; 414 }; 415 416 dma_apbx: dma-apbx@80024000 { 417 compatible = "fsl,imx23-dma-apbx"; 418 reg = <0x80024000 0x2000>; 419 interrupts = <7 5 9 26 420 19 0 25 23 421 60 58 9 0 422 0 0 0 0>; 423 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c", 424 "saif0", "empty", "auart0-rx", "auart0-tx", 425 "auart1-rx", "auart1-tx", "saif1", "empty", 426 "empty", "empty", "empty", "empty"; 427 #dma-cells = <1>; 428 dma-channels = <16>; 429 clocks = <&clks 16>; 430 }; 431 432 dcp@80028000 { 433 compatible = "fsl,imx23-dcp"; 434 reg = <0x80028000 0x2000>; 435 interrupts = <53 54>; 436 status = "okay"; 437 }; 438 439 pxp@8002a000 { 440 reg = <0x8002a000 0x2000>; 441 status = "disabled"; 442 }; 443 444 ocotp@8002c000 { 445 compatible = "fsl,imx23-ocotp", "fsl,ocotp"; 446 #address-cells = <1>; 447 #size-cells = <1>; 448 reg = <0x8002c000 0x2000>; 449 clocks = <&clks 15>; 450 }; 451 452 axi-ahb@8002e000 { 453 reg = <0x8002e000 0x2000>; 454 status = "disabled"; 455 }; 456 457 lcdif@80030000 { 458 compatible = "fsl,imx23-lcdif"; 459 reg = <0x80030000 2000>; 460 interrupts = <46 45>; 461 clocks = <&clks 38>; 462 status = "disabled"; 463 }; 464 465 ssp1: ssp@80034000 { 466 reg = <0x80034000 0x2000>; 467 interrupts = <2>; 468 clocks = <&clks 33>; 469 dmas = <&dma_apbh 2>; 470 dma-names = "rx-tx"; 471 status = "disabled"; 472 }; 473 474 tvenc@80038000 { 475 reg = <0x80038000 0x2000>; 476 status = "disabled"; 477 }; 478 }; 479 480 apbx@80040000 { 481 compatible = "simple-bus"; 482 #address-cells = <1>; 483 #size-cells = <1>; 484 reg = <0x80040000 0x40000>; 485 ranges; 486 487 clks: clkctrl@80040000 { 488 compatible = "fsl,imx23-clkctrl", "fsl,clkctrl"; 489 reg = <0x80040000 0x2000>; 490 #clock-cells = <1>; 491 }; 492 493 saif0: saif@80042000 { 494 reg = <0x80042000 0x2000>; 495 dmas = <&dma_apbx 4>; 496 dma-names = "rx-tx"; 497 status = "disabled"; 498 }; 499 500 power@80044000 { 501 reg = <0x80044000 0x2000>; 502 status = "disabled"; 503 }; 504 505 saif1: saif@80046000 { 506 reg = <0x80046000 0x2000>; 507 dmas = <&dma_apbx 10>; 508 dma-names = "rx-tx"; 509 status = "disabled"; 510 }; 511 512 audio-out@80048000 { 513 reg = <0x80048000 0x2000>; 514 dmas = <&dma_apbx 1>; 515 dma-names = "tx"; 516 status = "disabled"; 517 }; 518 519 audio-in@8004c000 { 520 reg = <0x8004c000 0x2000>; 521 dmas = <&dma_apbx 0>; 522 dma-names = "rx"; 523 status = "disabled"; 524 }; 525 526 lradc: lradc@80050000 { 527 compatible = "fsl,imx23-lradc"; 528 reg = <0x80050000 0x2000>; 529 interrupts = <36 37 38 39 40 41 42 43 44>; 530 status = "disabled"; 531 clocks = <&clks 26>; 532 #io-channel-cells = <1>; 533 }; 534 535 spdif@80054000 { 536 reg = <0x80054000 2000>; 537 dmas = <&dma_apbx 2>; 538 dma-names = "tx"; 539 status = "disabled"; 540 }; 541 542 i2c: i2c@80058000 { 543 #address-cells = <1>; 544 #size-cells = <0>; 545 compatible = "fsl,imx23-i2c"; 546 reg = <0x80058000 0x2000>; 547 interrupts = <27>; 548 clock-frequency = <100000>; 549 dmas = <&dma_apbx 3>; 550 dma-names = "rx-tx"; 551 status = "disabled"; 552 }; 553 554 rtc@8005c000 { 555 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc"; 556 reg = <0x8005c000 0x2000>; 557 interrupts = <22>; 558 }; 559 560 pwm: pwm@80064000 { 561 compatible = "fsl,imx23-pwm"; 562 reg = <0x80064000 0x2000>; 563 clocks = <&clks 30>; 564 #pwm-cells = <2>; 565 fsl,pwm-number = <5>; 566 status = "disabled"; 567 }; 568 569 timrot@80068000 { 570 compatible = "fsl,imx23-timrot", "fsl,timrot"; 571 reg = <0x80068000 0x2000>; 572 interrupts = <28 29 30 31>; 573 clocks = <&clks 28>; 574 }; 575 576 auart0: serial@8006c000 { 577 compatible = "fsl,imx23-auart"; 578 reg = <0x8006c000 0x2000>; 579 interrupts = <24>; 580 clocks = <&clks 32>; 581 dmas = <&dma_apbx 6>, <&dma_apbx 7>; 582 dma-names = "rx", "tx"; 583 status = "disabled"; 584 }; 585 586 auart1: serial@8006e000 { 587 compatible = "fsl,imx23-auart"; 588 reg = <0x8006e000 0x2000>; 589 interrupts = <59>; 590 clocks = <&clks 32>; 591 dmas = <&dma_apbx 8>, <&dma_apbx 9>; 592 dma-names = "rx", "tx"; 593 status = "disabled"; 594 }; 595 596 duart: serial@80070000 { 597 compatible = "arm,pl011", "arm,primecell"; 598 reg = <0x80070000 0x2000>; 599 interrupts = <0>; 600 clocks = <&clks 32>, <&clks 16>; 601 clock-names = "uart", "apb_pclk"; 602 status = "disabled"; 603 }; 604 605 usbphy0: usbphy@8007c000 { 606 compatible = "fsl,imx23-usbphy"; 607 reg = <0x8007c000 0x2000>; 608 clocks = <&clks 41>; 609 status = "disabled"; 610 }; 611 }; 612 }; 613 614 ahb@80080000 { 615 compatible = "simple-bus"; 616 #address-cells = <1>; 617 #size-cells = <1>; 618 reg = <0x80080000 0x80000>; 619 ranges; 620 621 usb0: usb@80080000 { 622 compatible = "fsl,imx23-usb", "fsl,imx27-usb"; 623 reg = <0x80080000 0x40000>; 624 interrupts = <11>; 625 fsl,usbphy = <&usbphy0>; 626 clocks = <&clks 40>; 627 status = "disabled"; 628 }; 629 }; 630 631 iio-hwmon { 632 compatible = "iio-hwmon"; 633 io-channels = <&lradc 8>; 634 }; 635}; 636