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1/*
2 * Copyright 2014 Carlo Caione <carlo@caione.org>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This library is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This library is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 *     You should have received a copy of the GNU General Public License
20 *     along with this program. If not, see <http://www.gnu.org/licenses/>.
21 *
22 * Or, alternatively,
23 *
24 *  b) Permission is hereby granted, free of charge, to any person
25 *     obtaining a copy of this software and associated documentation
26 *     files (the "Software"), to deal in the Software without
27 *     restriction, including without limitation the rights to use,
28 *     copy, modify, merge, publish, distribute, sublicense, and/or
29 *     sell copies of the Software, and to permit persons to whom the
30 *     Software is furnished to do so, subject to the following
31 *     conditions:
32 *
33 *     The above copyright notice and this permission notice shall be
34 *     included in all copies or substantial portions of the Software.
35 *
36 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 *     OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46#include <dt-bindings/clock/meson8b-clkc.h>
47#include <dt-bindings/gpio/meson8-gpio.h>
48#include "meson.dtsi"
49
50/ {
51	model = "Amlogic Meson8 SoC";
52	compatible = "amlogic,meson8";
53
54	cpus {
55		#address-cells = <1>;
56		#size-cells = <0>;
57
58		cpu@200 {
59			device_type = "cpu";
60			compatible = "arm,cortex-a9";
61			next-level-cache = <&L2>;
62			reg = <0x200>;
63		};
64
65		cpu@201 {
66			device_type = "cpu";
67			compatible = "arm,cortex-a9";
68			next-level-cache = <&L2>;
69			reg = <0x201>;
70		};
71
72		cpu@202 {
73			device_type = "cpu";
74			compatible = "arm,cortex-a9";
75			next-level-cache = <&L2>;
76			reg = <0x202>;
77		};
78
79		cpu@203 {
80			device_type = "cpu";
81			compatible = "arm,cortex-a9";
82			next-level-cache = <&L2>;
83			reg = <0x203>;
84		};
85	};
86
87	reserved-memory {
88		#address-cells = <1>;
89		#size-cells = <1>;
90		ranges;
91
92		/* 2 MiB reserved for Hardware ROM Firmware? */
93		hwrom@0 {
94			reg = <0x0 0x200000>;
95			no-map;
96		};
97
98		/*
99		 * 1 MiB reserved for the "ARM Power Firmware": this is ARM
100		 * code which is responsible for system suspend. It loads a
101		 * piece of ARC code ("arc_power" in the vendor u-boot tree)
102		 * into SRAM, executes that and shuts down the (last) ARM core.
103		 * The arc_power firmware then checks various wakeup sources
104		 * (IR remote receiver, HDMI CEC, WIFI and Bluetooth wakeup or
105		 * simply the power key) and re-starts the ARM core once it
106		 * detects a wakeup request.
107		 */
108		power-firmware@4f00000 {
109			reg = <0x4f00000 0x100000>;
110			no-map;
111		};
112	};
113
114	scu@c4300000 {
115		compatible = "arm,cortex-a9-scu";
116		reg = <0xc4300000 0x100>;
117	};
118}; /* end of / */
119
120&aobus {
121	pinctrl_aobus: pinctrl@84 {
122		compatible = "amlogic,meson8-aobus-pinctrl";
123		reg = <0x84 0xc>;
124		#address-cells = <1>;
125		#size-cells = <1>;
126		ranges;
127
128		gpio_ao: ao-bank@14 {
129			reg = <0x14 0x4>,
130			      <0x2c 0x4>,
131			      <0x24 0x8>;
132			reg-names = "mux", "pull", "gpio";
133			gpio-controller;
134			#gpio-cells = <2>;
135			gpio-ranges = <&pinctrl_aobus 0 120 16>;
136		};
137
138		uart_ao_a_pins: uart_ao_a {
139			mux {
140				groups = "uart_tx_ao_a", "uart_rx_ao_a";
141				function = "uart_ao";
142			};
143		};
144
145		i2c_ao_pins: i2c_mst_ao {
146			mux {
147				groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao";
148				function = "i2c_mst_ao";
149			};
150		};
151
152		ir_recv_pins: remote {
153			mux {
154				groups = "remote_input";
155				function = "remote";
156			};
157		};
158
159		pwm_f_ao_pins: pwm-f-ao {
160			mux {
161				groups = "pwm_f_ao";
162				function = "pwm_f_ao";
163			};
164		};
165	};
166};
167
168&cbus {
169	clkc: clock-controller@4000 {
170		#clock-cells = <1>;
171		#reset-cells = <1>;
172		compatible = "amlogic,meson8-clkc";
173		reg = <0x8000 0x4>, <0x4000 0x400>;
174	};
175
176	pwm_ef: pwm@86c0 {
177		compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
178		reg = <0x86c0 0x10>;
179		#pwm-cells = <3>;
180		status = "disabled";
181	};
182
183	pinctrl_cbus: pinctrl@9880 {
184		compatible = "amlogic,meson8-cbus-pinctrl";
185		reg = <0x9880 0x10>;
186		#address-cells = <1>;
187		#size-cells = <1>;
188		ranges;
189
190		gpio: banks@80b0 {
191			reg = <0x80b0 0x28>,
192			      <0x80e8 0x18>,
193			      <0x8120 0x18>,
194			      <0x8030 0x30>;
195			reg-names = "mux", "pull", "pull-enable", "gpio";
196			gpio-controller;
197			#gpio-cells = <2>;
198			gpio-ranges = <&pinctrl_cbus 0 0 120>;
199		};
200
201		sd_a_pins: sd-a {
202			mux {
203				groups = "sd_d0_a", "sd_d1_a", "sd_d2_a",
204					"sd_d3_a", "sd_clk_a", "sd_cmd_a";
205				function = "sd_a";
206			};
207		};
208
209		sd_b_pins: sd-b {
210			mux {
211				groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
212					"sd_d3_b", "sd_clk_b", "sd_cmd_b";
213				function = "sd_b";
214			};
215		};
216
217		sd_c_pins: sd-c {
218			mux {
219				groups = "sd_d0_c", "sd_d1_c", "sd_d2_c",
220					"sd_d3_c", "sd_clk_c", "sd_cmd_c";
221				function = "sd_c";
222			};
223		};
224
225		spi_nor_pins: nor {
226			mux {
227				groups = "nor_d", "nor_q", "nor_c", "nor_cs";
228				function = "nor";
229			};
230		};
231
232		eth_pins: ethernet {
233			mux {
234				groups = "eth_tx_clk_50m", "eth_tx_en",
235					 "eth_txd1", "eth_txd0",
236					 "eth_rx_clk_in", "eth_rx_dv",
237					 "eth_rxd1", "eth_rxd0", "eth_mdio",
238					 "eth_mdc";
239				function = "ethernet";
240			};
241		};
242
243		pwm_e_pins: pwm-e {
244			mux {
245				groups = "pwm_e";
246				function = "pwm_e";
247			};
248		};
249	};
250};
251
252&ethmac {
253	clocks = <&clkc CLKID_ETH>;
254	clock-names = "stmmaceth";
255};
256
257&hwrng {
258	compatible = "amlogic,meson8-rng", "amlogic,meson-rng";
259	clocks = <&clkc CLKID_RNG0>;
260	clock-names = "core";
261};
262
263&i2c_AO {
264	clocks = <&clkc CLKID_CLK81>;
265};
266
267&i2c_A {
268	clocks = <&clkc CLKID_CLK81>;
269};
270
271&i2c_B {
272	clocks = <&clkc CLKID_CLK81>;
273};
274
275&L2 {
276	arm,data-latency = <3 3 3>;
277	arm,tag-latency = <2 2 2>;
278	arm,filter-ranges = <0x100000 0xc0000000>;
279};
280
281&pwm_ab {
282	compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
283};
284
285&pwm_cd {
286	compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
287};
288
289&saradc {
290	compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc";
291	clocks = <&clkc CLKID_XTAL>,
292		<&clkc CLKID_SAR_ADC>,
293		<&clkc CLKID_SANA>;
294	clock-names = "clkin", "core", "sana";
295};
296
297&spifc {
298	clocks = <&clkc CLKID_CLK81>;
299};
300
301&uart_AO {
302	clocks = <&clkc CLKID_CLK81>;
303};
304
305&uart_A {
306	clocks = <&clkc CLKID_CLK81>;
307};
308
309&uart_B {
310	clocks = <&clkc CLKID_CLK81>;
311};
312
313&uart_C {
314	clocks = <&clkc CLKID_CLK81>;
315};
316
317&usb0 {
318	compatible = "amlogic,meson8-usb", "snps,dwc2";
319	clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
320	clock-names = "otg";
321};
322
323&usb1 {
324	compatible = "amlogic,meson8-usb", "snps,dwc2";
325	clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
326	clock-names = "otg";
327};
328
329&usb0_phy {
330	compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
331	clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
332	clock-names = "usb_general", "usb";
333};
334
335&usb1_phy {
336	compatible = "amlogic,meson8-usb2-phy", "amlogic,meson-mx-usb2-phy";
337	clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
338	clock-names = "usb_general", "usb";
339};
340