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1/*
2 * Copyright (C) 2015 Altera Corporation <www.altera.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
16 */
17#include "socfpga_arria10.dtsi"
18
19/ {
20	model = "Altera SOCFPGA Arria 10";
21	compatible = "altr,socfpga-arria10", "altr,socfpga";
22
23	aliases {
24		ethernet0 = &gmac0;
25		serial0 = &uart1;
26	};
27
28	chosen {
29		bootargs = "earlyprintk";
30		stdout-path = "serial0:115200n8";
31	};
32
33	memory@0 {
34		name = "memory";
35		device_type = "memory";
36		reg = <0x0 0x40000000>; /* 1GB */
37	};
38
39	a10leds {
40		compatible = "gpio-leds";
41
42		a10sr_led0 {
43			label = "a10sr-led0";
44			gpios = <&a10sr_gpio 0 1>;
45		};
46
47		a10sr_led1 {
48			label = "a10sr-led1";
49			gpios = <&a10sr_gpio 1 1>;
50		};
51
52		a10sr_led2 {
53			label = "a10sr-led2";
54			gpios = <&a10sr_gpio 2 1>;
55		};
56
57		a10sr_led3 {
58			label = "a10sr-led3";
59			gpios = <&a10sr_gpio 3 1>;
60		};
61	};
62
63	soc {
64		clkmgr@ffd04000 {
65			clocks {
66				osc1 {
67					clock-frequency = <25000000>;
68				};
69			};
70		};
71	};
72};
73
74&gmac0 {
75	phy-mode = "rgmii";
76	phy-addr = <0xffffffff>; /* probe for phy addr */
77
78	/*
79	 * These skews assume the user's FPGA design is adding 600ps of delay
80	 * for TX_CLK on Arria 10.
81	 *
82	 * All skews are offset since hardware skew values for the ksz9031
83	 * range from a negative skew to a positive skew.
84	 * See the micrel-ksz90x1.txt Documentation file for details.
85	 */
86	txd0-skew-ps = <0>; /* -420ps */
87	txd1-skew-ps = <0>; /* -420ps */
88	txd2-skew-ps = <0>; /* -420ps */
89	txd3-skew-ps = <0>; /* -420ps */
90	rxd0-skew-ps = <420>; /* 0ps */
91	rxd1-skew-ps = <420>; /* 0ps */
92	rxd2-skew-ps = <420>; /* 0ps */
93	rxd3-skew-ps = <420>; /* 0ps */
94	txen-skew-ps = <0>; /* -420ps */
95	txc-skew-ps = <1860>; /* 960ps */
96	rxdv-skew-ps = <420>; /* 0ps */
97	rxc-skew-ps = <1680>; /* 780ps */
98	max-frame-size = <3800>;
99	status = "okay";
100};
101
102&gpio1 {
103	status = "okay";
104};
105
106&spi1 {
107	status = "okay";
108
109	resource-manager@0 {
110		compatible = "altr,a10sr";
111		reg = <0>;
112		spi-max-frequency = <100000>;
113		/* low-level active IRQ at GPIO1_5 */
114		interrupt-parent = <&portb>;
115		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
116		interrupt-controller;
117		#interrupt-cells = <2>;
118
119		a10sr_gpio: gpio-controller {
120			compatible = "altr,a10sr-gpio";
121			gpio-controller;
122			#gpio-cells = <2>;
123		};
124
125		a10sr_rst: reset-controller {
126			compatible = "altr,a10sr-reset";
127			#reset-cells = <1>;
128		};
129	};
130};
131
132&i2c1 {
133	status = "okay";
134
135	/*
136	 * adjust the falling times to decrease the i2c frequency to 50Khz
137	 * because the LCD module does not work at the standard 100Khz
138	 */
139	clock-frequency = <100000>;
140	i2c-sda-falling-time-ns = <6000>;
141	i2c-scl-falling-time-ns = <6000>;
142
143	eeprom@51 {
144		compatible = "atmel,24c32";
145		reg = <0x51>;
146		pagesize = <32>;
147	};
148
149	rtc@68 {
150		compatible = "dallas,ds1339";
151		reg = <0x68>;
152	};
153
154	ltc@5c {
155		compatible = "ltc2977";
156		reg = <0x5c>;
157	};
158};
159
160&uart1 {
161	status = "okay";
162};
163
164&usb0 {
165	status = "okay";
166};
167
168&watchdog1 {
169	status = "okay";
170};
171