1 /*
2 * arch/arm/kernel/topology.c
3 *
4 * Copyright (C) 2011 Linaro Limited.
5 * Written by: Vincent Guittot
6 *
7 * based on arch/sh/kernel/topology.c
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13
14 #include <linux/arch_topology.h>
15 #include <linux/cpu.h>
16 #include <linux/cpufreq.h>
17 #include <linux/cpumask.h>
18 #include <linux/export.h>
19 #include <linux/init.h>
20 #include <linux/percpu.h>
21 #include <linux/node.h>
22 #include <linux/nodemask.h>
23 #include <linux/of.h>
24 #include <linux/sched.h>
25 #include <linux/sched/topology.h>
26 #include <linux/sched/energy.h>
27 #include <linux/slab.h>
28 #include <linux/string.h>
29
30 #include <asm/cpu.h>
31 #include <asm/cputype.h>
32 #include <asm/topology.h>
33
34 static inline
cpu_core_energy(int cpu)35 const struct sched_group_energy * const cpu_core_energy(int cpu)
36 {
37 return sge_array[cpu][SD_LEVEL0];
38 }
39
40 static inline
cpu_cluster_energy(int cpu)41 const struct sched_group_energy * const cpu_cluster_energy(int cpu)
42 {
43 return sge_array[cpu][SD_LEVEL1];
44 }
45
46 /*
47 * cpu capacity scale management
48 */
49
50 /*
51 * cpu capacity table
52 * This per cpu data structure describes the relative capacity of each core.
53 * On a heteregenous system, cores don't have the same computation capacity
54 * and we reflect that difference in the cpu_capacity field so the scheduler
55 * can take this difference into account during load balance. A per cpu
56 * structure is preferred because each CPU updates its own cpu_capacity field
57 * during the load balance except for idle cores. One idle core is selected
58 * to run the rebalance_domains for all idle cores and the cpu_capacity can be
59 * updated during this sequence.
60 */
61
62 #ifdef CONFIG_OF
63 struct cpu_efficiency {
64 const char *compatible;
65 unsigned long efficiency;
66 };
67
68 /*
69 * Table of relative efficiency of each processors
70 * The efficiency value must fit in 20bit and the final
71 * cpu_scale value must be in the range
72 * 0 < cpu_scale < 3*SCHED_CAPACITY_SCALE/2
73 * in order to return at most 1 when DIV_ROUND_CLOSEST
74 * is used to compute the capacity of a CPU.
75 * Processors that are not defined in the table,
76 * use the default SCHED_CAPACITY_SCALE value for cpu_scale.
77 */
78 static const struct cpu_efficiency table_efficiency[] = {
79 {"arm,cortex-a15", 3891},
80 {"arm,cortex-a7", 2048},
81 {NULL, },
82 };
83
84 static unsigned long *__cpu_capacity;
85 #define cpu_capacity(cpu) __cpu_capacity[cpu]
86
87 static unsigned long middle_capacity = 1;
88 static bool cap_from_dt = true;
89
90 /*
91 * Iterate all CPUs' descriptor in DT and compute the efficiency
92 * (as per table_efficiency). Also calculate a middle efficiency
93 * as close as possible to (max{eff_i} - min{eff_i}) / 2
94 * This is later used to scale the cpu_capacity field such that an
95 * 'average' CPU is of middle capacity. Also see the comments near
96 * table_efficiency[] and update_cpu_capacity().
97 */
parse_dt_topology(void)98 static void __init parse_dt_topology(void)
99 {
100 const struct cpu_efficiency *cpu_eff;
101 struct device_node *cn = NULL;
102 unsigned long min_capacity = ULONG_MAX;
103 unsigned long max_capacity = 0;
104 unsigned long capacity = 0;
105 int cpu = 0;
106
107 __cpu_capacity = kcalloc(nr_cpu_ids, sizeof(*__cpu_capacity),
108 GFP_NOWAIT);
109
110 cn = of_find_node_by_path("/cpus");
111 if (!cn) {
112 pr_err("No CPU information found in DT\n");
113 return;
114 }
115
116 for_each_possible_cpu(cpu) {
117 const u32 *rate;
118 int len;
119
120 /* too early to use cpu->of_node */
121 cn = of_get_cpu_node(cpu, NULL);
122 if (!cn) {
123 pr_err("missing device node for CPU %d\n", cpu);
124 continue;
125 }
126
127 if (topology_parse_cpu_capacity(cn, cpu)) {
128 of_node_put(cn);
129 continue;
130 }
131
132 cap_from_dt = false;
133
134 for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++)
135 if (of_device_is_compatible(cn, cpu_eff->compatible))
136 break;
137
138 if (cpu_eff->compatible == NULL)
139 continue;
140
141 rate = of_get_property(cn, "clock-frequency", &len);
142 if (!rate || len != 4) {
143 pr_err("%pOF missing clock-frequency property\n", cn);
144 continue;
145 }
146
147 capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency;
148
149 /* Save min capacity of the system */
150 if (capacity < min_capacity)
151 min_capacity = capacity;
152
153 /* Save max capacity of the system */
154 if (capacity > max_capacity)
155 max_capacity = capacity;
156
157 cpu_capacity(cpu) = capacity;
158 }
159
160 /* If min and max capacities are equals, we bypass the update of the
161 * cpu_scale because all CPUs have the same capacity. Otherwise, we
162 * compute a middle_capacity factor that will ensure that the capacity
163 * of an 'average' CPU of the system will be as close as possible to
164 * SCHED_CAPACITY_SCALE, which is the default value, but with the
165 * constraint explained near table_efficiency[].
166 */
167 if (4*max_capacity < (3*(max_capacity + min_capacity)))
168 middle_capacity = (min_capacity + max_capacity)
169 >> (SCHED_CAPACITY_SHIFT+1);
170 else
171 middle_capacity = ((max_capacity / 3)
172 >> (SCHED_CAPACITY_SHIFT-1)) + 1;
173
174 if (cap_from_dt)
175 topology_normalize_cpu_scale();
176 }
177
178 /*
179 * Look for a customed capacity of a CPU in the cpu_capacity table during the
180 * boot. The update of all CPUs is in O(n^2) for heteregeneous system but the
181 * function returns directly for SMP system.
182 */
update_cpu_capacity(unsigned int cpu)183 static void update_cpu_capacity(unsigned int cpu)
184 {
185 if (!cpu_capacity(cpu) || cap_from_dt)
186 return;
187
188 topology_set_cpu_scale(cpu, cpu_capacity(cpu) / middle_capacity);
189
190 pr_info("CPU%u: update cpu_capacity %lu\n",
191 cpu, topology_get_cpu_scale(NULL, cpu));
192 }
193
194 #else
parse_dt_topology(void)195 static inline void parse_dt_topology(void) {}
update_cpu_capacity(unsigned int cpuid)196 static inline void update_cpu_capacity(unsigned int cpuid) {}
197 #endif
198
199 /*
200 * cpu topology table
201 */
202 struct cputopo_arm cpu_topology[NR_CPUS];
203 EXPORT_SYMBOL_GPL(cpu_topology);
204
cpu_coregroup_mask(int cpu)205 const struct cpumask *cpu_coregroup_mask(int cpu)
206 {
207 return &cpu_topology[cpu].core_sibling;
208 }
209
210 /*
211 * The current assumption is that we can power gate each core independently.
212 * This will be superseded by DT binding once available.
213 */
cpu_corepower_mask(int cpu)214 const struct cpumask *cpu_corepower_mask(int cpu)
215 {
216 return &cpu_topology[cpu].thread_sibling;
217 }
218
update_siblings_masks(unsigned int cpuid)219 static void update_siblings_masks(unsigned int cpuid)
220 {
221 struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
222 int cpu;
223
224 /* update core and thread sibling masks */
225 for_each_possible_cpu(cpu) {
226 cpu_topo = &cpu_topology[cpu];
227
228 if (cpuid_topo->socket_id != cpu_topo->socket_id)
229 continue;
230
231 cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
232 if (cpu != cpuid)
233 cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
234
235 if (cpuid_topo->core_id != cpu_topo->core_id)
236 continue;
237
238 cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling);
239 if (cpu != cpuid)
240 cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
241 }
242 smp_wmb();
243 }
244
245 /*
246 * store_cpu_topology is called at boot when only one cpu is running
247 * and with the mutex cpu_hotplug.lock locked, when several cpus have booted,
248 * which prevents simultaneous write access to cpu_topology array
249 */
store_cpu_topology(unsigned int cpuid)250 void store_cpu_topology(unsigned int cpuid)
251 {
252 struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid];
253 unsigned int mpidr;
254
255 /* If the cpu topology has been already set, just return */
256 if (cpuid_topo->core_id != -1)
257 return;
258
259 mpidr = read_cpuid_mpidr();
260
261 /* create cpu topology mapping */
262 if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) {
263 /*
264 * This is a multiprocessor system
265 * multiprocessor format & multiprocessor mode field are set
266 */
267
268 if (mpidr & MPIDR_MT_BITMASK) {
269 /* core performance interdependency */
270 cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
271 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
272 cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);
273 } else {
274 /* largely independent cores */
275 cpuid_topo->thread_id = -1;
276 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
277 cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
278 }
279 } else {
280 /*
281 * This is an uniprocessor system
282 * we are in multiprocessor format but uniprocessor system
283 * or in the old uniprocessor format
284 */
285 cpuid_topo->thread_id = -1;
286 cpuid_topo->core_id = 0;
287 cpuid_topo->socket_id = -1;
288 }
289
290 update_siblings_masks(cpuid);
291
292 update_cpu_capacity(cpuid);
293
294 topology_detect_flags();
295
296 pr_info("CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n",
297 cpuid, cpu_topology[cpuid].thread_id,
298 cpu_topology[cpuid].core_id,
299 cpu_topology[cpuid].socket_id, mpidr);
300 }
301
302 #ifdef CONFIG_SCHED_MC
core_flags(void)303 static int core_flags(void)
304 {
305 return cpu_core_flags() | topology_core_flags();
306 }
307
cpu_corepower_flags(void)308 static inline int cpu_corepower_flags(void)
309 {
310 return topology_core_flags()
311 | SD_SHARE_PKG_RESOURCES | SD_SHARE_POWERDOMAIN;
312 }
313 #endif
314
cpu_flags(void)315 static int cpu_flags(void)
316 {
317 return topology_cpu_flags();
318 }
319
320 static struct sched_domain_topology_level arm_topology[] = {
321 #ifdef CONFIG_SCHED_MC
322 { cpu_coregroup_mask, core_flags, cpu_core_energy, SD_INIT_NAME(MC) },
323 #endif
324 { cpu_cpu_mask, cpu_flags, cpu_cluster_energy, SD_INIT_NAME(DIE) },
325 { NULL, },
326 };
327
328 /*
329 * init_cpu_topology is called at boot when only one cpu is running
330 * which prevent simultaneous write access to cpu_topology array
331 */
init_cpu_topology(void)332 void __init init_cpu_topology(void)
333 {
334 unsigned int cpu;
335
336 /* init core mask and capacity */
337 for_each_possible_cpu(cpu) {
338 struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]);
339
340 cpu_topo->thread_id = -1;
341 cpu_topo->core_id = -1;
342 cpu_topo->socket_id = -1;
343 cpumask_clear(&cpu_topo->core_sibling);
344 cpumask_clear(&cpu_topo->thread_sibling);
345 }
346 smp_wmb();
347
348 parse_dt_topology();
349
350 /* Set scheduler topology descriptor */
351 set_sched_topology(arm_topology);
352 }
353