1 /*
2 * arch/arm/mach-ep93xx/include/mach/uncompress.h
3 *
4 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
10 */
11
12 #include <mach/ep93xx-regs.h>
13 #include <asm/mach-types.h>
14
__raw_readb(unsigned int ptr)15 static unsigned char __raw_readb(unsigned int ptr)
16 {
17 return *((volatile unsigned char *)ptr);
18 }
19
__raw_readl(unsigned int ptr)20 static unsigned int __raw_readl(unsigned int ptr)
21 {
22 return *((volatile unsigned int *)ptr);
23 }
24
__raw_writeb(unsigned char value,unsigned int ptr)25 static void __raw_writeb(unsigned char value, unsigned int ptr)
26 {
27 *((volatile unsigned char *)ptr) = value;
28 }
29
__raw_writel(unsigned int value,unsigned int ptr)30 static void __raw_writel(unsigned int value, unsigned int ptr)
31 {
32 *((volatile unsigned int *)ptr) = value;
33 }
34
35 #define PHYS_UART_DATA (CONFIG_DEBUG_UART_PHYS + 0x00)
36 #define PHYS_UART_FLAG (CONFIG_DEBUG_UART_PHYS + 0x18)
37 #define UART_FLAG_TXFF 0x20
38
putc(int c)39 static inline void putc(int c)
40 {
41 int i;
42
43 for (i = 0; i < 10000; i++) {
44 /* Transmit fifo not full? */
45 if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
46 break;
47 }
48
49 __raw_writeb(c, PHYS_UART_DATA);
50 }
51
flush(void)52 static inline void flush(void)
53 {
54 }
55
56
57 /*
58 * Some bootloaders don't turn off DMA from the ethernet MAC before
59 * jumping to linux, which means that we might end up with bits of RX
60 * status and packet data scribbled over the uncompressed kernel image.
61 * Work around this by resetting the ethernet MAC before we uncompress.
62 */
63 #define PHYS_ETH_SELF_CTL 0x80010020
64 #define ETH_SELF_CTL_RESET 0x00000001
65
ethernet_reset(void)66 static void ethernet_reset(void)
67 {
68 unsigned int v;
69
70 /* Reset the ethernet MAC. */
71 v = __raw_readl(PHYS_ETH_SELF_CTL);
72 __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
73
74 /* Wait for reset to finish. */
75 while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
76 ;
77 }
78
79 #define TS72XX_WDT_CONTROL_PHYS_BASE 0x23800000
80 #define TS72XX_WDT_FEED_PHYS_BASE 0x23c00000
81 #define TS72XX_WDT_FEED_VAL 0x05
82
ts72xx_watchdog_disable(void)83 static void __maybe_unused ts72xx_watchdog_disable(void)
84 {
85 __raw_writeb(TS72XX_WDT_FEED_VAL, TS72XX_WDT_FEED_PHYS_BASE);
86 __raw_writeb(0, TS72XX_WDT_CONTROL_PHYS_BASE);
87 }
88
arch_decomp_setup(void)89 static void arch_decomp_setup(void)
90 {
91 if (machine_is_ts72xx())
92 ts72xx_watchdog_disable();
93 ethernet_reset();
94 }
95