1 /* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
2 *
3 * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
4 * Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
5 * and modifications by SBZ <sbz@spgui.org> and
6 * Weibing <http://weibing.blogbus.com>
7 *
8 * For product information, visit http://www.arm.com/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/gpio.h>
18 #include <linux/interrupt.h>
19 #include <linux/list.h>
20 #include <linux/timer.h>
21 #include <linux/init.h>
22 #include <linux/io.h>
23 #include <linux/serial_core.h>
24 #include <linux/serial_s3c.h>
25 #include <linux/dm9000.h>
26 #include <linux/platform_device.h>
27
28 #include <asm/mach/arch.h>
29 #include <asm/mach/map.h>
30 #include <asm/mach/irq.h>
31
32 #include <mach/hardware.h>
33 #include <mach/fb.h>
34 #include <asm/irq.h>
35 #include <asm/mach-types.h>
36
37 #include <mach/regs-gpio.h>
38 #include <mach/regs-lcd.h>
39 #include <mach/gpio-samsung.h>
40 #include <linux/platform_data/mtd-nand-s3c2410.h>
41 #include <linux/platform_data/i2c-s3c2410.h>
42
43 #include <linux/mtd/mtd.h>
44 #include <linux/mtd/rawnand.h>
45 #include <linux/mtd/nand_ecc.h>
46 #include <linux/mtd/partitions.h>
47
48 #include <plat/devs.h>
49 #include <plat/cpu.h>
50 #include <linux/platform_data/mmc-s3cmci.h>
51 #include <plat/samsung-time.h>
52
53 #include "common.h"
54
55 static struct map_desc at2440evb_iodesc[] __initdata = {
56 /* Nothing here */
57 };
58
59 #define UCON S3C2410_UCON_DEFAULT
60 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
61 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
62
63 static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
64 [0] = {
65 .hwport = 0,
66 .flags = 0,
67 .ucon = UCON,
68 .ulcon = ULCON,
69 .ufcon = UFCON,
70 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
71 },
72 [1] = {
73 .hwport = 1,
74 .flags = 0,
75 .ucon = UCON,
76 .ulcon = ULCON,
77 .ufcon = UFCON,
78 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
79 },
80 };
81
82 /* NAND Flash on AT2440EVB board */
83
84 static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
85 [0] = {
86 .name = "Boot Agent",
87 .size = SZ_256K,
88 .offset = 0,
89 },
90 [1] = {
91 .name = "Kernel",
92 .size = SZ_2M,
93 .offset = SZ_256K,
94 },
95 [2] = {
96 .name = "Root",
97 .offset = SZ_256K + SZ_2M,
98 .size = MTDPART_SIZ_FULL,
99 },
100 };
101
102 static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
103 [0] = {
104 .name = "nand",
105 .nr_chips = 1,
106 .nr_partitions = ARRAY_SIZE(at2440evb_default_nand_part),
107 .partitions = at2440evb_default_nand_part,
108 },
109 };
110
111 static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
112 .tacls = 25,
113 .twrph0 = 55,
114 .twrph1 = 40,
115 .nr_sets = ARRAY_SIZE(at2440evb_nand_sets),
116 .sets = at2440evb_nand_sets,
117 .ecc_mode = NAND_ECC_SOFT,
118 };
119
120 /* DM9000AEP 10/100 ethernet controller */
121
122 static struct resource at2440evb_dm9k_resource[] = {
123 [0] = DEFINE_RES_MEM(S3C2410_CS3, 4),
124 [1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),
125 [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
126 | IORESOURCE_IRQ_HIGHEDGE),
127 };
128
129 static struct dm9000_plat_data at2440evb_dm9k_pdata = {
130 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
131 };
132
133 static struct platform_device at2440evb_device_eth = {
134 .name = "dm9000",
135 .id = -1,
136 .num_resources = ARRAY_SIZE(at2440evb_dm9k_resource),
137 .resource = at2440evb_dm9k_resource,
138 .dev = {
139 .platform_data = &at2440evb_dm9k_pdata,
140 },
141 };
142
143 static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
144 .gpio_detect = S3C2410_GPG(10),
145 };
146
147 /* 7" LCD panel */
148
149 static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
150
151 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
152 S3C2410_LCDCON5_INVVLINE |
153 S3C2410_LCDCON5_INVVFRAME |
154 S3C2410_LCDCON5_PWREN |
155 S3C2410_LCDCON5_HWSWP,
156
157 .type = S3C2410_LCDCON1_TFT,
158
159 .width = 800,
160 .height = 480,
161
162 .pixclock = 33333, /* HCLK 60 MHz, divisor 2 */
163 .xres = 800,
164 .yres = 480,
165 .bpp = 16,
166 .left_margin = 88,
167 .right_margin = 40,
168 .hsync_len = 128,
169 .upper_margin = 32,
170 .lower_margin = 11,
171 .vsync_len = 2,
172 };
173
174 static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
175 .displays = &at2440evb_lcd_cfg,
176 .num_displays = 1,
177 .default_display = 0,
178 };
179
180 static struct platform_device *at2440evb_devices[] __initdata = {
181 &s3c_device_ohci,
182 &s3c_device_wdt,
183 &s3c_device_adc,
184 &s3c_device_i2c0,
185 &s3c_device_rtc,
186 &s3c_device_nand,
187 &s3c_device_sdi,
188 &s3c_device_lcd,
189 &at2440evb_device_eth,
190 };
191
at2440evb_map_io(void)192 static void __init at2440evb_map_io(void)
193 {
194 s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
195 s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
196 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
197 }
198
at2440evb_init_time(void)199 static void __init at2440evb_init_time(void)
200 {
201 s3c2440_init_clocks(16934400);
202 samsung_timer_init();
203 }
204
at2440evb_init(void)205 static void __init at2440evb_init(void)
206 {
207 s3c24xx_fb_set_platdata(&at2440evb_fb_info);
208 s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
209 s3c_nand_set_platdata(&at2440evb_nand_info);
210 s3c_i2c0_set_platdata(NULL);
211
212 platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
213 }
214
215
216 MACHINE_START(AT2440EVB, "AT2440EVB")
217 .atag_offset = 0x100,
218 .map_io = at2440evb_map_io,
219 .init_machine = at2440evb_init,
220 .init_irq = s3c2440_init_irq,
221 .init_time = at2440evb_init_time,
222 MACHINE_END
223