1/* 2 * SAMSUNG Exynos5433 TM2 board device tree source 3 * 4 * Copyright (c) 2016 Samsung Electronics Co., Ltd. 5 * 6 * Common device tree source file for Samsung's TM2 and TM2E boards 7 * which are based on Samsung Exynos5433 SoC. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14/dts-v1/; 15#include "exynos5433.dtsi" 16#include <dt-bindings/clock/samsung,s2mps11.h> 17#include <dt-bindings/gpio/gpio.h> 18#include <dt-bindings/input/input.h> 19#include <dt-bindings/interrupt-controller/irq.h> 20 21/ { 22 aliases { 23 gsc0 = &gsc_0; 24 gsc1 = &gsc_1; 25 gsc2 = &gsc_2; 26 pinctrl0 = &pinctrl_alive; 27 pinctrl1 = &pinctrl_aud; 28 pinctrl2 = &pinctrl_cpif; 29 pinctrl3 = &pinctrl_ese; 30 pinctrl4 = &pinctrl_finger; 31 pinctrl5 = &pinctrl_fsys; 32 pinctrl6 = &pinctrl_imem; 33 pinctrl7 = &pinctrl_nfc; 34 pinctrl8 = &pinctrl_peric; 35 pinctrl9 = &pinctrl_touch; 36 serial0 = &serial_0; 37 serial1 = &serial_1; 38 serial2 = &serial_2; 39 serial3 = &serial_3; 40 spi0 = &spi_0; 41 spi1 = &spi_1; 42 spi2 = &spi_2; 43 spi3 = &spi_3; 44 spi4 = &spi_4; 45 mshc0 = &mshc_0; 46 mshc2 = &mshc_2; 47 }; 48 49 chosen { 50 stdout-path = &serial_1; 51 }; 52 53 memory@20000000 { 54 device_type = "memory"; 55 reg = <0x0 0x20000000 0x0 0xc0000000>; 56 }; 57 58 gpio-keys { 59 compatible = "gpio-keys"; 60 61 power-key { 62 gpios = <&gpa2 7 GPIO_ACTIVE_LOW>; 63 linux,code = <KEY_POWER>; 64 label = "power key"; 65 debounce-interval = <10>; 66 }; 67 68 volume-up-key { 69 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>; 70 linux,code = <KEY_VOLUMEUP>; 71 label = "volume-up key"; 72 debounce-interval = <10>; 73 }; 74 75 volume-down-key { 76 gpios = <&gpa2 1 GPIO_ACTIVE_LOW>; 77 linux,code = <KEY_VOLUMEDOWN>; 78 label = "volume-down key"; 79 debounce-interval = <10>; 80 }; 81 82 homepage-key { 83 gpios = <&gpa0 3 GPIO_ACTIVE_LOW>; 84 linux,code = <KEY_MENU>; 85 label = "homepage key"; 86 debounce-interval = <10>; 87 }; 88 }; 89 90 i2c_max98504: i2c-gpio-0 { 91 compatible = "i2c-gpio"; 92 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */ 93 &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >; 94 i2c-gpio,delay-us = <2>; 95 #address-cells = <1>; 96 #size-cells = <0>; 97 status = "okay"; 98 99 max98504: max98504@31 { 100 compatible = "maxim,max98504"; 101 reg = <0x31>; 102 maxim,rx-path = <1>; 103 maxim,tx-path = <1>; 104 maxim,tx-channel-mask = <3>; 105 maxim,tx-channel-source = <2>; 106 }; 107 }; 108 109 irda_regulator: irda-regulator { 110 compatible = "regulator-fixed"; 111 enable-active-high; 112 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>; 113 regulator-name = "irda_regulator"; 114 }; 115 116 sound { 117 compatible = "samsung,tm2-audio"; 118 audio-codec = <&wm5110>; 119 i2s-controller = <&i2s0>; 120 audio-amplifier = <&max98504>; 121 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>; 122 model = "wm5110"; 123 samsung,audio-routing = 124 /* Headphone */ 125 "HP", "HPOUT1L", 126 "HP", "HPOUT1R", 127 128 /* Speaker */ 129 "SPK", "SPKOUT", 130 "SPKOUT", "HPOUT2L", 131 "SPKOUT", "HPOUT2R", 132 133 /* Receiver */ 134 "RCV", "HPOUT3L", 135 "RCV", "HPOUT3R"; 136 status = "okay"; 137 }; 138}; 139 140&adc { 141 vdd-supply = <&ldo3_reg>; 142 status = "okay"; 143 144 thermistor-ap { 145 compatible = "murata,ncp03wf104"; 146 pullup-uv = <1800000>; 147 pullup-ohm = <100000>; 148 pulldown-ohm = <0>; 149 io-channels = <&adc 0>; 150 }; 151 152 thermistor-battery { 153 compatible = "murata,ncp03wf104"; 154 pullup-uv = <1800000>; 155 pullup-ohm = <100000>; 156 pulldown-ohm = <0>; 157 io-channels = <&adc 1>; 158 #thermal-sensor-cells = <0>; 159 }; 160 161 thermistor-charger { 162 compatible = "murata,ncp03wf104"; 163 pullup-uv = <1800000>; 164 pullup-ohm = <100000>; 165 pulldown-ohm = <0>; 166 io-channels = <&adc 2>; 167 }; 168}; 169 170&bus_g2d_400 { 171 devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>; 172 vdd-supply = <&buck4_reg>; 173 exynos,saturation-ratio = <10>; 174 status = "okay"; 175}; 176 177&bus_g2d_266 { 178 devfreq = <&bus_g2d_400>; 179 status = "okay"; 180}; 181 182&bus_gscl { 183 devfreq = <&bus_g2d_400>; 184 status = "okay"; 185}; 186 187&bus_hevc { 188 devfreq = <&bus_g2d_400>; 189 status = "okay"; 190}; 191 192&bus_jpeg { 193 devfreq = <&bus_g2d_400>; 194 status = "okay"; 195}; 196 197&bus_mfc { 198 devfreq = <&bus_g2d_400>; 199 status = "okay"; 200}; 201 202&bus_mscl { 203 devfreq = <&bus_g2d_400>; 204 status = "okay"; 205}; 206 207&bus_noc0 { 208 devfreq = <&bus_g2d_400>; 209 status = "okay"; 210}; 211 212&bus_noc1 { 213 devfreq = <&bus_g2d_400>; 214 status = "okay"; 215}; 216 217&bus_noc2 { 218 devfreq = <&bus_g2d_400>; 219 status = "okay"; 220}; 221 222&cmu_aud { 223 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>; 224 assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>; 225}; 226 227&cmu_fsys { 228 assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, 229 <&cmu_top CLK_MOUT_SCLK_USBHOST30>, 230 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, 231 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, 232 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, 233 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, 234 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, 235 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, 236 <&cmu_top CLK_DIV_SCLK_USBDRD30>, 237 <&cmu_top CLK_DIV_SCLK_USBHOST30>; 238 assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>, 239 <&cmu_top CLK_MOUT_BUS_PLL_USER>, 240 <&cmu_top CLK_SCLK_USBDRD30_FSYS>, 241 <&cmu_top CLK_SCLK_USBHOST30_FSYS>, 242 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, 243 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, 244 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, 245 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; 246 assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, 247 <66700000>, <66700000>; 248}; 249 250&cmu_gscl { 251 assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, 252 <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; 253 assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, 254 <&cmu_top CLK_ACLK_GSCL_333>; 255}; 256 257&cmu_mfc { 258 assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>; 259 assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>; 260}; 261 262&cmu_mscl { 263 assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>, 264 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 265 <&cmu_mscl CLK_MOUT_SCLK_JPEG>, 266 <&cmu_top CLK_MOUT_SCLK_JPEG_A>; 267 assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>, 268 <&cmu_top CLK_SCLK_JPEG_MSCL>, 269 <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>, 270 <&cmu_top CLK_MOUT_BUS_PLL_USER>; 271}; 272 273&cpu0 { 274 cpu-supply = <&buck3_reg>; 275}; 276 277&cpu4 { 278 cpu-supply = <&buck2_reg>; 279}; 280 281&decon { 282 status = "okay"; 283}; 284 285&decon_tv { 286 status = "okay"; 287 288 ports { 289 #address-cells = <1>; 290 #size-cells = <0>; 291 292 port@0 { 293 reg = <0>; 294 tv_to_hdmi: endpoint { 295 remote-endpoint = <&hdmi_to_tv>; 296 }; 297 }; 298 }; 299}; 300 301&dsi { 302 status = "okay"; 303 vddcore-supply = <&ldo6_reg>; 304 vddio-supply = <&ldo7_reg>; 305 samsung,burst-clock-frequency = <512000000>; 306 samsung,esc-clock-frequency = <16000000>; 307 samsung,pll-clock-frequency = <24000000>; 308 pinctrl-names = "default"; 309 pinctrl-0 = <&te_irq>; 310}; 311 312&hdmi { 313 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>; 314 status = "okay"; 315 vdd-supply = <&ldo6_reg>; 316 vdd_osc-supply = <&ldo7_reg>; 317 vdd_pll-supply = <&ldo6_reg>; 318 319 ports { 320 #address-cells = <1>; 321 #size-cells = <0>; 322 323 port@0 { 324 reg = <0>; 325 hdmi_to_tv: endpoint { 326 remote-endpoint = <&tv_to_hdmi>; 327 }; 328 }; 329 330 port@1 { 331 reg = <1>; 332 hdmi_to_mhl: endpoint { 333 remote-endpoint = <&mhl_to_hdmi>; 334 }; 335 }; 336 }; 337}; 338 339&hsi2c_0 { 340 status = "okay"; 341 clock-frequency = <2500000>; 342 343 s2mps13-pmic@66 { 344 compatible = "samsung,s2mps13-pmic"; 345 interrupt-parent = <&gpa0>; 346 interrupts = <7 IRQ_TYPE_NONE>; 347 reg = <0x66>; 348 samsung,s2mps11-wrstbi-ground; 349 350 s2mps13_osc: clocks { 351 compatible = "samsung,s2mps13-clk"; 352 #clock-cells = <1>; 353 clock-output-names = "s2mps13_ap", "s2mps13_cp", 354 "s2mps13_bt"; 355 }; 356 357 regulators { 358 ldo1_reg: LDO1 { 359 regulator-name = "VDD_ALIVE_0.9V_AP"; 360 regulator-min-microvolt = <900000>; 361 regulator-max-microvolt = <900000>; 362 regulator-always-on; 363 }; 364 365 ldo2_reg: LDO2 { 366 regulator-name = "VDDQ_MMC2_2.8V_AP"; 367 regulator-min-microvolt = <2800000>; 368 regulator-max-microvolt = <2800000>; 369 regulator-always-on; 370 regulator-state-mem { 371 regulator-off-in-suspend; 372 }; 373 }; 374 375 ldo3_reg: LDO3 { 376 regulator-name = "VDD1_E_1.8V_AP"; 377 regulator-min-microvolt = <1800000>; 378 regulator-max-microvolt = <1800000>; 379 regulator-always-on; 380 }; 381 382 ldo4_reg: LDO4 { 383 regulator-name = "VDD10_MIF_PLL_1.0V_AP"; 384 regulator-min-microvolt = <1300000>; 385 regulator-max-microvolt = <1300000>; 386 regulator-always-on; 387 regulator-state-mem { 388 regulator-off-in-suspend; 389 }; 390 }; 391 392 ldo5_reg: LDO5 { 393 regulator-name = "VDD10_DPLL_1.0V_AP"; 394 regulator-min-microvolt = <1000000>; 395 regulator-max-microvolt = <1000000>; 396 regulator-always-on; 397 regulator-state-mem { 398 regulator-off-in-suspend; 399 }; 400 }; 401 402 ldo6_reg: LDO6 { 403 regulator-name = "VDD10_MIPI2L_1.0V_AP"; 404 regulator-min-microvolt = <1000000>; 405 regulator-max-microvolt = <1000000>; 406 regulator-state-mem { 407 regulator-off-in-suspend; 408 }; 409 }; 410 411 ldo7_reg: LDO7 { 412 regulator-name = "VDD18_MIPI2L_1.8V_AP"; 413 regulator-min-microvolt = <1800000>; 414 regulator-max-microvolt = <1800000>; 415 regulator-always-on; 416 regulator-state-mem { 417 regulator-off-in-suspend; 418 }; 419 }; 420 421 ldo8_reg: LDO8 { 422 regulator-name = "VDD18_LLI_1.8V_AP"; 423 regulator-min-microvolt = <1800000>; 424 regulator-max-microvolt = <1800000>; 425 regulator-always-on; 426 regulator-state-mem { 427 regulator-off-in-suspend; 428 }; 429 }; 430 431 ldo9_reg: LDO9 { 432 regulator-name = "VDD18_ABB_ETC_1.8V_AP"; 433 regulator-min-microvolt = <1800000>; 434 regulator-max-microvolt = <1800000>; 435 regulator-always-on; 436 regulator-state-mem { 437 regulator-off-in-suspend; 438 }; 439 }; 440 441 ldo10_reg: LDO10 { 442 regulator-name = "VDD33_USB30_3.0V_AP"; 443 regulator-min-microvolt = <3000000>; 444 regulator-max-microvolt = <3000000>; 445 regulator-state-mem { 446 regulator-off-in-suspend; 447 }; 448 }; 449 450 ldo11_reg: LDO11 { 451 regulator-name = "VDD_INT_M_1.0V_AP"; 452 regulator-min-microvolt = <1000000>; 453 regulator-max-microvolt = <1000000>; 454 regulator-always-on; 455 regulator-state-mem { 456 regulator-off-in-suspend; 457 }; 458 }; 459 460 ldo12_reg: LDO12 { 461 regulator-name = "VDD_KFC_M_1.1V_AP"; 462 regulator-min-microvolt = <800000>; 463 regulator-max-microvolt = <1350000>; 464 regulator-always-on; 465 }; 466 467 ldo13_reg: LDO13 { 468 regulator-name = "VDD_G3D_M_0.95V_AP"; 469 regulator-min-microvolt = <950000>; 470 regulator-max-microvolt = <950000>; 471 regulator-always-on; 472 regulator-state-mem { 473 regulator-off-in-suspend; 474 }; 475 }; 476 477 ldo14_reg: LDO14 { 478 regulator-name = "VDDQ_M1_LDO_1.2V_AP"; 479 regulator-min-microvolt = <1200000>; 480 regulator-max-microvolt = <1200000>; 481 regulator-always-on; 482 regulator-state-mem { 483 regulator-off-in-suspend; 484 }; 485 }; 486 487 ldo15_reg: LDO15 { 488 regulator-name = "VDDQ_M2_LDO_1.2V_AP"; 489 regulator-min-microvolt = <1200000>; 490 regulator-max-microvolt = <1200000>; 491 regulator-always-on; 492 regulator-state-mem { 493 regulator-off-in-suspend; 494 }; 495 }; 496 497 ldo16_reg: LDO16 { 498 regulator-name = "VDDQ_EFUSE"; 499 regulator-min-microvolt = <1400000>; 500 regulator-max-microvolt = <3400000>; 501 regulator-always-on; 502 }; 503 504 ldo17_reg: LDO17 { 505 regulator-name = "V_TFLASH_2.8V_AP"; 506 regulator-min-microvolt = <2800000>; 507 regulator-max-microvolt = <2800000>; 508 }; 509 510 ldo18_reg: LDO18 { 511 regulator-name = "V_CODEC_1.8V_AP"; 512 regulator-min-microvolt = <1800000>; 513 regulator-max-microvolt = <1800000>; 514 }; 515 516 ldo19_reg: LDO19 { 517 regulator-name = "VDDA_1.8V_COMP"; 518 regulator-min-microvolt = <1800000>; 519 regulator-max-microvolt = <1800000>; 520 regulator-always-on; 521 }; 522 523 ldo20_reg: LDO20 { 524 regulator-name = "VCC_2.8V_AP"; 525 regulator-min-microvolt = <2800000>; 526 regulator-max-microvolt = <2800000>; 527 regulator-always-on; 528 }; 529 530 ldo21_reg: LDO21 { 531 regulator-name = "VT_CAM_1.8V"; 532 regulator-min-microvolt = <1800000>; 533 regulator-max-microvolt = <1800000>; 534 }; 535 536 ldo22_reg: LDO22 { 537 regulator-name = "CAM_IO_1.8V_AP"; 538 regulator-min-microvolt = <1800000>; 539 regulator-max-microvolt = <1800000>; 540 }; 541 542 ldo23_reg: LDO23 { 543 regulator-name = "CAM_SEN_CORE_1.05V_AP"; 544 regulator-min-microvolt = <1050000>; 545 regulator-max-microvolt = <1050000>; 546 }; 547 548 ldo24_reg: LDO24 { 549 regulator-name = "VT_CAM_1.2V"; 550 regulator-min-microvolt = <1200000>; 551 regulator-max-microvolt = <1200000>; 552 }; 553 554 ldo25_reg: LDO25 { 555 regulator-name = "UNUSED_LDO25"; 556 regulator-min-microvolt = <2800000>; 557 regulator-max-microvolt = <2800000>; 558 }; 559 560 ldo26_reg: LDO26 { 561 regulator-name = "CAM_AF_2.8V_AP"; 562 regulator-min-microvolt = <2800000>; 563 regulator-max-microvolt = <2800000>; 564 }; 565 566 ldo27_reg: LDO27 { 567 regulator-name = "VCC_3.0V_LCD_AP"; 568 regulator-min-microvolt = <3000000>; 569 regulator-max-microvolt = <3000000>; 570 }; 571 572 ldo28_reg: LDO28 { 573 regulator-name = "VCC_1.8V_LCD_AP"; 574 regulator-min-microvolt = <1800000>; 575 regulator-max-microvolt = <1800000>; 576 }; 577 578 ldo29_reg: LDO29 { 579 regulator-name = "VT_CAM_2.8V"; 580 regulator-min-microvolt = <3000000>; 581 regulator-max-microvolt = <3000000>; 582 }; 583 584 ldo30_reg: LDO30 { 585 regulator-name = "TSP_AVDD_3.3V_AP"; 586 regulator-min-microvolt = <3300000>; 587 regulator-max-microvolt = <3300000>; 588 }; 589 590 ldo31_reg: LDO31 { 591 /* 592 * LDO31 differs from target to target, 593 * its definition is in the .dts 594 */ 595 }; 596 597 ldo32_reg: LDO32 { 598 regulator-name = "VTOUCH_1.8V_AP"; 599 regulator-min-microvolt = <1800000>; 600 regulator-max-microvolt = <1800000>; 601 }; 602 603 ldo33_reg: LDO33 { 604 regulator-name = "VTOUCH_LED_3.3V"; 605 regulator-min-microvolt = <2500000>; 606 regulator-max-microvolt = <3300000>; 607 regulator-ramp-delay = <12500>; 608 }; 609 610 ldo34_reg: LDO34 { 611 regulator-name = "VCC_1.8V_MHL_AP"; 612 regulator-min-microvolt = <1000000>; 613 regulator-max-microvolt = <2100000>; 614 }; 615 616 ldo35_reg: LDO35 { 617 regulator-name = "OIS_VM_2.8V"; 618 regulator-min-microvolt = <1800000>; 619 regulator-max-microvolt = <2800000>; 620 }; 621 622 ldo36_reg: LDO36 { 623 regulator-name = "VSIL_1.0V"; 624 regulator-min-microvolt = <1000000>; 625 regulator-max-microvolt = <1000000>; 626 }; 627 628 ldo37_reg: LDO37 { 629 regulator-name = "VF_1.8V"; 630 regulator-min-microvolt = <1800000>; 631 regulator-max-microvolt = <1800000>; 632 }; 633 634 ldo38_reg: LDO38 { 635 /* 636 * LDO38 differs from target to target, 637 * its definition is in the .dts 638 */ 639 }; 640 641 ldo39_reg: LDO39 { 642 regulator-name = "V_HRM_1.8V"; 643 regulator-min-microvolt = <1800000>; 644 regulator-max-microvolt = <1800000>; 645 }; 646 647 ldo40_reg: LDO40 { 648 regulator-name = "V_HRM_3.3V"; 649 regulator-min-microvolt = <3300000>; 650 regulator-max-microvolt = <3300000>; 651 }; 652 653 buck1_reg: BUCK1 { 654 regulator-name = "VDD_MIF_0.9V_AP"; 655 regulator-min-microvolt = <600000>; 656 regulator-max-microvolt = <1500000>; 657 regulator-always-on; 658 regulator-state-mem { 659 regulator-off-in-suspend; 660 }; 661 }; 662 663 buck2_reg: BUCK2 { 664 regulator-name = "VDD_EGL_1.0V_AP"; 665 regulator-min-microvolt = <900000>; 666 regulator-max-microvolt = <1300000>; 667 regulator-always-on; 668 regulator-state-mem { 669 regulator-off-in-suspend; 670 }; 671 }; 672 673 buck3_reg: BUCK3 { 674 regulator-name = "VDD_KFC_1.0V_AP"; 675 regulator-min-microvolt = <800000>; 676 regulator-max-microvolt = <1200000>; 677 regulator-always-on; 678 regulator-state-mem { 679 regulator-off-in-suspend; 680 }; 681 }; 682 683 buck4_reg: BUCK4 { 684 regulator-name = "VDD_INT_0.95V_AP"; 685 regulator-min-microvolt = <600000>; 686 regulator-max-microvolt = <1500000>; 687 regulator-always-on; 688 regulator-state-mem { 689 regulator-off-in-suspend; 690 }; 691 }; 692 693 buck5_reg: BUCK5 { 694 regulator-name = "VDD_DISP_CAM0_0.9V_AP"; 695 regulator-min-microvolt = <600000>; 696 regulator-max-microvolt = <1500000>; 697 regulator-always-on; 698 regulator-state-mem { 699 regulator-off-in-suspend; 700 }; 701 }; 702 703 buck6_reg: BUCK6 { 704 regulator-name = "VDD_G3D_0.9V_AP"; 705 regulator-min-microvolt = <600000>; 706 regulator-max-microvolt = <1500000>; 707 regulator-always-on; 708 regulator-state-mem { 709 regulator-off-in-suspend; 710 }; 711 }; 712 713 buck7_reg: BUCK7 { 714 regulator-name = "VDD_MEM1_1.2V_AP"; 715 regulator-min-microvolt = <1200000>; 716 regulator-max-microvolt = <1200000>; 717 regulator-always-on; 718 }; 719 720 buck8_reg: BUCK8 { 721 regulator-name = "VDD_LLDO_1.35V_AP"; 722 regulator-min-microvolt = <1350000>; 723 regulator-max-microvolt = <3300000>; 724 regulator-always-on; 725 }; 726 727 buck9_reg: BUCK9 { 728 regulator-name = "VDD_MLDO_2.0V_AP"; 729 regulator-min-microvolt = <1350000>; 730 regulator-max-microvolt = <3300000>; 731 regulator-always-on; 732 }; 733 734 buck10_reg: BUCK10 { 735 regulator-name = "vdd_mem2"; 736 regulator-min-microvolt = <550000>; 737 regulator-max-microvolt = <1500000>; 738 regulator-always-on; 739 }; 740 }; 741 }; 742}; 743 744&hsi2c_5 { 745 status = "okay"; 746 747 stmfts: touchscreen@49 { 748 compatible = "st,stmfts"; 749 reg = <0x49>; 750 interrupt-parent = <&gpa1>; 751 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 752 avdd-supply = <&ldo30_reg>; 753 vdd-supply = <&ldo31_reg>; 754 }; 755}; 756 757&hsi2c_7 { 758 status = "okay"; 759 760 sii8620@39 { 761 reg = <0x39>; 762 compatible = "sil,sii8620"; 763 cvcc10-supply = <&ldo36_reg>; 764 iovcc18-supply = <&ldo34_reg>; 765 interrupt-parent = <&gpf0>; 766 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; 767 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; 768 clocks = <&pmu_system_controller 0>; 769 clock-names = "xtal"; 770 771 port { 772 mhl_to_hdmi: endpoint { 773 remote-endpoint = <&hdmi_to_mhl>; 774 }; 775 }; 776 }; 777}; 778 779&hsi2c_8 { 780 status = "okay"; 781 782 max77843@66 { 783 compatible = "maxim,max77843"; 784 interrupt-parent = <&gpa1>; 785 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 786 reg = <0x66>; 787 788 muic: max77843-muic { 789 compatible = "maxim,max77843-muic"; 790 }; 791 792 regulators { 793 compatible = "maxim,max77843-regulator"; 794 safeout1_reg: SAFEOUT1 { 795 regulator-name = "SAFEOUT1"; 796 regulator-min-microvolt = <3300000>; 797 regulator-max-microvolt = <4950000>; 798 }; 799 800 safeout2_reg: SAFEOUT2 { 801 regulator-name = "SAFEOUT2"; 802 regulator-min-microvolt = <3300000>; 803 regulator-max-microvolt = <4950000>; 804 }; 805 806 charger_reg: CHARGER { 807 regulator-name = "CHARGER"; 808 regulator-min-microamp = <100000>; 809 regulator-max-microamp = <3150000>; 810 }; 811 }; 812 813 haptic: max77843-haptic { 814 compatible = "maxim,max77843-haptic"; 815 haptic-supply = <&ldo38_reg>; 816 pwms = <&pwm 0 33670 0>; 817 pwm-names = "haptic"; 818 }; 819 }; 820}; 821 822&hsi2c_11 { 823 status = "okay"; 824}; 825 826&i2s0 { 827 status = "okay"; 828}; 829 830&mshc_0 { 831 status = "okay"; 832 mmc-hs200-1_8v; 833 mmc-hs400-1_8v; 834 cap-mmc-highspeed; 835 non-removable; 836 card-detect-delay = <200>; 837 samsung,dw-mshc-ciu-div = <3>; 838 samsung,dw-mshc-sdr-timing = <0 4>; 839 samsung,dw-mshc-ddr-timing = <0 2>; 840 samsung,dw-mshc-hs400-timing = <0 3>; 841 samsung,read-strobe-delay = <90>; 842 fifo-depth = <0x80>; 843 pinctrl-names = "default"; 844 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 845 &sd0_bus8 &sd0_rdqs>; 846 bus-width = <8>; 847 assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>; 848 assigned-clock-rates = <800000000>; 849}; 850 851&mshc_2 { 852 status = "okay"; 853 cap-sd-highspeed; 854 disable-wp; 855 cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>; 856 cd-inverted; 857 card-detect-delay = <200>; 858 samsung,dw-mshc-ciu-div = <3>; 859 samsung,dw-mshc-sdr-timing = <0 4>; 860 samsung,dw-mshc-ddr-timing = <0 2>; 861 fifo-depth = <0x80>; 862 pinctrl-names = "default"; 863 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>; 864 bus-width = <4>; 865}; 866 867&ppmu_d0_general { 868 status = "okay"; 869 events { 870 ppmu_event0_d0_general: ppmu-event0-d0-general { 871 event-name = "ppmu-event0-d0-general"; 872 }; 873 }; 874}; 875 876&ppmu_d1_general { 877 status = "okay"; 878 events { 879 ppmu_event0_d1_general: ppmu-event0-d1-general { 880 event-name = "ppmu-event0-d1-general"; 881 }; 882 }; 883}; 884 885&pinctrl_alive { 886 pinctrl-names = "default"; 887 pinctrl-0 = <&initial_alive>; 888 889 initial_alive: initial-state { 890 PIN(INPUT, gpa0-0, DOWN, FAST_SR1); 891 PIN(INPUT, gpa0-1, NONE, FAST_SR1); 892 PIN(INPUT, gpa0-2, DOWN, FAST_SR1); 893 PIN(INPUT, gpa0-3, NONE, FAST_SR1); 894 PIN(INPUT, gpa0-4, NONE, FAST_SR1); 895 PIN(INPUT, gpa0-5, DOWN, FAST_SR1); 896 PIN(INPUT, gpa0-6, NONE, FAST_SR1); 897 PIN(INPUT, gpa0-7, NONE, FAST_SR1); 898 899 PIN(INPUT, gpa1-0, UP, FAST_SR1); 900 PIN(INPUT, gpa1-1, UP, FAST_SR1); 901 PIN(INPUT, gpa1-2, NONE, FAST_SR1); 902 PIN(INPUT, gpa1-3, DOWN, FAST_SR1); 903 PIN(INPUT, gpa1-4, DOWN, FAST_SR1); 904 PIN(INPUT, gpa1-5, NONE, FAST_SR1); 905 PIN(INPUT, gpa1-6, NONE, FAST_SR1); 906 PIN(INPUT, gpa1-7, NONE, FAST_SR1); 907 908 PIN(INPUT, gpa2-0, NONE, FAST_SR1); 909 PIN(INPUT, gpa2-1, NONE, FAST_SR1); 910 PIN(INPUT, gpa2-2, NONE, FAST_SR1); 911 PIN(INPUT, gpa2-3, DOWN, FAST_SR1); 912 PIN(INPUT, gpa2-4, NONE, FAST_SR1); 913 PIN(INPUT, gpa2-5, DOWN, FAST_SR1); 914 PIN(INPUT, gpa2-6, DOWN, FAST_SR1); 915 PIN(INPUT, gpa2-7, NONE, FAST_SR1); 916 917 PIN(INPUT, gpa3-0, DOWN, FAST_SR1); 918 PIN(INPUT, gpa3-1, DOWN, FAST_SR1); 919 PIN(INPUT, gpa3-2, NONE, FAST_SR1); 920 PIN(INPUT, gpa3-3, DOWN, FAST_SR1); 921 PIN(INPUT, gpa3-4, NONE, FAST_SR1); 922 PIN(INPUT, gpa3-5, DOWN, FAST_SR1); 923 PIN(INPUT, gpa3-6, DOWN, FAST_SR1); 924 PIN(INPUT, gpa3-7, DOWN, FAST_SR1); 925 926 PIN(INPUT, gpf1-0, NONE, FAST_SR1); 927 PIN(INPUT, gpf1-1, NONE, FAST_SR1); 928 PIN(INPUT, gpf1-2, DOWN, FAST_SR1); 929 PIN(INPUT, gpf1-4, UP, FAST_SR1); 930 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1); 931 PIN(INPUT, gpf1-6, DOWN, FAST_SR1); 932 PIN(INPUT, gpf1-7, DOWN, FAST_SR1); 933 934 PIN(INPUT, gpf2-0, DOWN, FAST_SR1); 935 PIN(INPUT, gpf2-1, DOWN, FAST_SR1); 936 PIN(INPUT, gpf2-2, DOWN, FAST_SR1); 937 PIN(INPUT, gpf2-3, DOWN, FAST_SR1); 938 939 PIN(INPUT, gpf3-0, DOWN, FAST_SR1); 940 PIN(INPUT, gpf3-1, DOWN, FAST_SR1); 941 PIN(INPUT, gpf3-2, NONE, FAST_SR1); 942 PIN(INPUT, gpf3-3, DOWN, FAST_SR1); 943 944 PIN(INPUT, gpf4-0, DOWN, FAST_SR1); 945 PIN(INPUT, gpf4-1, DOWN, FAST_SR1); 946 PIN(INPUT, gpf4-2, DOWN, FAST_SR1); 947 PIN(INPUT, gpf4-3, DOWN, FAST_SR1); 948 PIN(INPUT, gpf4-4, DOWN, FAST_SR1); 949 PIN(INPUT, gpf4-5, DOWN, FAST_SR1); 950 PIN(INPUT, gpf4-6, DOWN, FAST_SR1); 951 PIN(INPUT, gpf4-7, DOWN, FAST_SR1); 952 953 PIN(INPUT, gpf5-0, DOWN, FAST_SR1); 954 PIN(INPUT, gpf5-1, DOWN, FAST_SR1); 955 PIN(INPUT, gpf5-2, DOWN, FAST_SR1); 956 PIN(INPUT, gpf5-3, DOWN, FAST_SR1); 957 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1); 958 PIN(INPUT, gpf5-5, DOWN, FAST_SR1); 959 PIN(INPUT, gpf5-6, DOWN, FAST_SR1); 960 PIN(INPUT, gpf5-7, DOWN, FAST_SR1); 961 }; 962 963 te_irq: te_irq { 964 samsung,pins = "gpf1-3"; 965 samsung,pin-function = <0xf>; 966 }; 967}; 968 969&pinctrl_cpif { 970 pinctrl-names = "default"; 971 pinctrl-0 = <&initial_cpif>; 972 973 initial_cpif: initial-state { 974 PIN(INPUT, gpv6-0, DOWN, FAST_SR1); 975 PIN(INPUT, gpv6-1, DOWN, FAST_SR1); 976 }; 977}; 978 979&pinctrl_ese { 980 pinctrl-names = "default"; 981 pinctrl-0 = <&initial_ese>; 982 983 initial_ese: initial-state { 984 PIN(INPUT, gpj2-0, DOWN, FAST_SR1); 985 PIN(INPUT, gpj2-1, DOWN, FAST_SR1); 986 PIN(INPUT, gpj2-2, DOWN, FAST_SR1); 987 }; 988}; 989 990&pinctrl_fsys { 991 pinctrl-names = "default"; 992 pinctrl-0 = <&initial_fsys>; 993 994 initial_fsys: initial-state { 995 PIN(INPUT, gpr3-0, NONE, FAST_SR1); 996 PIN(INPUT, gpr3-1, DOWN, FAST_SR1); 997 PIN(INPUT, gpr3-2, DOWN, FAST_SR1); 998 PIN(INPUT, gpr3-3, DOWN, FAST_SR1); 999 PIN(INPUT, gpr3-7, NONE, FAST_SR1); 1000 }; 1001}; 1002 1003&pinctrl_imem { 1004 pinctrl-names = "default"; 1005 pinctrl-0 = <&initial_imem>; 1006 1007 initial_imem: initial-state { 1008 PIN(INPUT, gpf0-0, UP, FAST_SR1); 1009 PIN(INPUT, gpf0-1, UP, FAST_SR1); 1010 PIN(INPUT, gpf0-2, DOWN, FAST_SR1); 1011 PIN(INPUT, gpf0-3, UP, FAST_SR1); 1012 PIN(INPUT, gpf0-4, DOWN, FAST_SR1); 1013 PIN(INPUT, gpf0-5, NONE, FAST_SR1); 1014 PIN(INPUT, gpf0-6, DOWN, FAST_SR1); 1015 PIN(INPUT, gpf0-7, UP, FAST_SR1); 1016 }; 1017}; 1018 1019&pinctrl_nfc { 1020 pinctrl-names = "default"; 1021 pinctrl-0 = <&initial_nfc>; 1022 1023 initial_nfc: initial-state { 1024 PIN(INPUT, gpj0-2, DOWN, FAST_SR1); 1025 }; 1026}; 1027 1028&pinctrl_peric { 1029 pinctrl-names = "default"; 1030 pinctrl-0 = <&initial_peric>; 1031 1032 initial_peric: initial-state { 1033 PIN(INPUT, gpv7-0, DOWN, FAST_SR1); 1034 PIN(INPUT, gpv7-1, DOWN, FAST_SR1); 1035 PIN(INPUT, gpv7-2, NONE, FAST_SR1); 1036 PIN(INPUT, gpv7-3, DOWN, FAST_SR1); 1037 PIN(INPUT, gpv7-4, DOWN, FAST_SR1); 1038 PIN(INPUT, gpv7-5, DOWN, FAST_SR1); 1039 1040 PIN(INPUT, gpb0-4, DOWN, FAST_SR1); 1041 1042 PIN(INPUT, gpc0-2, DOWN, FAST_SR1); 1043 PIN(INPUT, gpc0-5, DOWN, FAST_SR1); 1044 PIN(INPUT, gpc0-7, DOWN, FAST_SR1); 1045 1046 PIN(INPUT, gpc1-1, DOWN, FAST_SR1); 1047 1048 PIN(INPUT, gpc3-4, NONE, FAST_SR1); 1049 PIN(INPUT, gpc3-5, NONE, FAST_SR1); 1050 PIN(INPUT, gpc3-6, NONE, FAST_SR1); 1051 PIN(INPUT, gpc3-7, NONE, FAST_SR1); 1052 1053 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1); 1054 PIN(2, gpg0-1, DOWN, FAST_SR1); 1055 1056 PIN(INPUT, gpd2-5, DOWN, FAST_SR1); 1057 1058 PIN(INPUT, gpd4-0, NONE, FAST_SR1); 1059 PIN(INPUT, gpd4-1, DOWN, FAST_SR1); 1060 PIN(INPUT, gpd4-2, DOWN, FAST_SR1); 1061 PIN(INPUT, gpd4-3, DOWN, FAST_SR1); 1062 PIN(INPUT, gpd4-4, DOWN, FAST_SR1); 1063 1064 PIN(INPUT, gpd6-3, DOWN, FAST_SR1); 1065 1066 PIN(INPUT, gpd8-1, UP, FAST_SR1); 1067 1068 PIN(INPUT, gpg1-0, DOWN, FAST_SR1); 1069 PIN(INPUT, gpg1-1, DOWN, FAST_SR1); 1070 PIN(INPUT, gpg1-2, DOWN, FAST_SR1); 1071 PIN(INPUT, gpg1-3, DOWN, FAST_SR1); 1072 PIN(INPUT, gpg1-4, DOWN, FAST_SR1); 1073 1074 PIN(INPUT, gpg2-0, DOWN, FAST_SR1); 1075 PIN(INPUT, gpg2-1, DOWN, FAST_SR1); 1076 1077 PIN(INPUT, gpg3-0, DOWN, FAST_SR1); 1078 PIN(INPUT, gpg3-1, DOWN, FAST_SR1); 1079 PIN(INPUT, gpg3-5, DOWN, FAST_SR1); 1080 }; 1081}; 1082 1083&pinctrl_touch { 1084 pinctrl-names = "default"; 1085 pinctrl-0 = <&initial_touch>; 1086 1087 initial_touch: initial-state { 1088 PIN(INPUT, gpj1-2, DOWN, FAST_SR1); 1089 }; 1090}; 1091 1092&pwm { 1093 pinctrl-0 = <&pwm0_out>; 1094 pinctrl-names = "default"; 1095 status = "okay"; 1096}; 1097 1098&mic { 1099 status = "okay"; 1100}; 1101 1102&pmu_system_controller { 1103 assigned-clocks = <&pmu_system_controller 0>; 1104 assigned-clock-parents = <&xxti>; 1105}; 1106 1107&serial_1 { 1108 status = "okay"; 1109}; 1110 1111&spi_1 { 1112 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; 1113 status = "okay"; 1114 1115 wm5110: wm5110-codec@0 { 1116 compatible = "wlf,wm5110"; 1117 reg = <0x0>; 1118 spi-max-frequency = <20000000>; 1119 interrupt-parent = <&gpa0>; 1120 interrupts = <4 IRQ_TYPE_NONE>; 1121 clocks = <&pmu_system_controller 0>, 1122 <&s2mps13_osc S2MPS11_CLK_BT>; 1123 clock-names = "mclk1", "mclk2"; 1124 1125 gpio-controller; 1126 #gpio-cells = <2>; 1127 1128 wlf,micd-detect-debounce = <300>; 1129 wlf,micd-bias-start-time = <0x1>; 1130 wlf,micd-rate = <0x7>; 1131 wlf,micd-dbtime = <0x1>; 1132 wlf,micd-force-micbias; 1133 wlf,micd-configs = <0x0 1 0>; 1134 wlf,hpdet-channel = <1>; 1135 wlf,gpsw = <0x1>; 1136 wlf,inmode = <2 0 2 0>; 1137 1138 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; 1139 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; 1140 1141 /* core supplies */ 1142 AVDD-supply = <&ldo18_reg>; 1143 DBVDD1-supply = <&ldo18_reg>; 1144 CPVDD-supply = <&ldo18_reg>; 1145 DBVDD2-supply = <&ldo18_reg>; 1146 DBVDD3-supply = <&ldo18_reg>; 1147 1148 controller-data { 1149 samsung,spi-feedback-delay = <0>; 1150 }; 1151 }; 1152}; 1153 1154&spi_3 { 1155 status = "okay"; 1156 no-cs-readback; 1157 1158 irled@0 { 1159 compatible = "ir-spi-led"; 1160 reg = <0x0>; 1161 spi-max-frequency = <5000000>; 1162 power-supply = <&irda_regulator>; 1163 duty-cycle = <60>; 1164 led-active-low; 1165 1166 controller-data { 1167 samsung,spi-feedback-delay = <0>; 1168 }; 1169 }; 1170}; 1171 1172&timer { 1173 clock-frequency = <24000000>; 1174}; 1175 1176&tmu_atlas0 { 1177 vtmu-supply = <&ldo3_reg>; 1178 status = "okay"; 1179}; 1180 1181&tmu_apollo { 1182 vtmu-supply = <&ldo3_reg>; 1183 status = "okay"; 1184}; 1185 1186&tmu_g3d { 1187 vtmu-supply = <&ldo3_reg>; 1188 status = "okay"; 1189}; 1190 1191&usbdrd30 { 1192 vdd33-supply = <&ldo10_reg>; 1193 vdd10-supply = <&ldo6_reg>; 1194 status = "okay"; 1195}; 1196 1197&usbdrd_dwc3 { 1198 dr_mode = "otg"; 1199 extcon = <&muic>; 1200}; 1201 1202&usbdrd30_phy { 1203 vbus-supply = <&safeout1_reg>; 1204 status = "okay"; 1205}; 1206 1207&xxti { 1208 clock-frequency = <24000000>; 1209}; 1210