1/* 2 * Device Tree Source for the r8a7796 SoC 3 * 4 * Copyright (C) 2016 Renesas Electronics Corp. 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11#include <dt-bindings/clock/r8a7796-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a7796-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 16 17/ { 18 compatible = "renesas,r8a7796"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 psci { 34 compatible = "arm,psci-1.0", "arm,psci-0.2"; 35 method = "smc"; 36 }; 37 38 cpus { 39 #address-cells = <1>; 40 #size-cells = <0>; 41 42 a57_0: cpu@0 { 43 compatible = "arm,cortex-a57", "arm,armv8"; 44 reg = <0x0>; 45 device_type = "cpu"; 46 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 47 next-level-cache = <&L2_CA57>; 48 enable-method = "psci"; 49 }; 50 51 a57_1: cpu@1 { 52 compatible = "arm,cortex-a57","arm,armv8"; 53 reg = <0x1>; 54 device_type = "cpu"; 55 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 56 next-level-cache = <&L2_CA57>; 57 enable-method = "psci"; 58 }; 59 60 a53_0: cpu@100 { 61 compatible = "arm,cortex-a53", "arm,armv8"; 62 reg = <0x100>; 63 device_type = "cpu"; 64 power-domains = <&sysc R8A7796_PD_CA53_CPU0>; 65 next-level-cache = <&L2_CA53>; 66 enable-method = "psci"; 67 }; 68 69 a53_1: cpu@101 { 70 compatible = "arm,cortex-a53","arm,armv8"; 71 reg = <0x101>; 72 device_type = "cpu"; 73 power-domains = <&sysc R8A7796_PD_CA53_CPU1>; 74 next-level-cache = <&L2_CA53>; 75 enable-method = "psci"; 76 }; 77 78 a53_2: cpu@102 { 79 compatible = "arm,cortex-a53","arm,armv8"; 80 reg = <0x102>; 81 device_type = "cpu"; 82 power-domains = <&sysc R8A7796_PD_CA53_CPU2>; 83 next-level-cache = <&L2_CA53>; 84 enable-method = "psci"; 85 }; 86 87 a53_3: cpu@103 { 88 compatible = "arm,cortex-a53","arm,armv8"; 89 reg = <0x103>; 90 device_type = "cpu"; 91 power-domains = <&sysc R8A7796_PD_CA53_CPU3>; 92 next-level-cache = <&L2_CA53>; 93 enable-method = "psci"; 94 }; 95 96 L2_CA57: cache-controller-0 { 97 compatible = "cache"; 98 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 99 cache-unified; 100 cache-level = <2>; 101 }; 102 103 L2_CA53: cache-controller-1 { 104 compatible = "cache"; 105 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 106 cache-unified; 107 cache-level = <2>; 108 }; 109 }; 110 111 extal_clk: extal { 112 compatible = "fixed-clock"; 113 #clock-cells = <0>; 114 /* This value must be overridden by the board */ 115 clock-frequency = <0>; 116 }; 117 118 extalr_clk: extalr { 119 compatible = "fixed-clock"; 120 #clock-cells = <0>; 121 /* This value must be overridden by the board */ 122 clock-frequency = <0>; 123 }; 124 125 /* 126 * The external audio clocks are configured as 0 Hz fixed frequency 127 * clocks by default. 128 * Boards that provide audio clocks should override them. 129 */ 130 audio_clk_a: audio_clk_a { 131 compatible = "fixed-clock"; 132 #clock-cells = <0>; 133 clock-frequency = <0>; 134 }; 135 136 audio_clk_b: audio_clk_b { 137 compatible = "fixed-clock"; 138 #clock-cells = <0>; 139 clock-frequency = <0>; 140 }; 141 142 audio_clk_c: audio_clk_c { 143 compatible = "fixed-clock"; 144 #clock-cells = <0>; 145 clock-frequency = <0>; 146 }; 147 148 /* External CAN clock - to be overridden by boards that provide it */ 149 can_clk: can { 150 compatible = "fixed-clock"; 151 #clock-cells = <0>; 152 clock-frequency = <0>; 153 }; 154 155 /* External SCIF clock - to be overridden by boards that provide it */ 156 scif_clk: scif { 157 compatible = "fixed-clock"; 158 #clock-cells = <0>; 159 clock-frequency = <0>; 160 }; 161 162 /* External PCIe clock - can be overridden by the board */ 163 pcie_bus_clk: pcie_bus { 164 compatible = "fixed-clock"; 165 #clock-cells = <0>; 166 clock-frequency = <0>; 167 }; 168 169 soc { 170 compatible = "simple-bus"; 171 interrupt-parent = <&gic>; 172 #address-cells = <2>; 173 #size-cells = <2>; 174 ranges; 175 176 gic: interrupt-controller@f1010000 { 177 compatible = "arm,gic-400"; 178 #interrupt-cells = <3>; 179 #address-cells = <0>; 180 interrupt-controller; 181 reg = <0x0 0xf1010000 0 0x1000>, 182 <0x0 0xf1020000 0 0x20000>, 183 <0x0 0xf1040000 0 0x20000>, 184 <0x0 0xf1060000 0 0x20000>; 185 interrupts = <GIC_PPI 9 186 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 187 clocks = <&cpg CPG_MOD 408>; 188 clock-names = "clk"; 189 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 190 resets = <&cpg 408>; 191 }; 192 193 timer { 194 compatible = "arm,armv8-timer"; 195 interrupts = <GIC_PPI 13 196 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 197 <GIC_PPI 14 198 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 199 <GIC_PPI 11 200 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 201 <GIC_PPI 10 202 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 203 }; 204 205 wdt0: watchdog@e6020000 { 206 compatible = "renesas,r8a7796-wdt", 207 "renesas,rcar-gen3-wdt"; 208 reg = <0 0xe6020000 0 0x0c>; 209 clocks = <&cpg CPG_MOD 402>; 210 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 211 resets = <&cpg 402>; 212 status = "disabled"; 213 }; 214 215 gpio0: gpio@e6050000 { 216 compatible = "renesas,gpio-r8a7796", 217 "renesas,gpio-rcar"; 218 reg = <0 0xe6050000 0 0x50>; 219 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 220 #gpio-cells = <2>; 221 gpio-controller; 222 gpio-ranges = <&pfc 0 0 16>; 223 #interrupt-cells = <2>; 224 interrupt-controller; 225 clocks = <&cpg CPG_MOD 912>; 226 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 227 resets = <&cpg 912>; 228 }; 229 230 gpio1: gpio@e6051000 { 231 compatible = "renesas,gpio-r8a7796", 232 "renesas,gpio-rcar"; 233 reg = <0 0xe6051000 0 0x50>; 234 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 235 #gpio-cells = <2>; 236 gpio-controller; 237 gpio-ranges = <&pfc 0 32 29>; 238 #interrupt-cells = <2>; 239 interrupt-controller; 240 clocks = <&cpg CPG_MOD 911>; 241 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 242 resets = <&cpg 911>; 243 }; 244 245 gpio2: gpio@e6052000 { 246 compatible = "renesas,gpio-r8a7796", 247 "renesas,gpio-rcar"; 248 reg = <0 0xe6052000 0 0x50>; 249 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 250 #gpio-cells = <2>; 251 gpio-controller; 252 gpio-ranges = <&pfc 0 64 15>; 253 #interrupt-cells = <2>; 254 interrupt-controller; 255 clocks = <&cpg CPG_MOD 910>; 256 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 257 resets = <&cpg 910>; 258 }; 259 260 gpio3: gpio@e6053000 { 261 compatible = "renesas,gpio-r8a7796", 262 "renesas,gpio-rcar"; 263 reg = <0 0xe6053000 0 0x50>; 264 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 265 #gpio-cells = <2>; 266 gpio-controller; 267 gpio-ranges = <&pfc 0 96 16>; 268 #interrupt-cells = <2>; 269 interrupt-controller; 270 clocks = <&cpg CPG_MOD 909>; 271 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 272 resets = <&cpg 909>; 273 }; 274 275 gpio4: gpio@e6054000 { 276 compatible = "renesas,gpio-r8a7796", 277 "renesas,gpio-rcar"; 278 reg = <0 0xe6054000 0 0x50>; 279 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 280 #gpio-cells = <2>; 281 gpio-controller; 282 gpio-ranges = <&pfc 0 128 18>; 283 #interrupt-cells = <2>; 284 interrupt-controller; 285 clocks = <&cpg CPG_MOD 908>; 286 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 287 resets = <&cpg 908>; 288 }; 289 290 gpio5: gpio@e6055000 { 291 compatible = "renesas,gpio-r8a7796", 292 "renesas,gpio-rcar"; 293 reg = <0 0xe6055000 0 0x50>; 294 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 295 #gpio-cells = <2>; 296 gpio-controller; 297 gpio-ranges = <&pfc 0 160 26>; 298 #interrupt-cells = <2>; 299 interrupt-controller; 300 clocks = <&cpg CPG_MOD 907>; 301 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 302 resets = <&cpg 907>; 303 }; 304 305 gpio6: gpio@e6055400 { 306 compatible = "renesas,gpio-r8a7796", 307 "renesas,gpio-rcar"; 308 reg = <0 0xe6055400 0 0x50>; 309 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 310 #gpio-cells = <2>; 311 gpio-controller; 312 gpio-ranges = <&pfc 0 192 32>; 313 #interrupt-cells = <2>; 314 interrupt-controller; 315 clocks = <&cpg CPG_MOD 906>; 316 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 317 resets = <&cpg 906>; 318 }; 319 320 gpio7: gpio@e6055800 { 321 compatible = "renesas,gpio-r8a7796", 322 "renesas,gpio-rcar"; 323 reg = <0 0xe6055800 0 0x50>; 324 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 325 #gpio-cells = <2>; 326 gpio-controller; 327 gpio-ranges = <&pfc 0 224 4>; 328 #interrupt-cells = <2>; 329 interrupt-controller; 330 clocks = <&cpg CPG_MOD 905>; 331 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 332 resets = <&cpg 905>; 333 }; 334 335 pfc: pin-controller@e6060000 { 336 compatible = "renesas,pfc-r8a7796"; 337 reg = <0 0xe6060000 0 0x50c>; 338 }; 339 340 pmu_a57 { 341 compatible = "arm,cortex-a57-pmu"; 342 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 344 interrupt-affinity = <&a57_0>, 345 <&a57_1>; 346 }; 347 348 pmu_a53 { 349 compatible = "arm,cortex-a53-pmu"; 350 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 354 interrupt-affinity = <&a53_0>, 355 <&a53_1>, 356 <&a53_2>, 357 <&a53_3>; 358 }; 359 360 cpg: clock-controller@e6150000 { 361 compatible = "renesas,r8a7796-cpg-mssr"; 362 reg = <0 0xe6150000 0 0x1000>; 363 clocks = <&extal_clk>, <&extalr_clk>; 364 clock-names = "extal", "extalr"; 365 #clock-cells = <2>; 366 #power-domain-cells = <0>; 367 #reset-cells = <1>; 368 }; 369 370 rst: reset-controller@e6160000 { 371 compatible = "renesas,r8a7796-rst"; 372 reg = <0 0xe6160000 0 0x0200>; 373 }; 374 375 prr: chipid@fff00044 { 376 compatible = "renesas,prr"; 377 reg = <0 0xfff00044 0 4>; 378 }; 379 380 sysc: system-controller@e6180000 { 381 compatible = "renesas,r8a7796-sysc"; 382 reg = <0 0xe6180000 0 0x0400>; 383 #power-domain-cells = <1>; 384 }; 385 386 i2c_dvfs: i2c@e60b0000 { 387 #address-cells = <1>; 388 #size-cells = <0>; 389 compatible = "renesas,iic-r8a7796", 390 "renesas,rcar-gen3-iic", 391 "renesas,rmobile-iic"; 392 reg = <0 0xe60b0000 0 0x425>; 393 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 394 clocks = <&cpg CPG_MOD 926>; 395 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 396 resets = <&cpg 926>; 397 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 398 dma-names = "tx", "rx"; 399 status = "disabled"; 400 }; 401 402 pwm0: pwm@e6e30000 { 403 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 404 reg = <0 0xe6e30000 0 8>; 405 #pwm-cells = <2>; 406 clocks = <&cpg CPG_MOD 523>; 407 resets = <&cpg 523>; 408 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 409 status = "disabled"; 410 }; 411 412 pwm1: pwm@e6e31000 { 413 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 414 reg = <0 0xe6e31000 0 8>; 415 #pwm-cells = <2>; 416 clocks = <&cpg CPG_MOD 523>; 417 resets = <&cpg 523>; 418 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 419 status = "disabled"; 420 }; 421 422 pwm2: pwm@e6e32000 { 423 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 424 reg = <0 0xe6e32000 0 8>; 425 #pwm-cells = <2>; 426 clocks = <&cpg CPG_MOD 523>; 427 resets = <&cpg 523>; 428 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 429 status = "disabled"; 430 }; 431 432 pwm3: pwm@e6e33000 { 433 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 434 reg = <0 0xe6e33000 0 8>; 435 #pwm-cells = <2>; 436 clocks = <&cpg CPG_MOD 523>; 437 resets = <&cpg 523>; 438 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 439 status = "disabled"; 440 }; 441 442 pwm4: pwm@e6e34000 { 443 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 444 reg = <0 0xe6e34000 0 8>; 445 #pwm-cells = <2>; 446 clocks = <&cpg CPG_MOD 523>; 447 resets = <&cpg 523>; 448 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 449 status = "disabled"; 450 }; 451 452 pwm5: pwm@e6e35000 { 453 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 454 reg = <0 0xe6e35000 0 8>; 455 #pwm-cells = <2>; 456 clocks = <&cpg CPG_MOD 523>; 457 resets = <&cpg 523>; 458 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 459 status = "disabled"; 460 }; 461 462 pwm6: pwm@e6e36000 { 463 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 464 reg = <0 0xe6e36000 0 8>; 465 #pwm-cells = <2>; 466 clocks = <&cpg CPG_MOD 523>; 467 resets = <&cpg 523>; 468 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 469 status = "disabled"; 470 }; 471 472 i2c0: i2c@e6500000 { 473 #address-cells = <1>; 474 #size-cells = <0>; 475 compatible = "renesas,i2c-r8a7796", 476 "renesas,rcar-gen3-i2c"; 477 reg = <0 0xe6500000 0 0x40>; 478 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 479 clocks = <&cpg CPG_MOD 931>; 480 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 481 resets = <&cpg 931>; 482 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 483 <&dmac2 0x91>, <&dmac2 0x90>; 484 dma-names = "tx", "rx", "tx", "rx"; 485 i2c-scl-internal-delay-ns = <110>; 486 status = "disabled"; 487 }; 488 489 i2c1: i2c@e6508000 { 490 #address-cells = <1>; 491 #size-cells = <0>; 492 compatible = "renesas,i2c-r8a7796", 493 "renesas,rcar-gen3-i2c"; 494 reg = <0 0xe6508000 0 0x40>; 495 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 496 clocks = <&cpg CPG_MOD 930>; 497 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 498 resets = <&cpg 930>; 499 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 500 <&dmac2 0x93>, <&dmac2 0x92>; 501 dma-names = "tx", "rx", "tx", "rx"; 502 i2c-scl-internal-delay-ns = <6>; 503 status = "disabled"; 504 }; 505 506 i2c2: i2c@e6510000 { 507 #address-cells = <1>; 508 #size-cells = <0>; 509 compatible = "renesas,i2c-r8a7796", 510 "renesas,rcar-gen3-i2c"; 511 reg = <0 0xe6510000 0 0x40>; 512 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 513 clocks = <&cpg CPG_MOD 929>; 514 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 515 resets = <&cpg 929>; 516 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 517 <&dmac2 0x95>, <&dmac2 0x94>; 518 dma-names = "tx", "rx", "tx", "rx"; 519 i2c-scl-internal-delay-ns = <6>; 520 status = "disabled"; 521 }; 522 523 i2c3: i2c@e66d0000 { 524 #address-cells = <1>; 525 #size-cells = <0>; 526 compatible = "renesas,i2c-r8a7796", 527 "renesas,rcar-gen3-i2c"; 528 reg = <0 0xe66d0000 0 0x40>; 529 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 928>; 531 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 532 resets = <&cpg 928>; 533 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 534 dma-names = "tx", "rx"; 535 i2c-scl-internal-delay-ns = <110>; 536 status = "disabled"; 537 }; 538 539 i2c4: i2c@e66d8000 { 540 #address-cells = <1>; 541 #size-cells = <0>; 542 compatible = "renesas,i2c-r8a7796", 543 "renesas,rcar-gen3-i2c"; 544 reg = <0 0xe66d8000 0 0x40>; 545 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 546 clocks = <&cpg CPG_MOD 927>; 547 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 548 resets = <&cpg 927>; 549 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 550 dma-names = "tx", "rx"; 551 i2c-scl-internal-delay-ns = <110>; 552 status = "disabled"; 553 }; 554 555 i2c5: i2c@e66e0000 { 556 #address-cells = <1>; 557 #size-cells = <0>; 558 compatible = "renesas,i2c-r8a7796", 559 "renesas,rcar-gen3-i2c"; 560 reg = <0 0xe66e0000 0 0x40>; 561 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 562 clocks = <&cpg CPG_MOD 919>; 563 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 564 resets = <&cpg 919>; 565 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 566 dma-names = "tx", "rx"; 567 i2c-scl-internal-delay-ns = <110>; 568 status = "disabled"; 569 }; 570 571 i2c6: i2c@e66e8000 { 572 #address-cells = <1>; 573 #size-cells = <0>; 574 compatible = "renesas,i2c-r8a7796", 575 "renesas,rcar-gen3-i2c"; 576 reg = <0 0xe66e8000 0 0x40>; 577 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 578 clocks = <&cpg CPG_MOD 918>; 579 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 580 resets = <&cpg 918>; 581 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 582 dma-names = "tx", "rx"; 583 i2c-scl-internal-delay-ns = <6>; 584 status = "disabled"; 585 }; 586 587 can0: can@e6c30000 { 588 compatible = "renesas,can-r8a7796", 589 "renesas,rcar-gen3-can"; 590 reg = <0 0xe6c30000 0 0x1000>; 591 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 592 clocks = <&cpg CPG_MOD 916>, 593 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 594 <&can_clk>; 595 clock-names = "clkp1", "clkp2", "can_clk"; 596 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 597 assigned-clock-rates = <40000000>; 598 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 599 resets = <&cpg 916>; 600 status = "disabled"; 601 }; 602 603 can1: can@e6c38000 { 604 compatible = "renesas,can-r8a7796", 605 "renesas,rcar-gen3-can"; 606 reg = <0 0xe6c38000 0 0x1000>; 607 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 608 clocks = <&cpg CPG_MOD 915>, 609 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 610 <&can_clk>; 611 clock-names = "clkp1", "clkp2", "can_clk"; 612 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 613 assigned-clock-rates = <40000000>; 614 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 615 resets = <&cpg 915>; 616 status = "disabled"; 617 }; 618 619 canfd: can@e66c0000 { 620 compatible = "renesas,r8a7796-canfd", 621 "renesas,rcar-gen3-canfd"; 622 reg = <0 0xe66c0000 0 0x8000>; 623 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 624 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 625 clocks = <&cpg CPG_MOD 914>, 626 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 627 <&can_clk>; 628 clock-names = "fck", "canfd", "can_clk"; 629 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 630 assigned-clock-rates = <40000000>; 631 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 632 resets = <&cpg 914>; 633 status = "disabled"; 634 635 channel0 { 636 status = "disabled"; 637 }; 638 639 channel1 { 640 status = "disabled"; 641 }; 642 }; 643 644 drif00: rif@e6f40000 { 645 compatible = "renesas,r8a7796-drif", 646 "renesas,rcar-gen3-drif"; 647 reg = <0 0xe6f40000 0 0x64>; 648 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 649 clocks = <&cpg CPG_MOD 515>; 650 clock-names = "fck"; 651 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 652 dma-names = "rx", "rx"; 653 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 654 resets = <&cpg 515>; 655 renesas,bonding = <&drif01>; 656 status = "disabled"; 657 }; 658 659 drif01: rif@e6f50000 { 660 compatible = "renesas,r8a7796-drif", 661 "renesas,rcar-gen3-drif"; 662 reg = <0 0xe6f50000 0 0x64>; 663 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 664 clocks = <&cpg CPG_MOD 514>; 665 clock-names = "fck"; 666 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 667 dma-names = "rx", "rx"; 668 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 669 resets = <&cpg 514>; 670 renesas,bonding = <&drif00>; 671 status = "disabled"; 672 }; 673 674 drif10: rif@e6f60000 { 675 compatible = "renesas,r8a7796-drif", 676 "renesas,rcar-gen3-drif"; 677 reg = <0 0xe6f60000 0 0x64>; 678 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 679 clocks = <&cpg CPG_MOD 513>; 680 clock-names = "fck"; 681 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 682 dma-names = "rx", "rx"; 683 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 684 resets = <&cpg 513>; 685 renesas,bonding = <&drif11>; 686 status = "disabled"; 687 }; 688 689 drif11: rif@e6f70000 { 690 compatible = "renesas,r8a7796-drif", 691 "renesas,rcar-gen3-drif"; 692 reg = <0 0xe6f70000 0 0x64>; 693 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 694 clocks = <&cpg CPG_MOD 512>; 695 clock-names = "fck"; 696 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 697 dma-names = "rx", "rx"; 698 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 699 resets = <&cpg 512>; 700 renesas,bonding = <&drif10>; 701 status = "disabled"; 702 }; 703 704 drif20: rif@e6f80000 { 705 compatible = "renesas,r8a7796-drif", 706 "renesas,rcar-gen3-drif"; 707 reg = <0 0xe6f80000 0 0x64>; 708 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 709 clocks = <&cpg CPG_MOD 511>; 710 clock-names = "fck"; 711 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 712 dma-names = "rx", "rx"; 713 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 714 resets = <&cpg 511>; 715 renesas,bonding = <&drif21>; 716 status = "disabled"; 717 }; 718 719 drif21: rif@e6f90000 { 720 compatible = "renesas,r8a7796-drif", 721 "renesas,rcar-gen3-drif"; 722 reg = <0 0xe6f90000 0 0x64>; 723 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 724 clocks = <&cpg CPG_MOD 510>; 725 clock-names = "fck"; 726 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 727 dma-names = "rx", "rx"; 728 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 729 resets = <&cpg 510>; 730 renesas,bonding = <&drif20>; 731 status = "disabled"; 732 }; 733 734 drif30: rif@e6fa0000 { 735 compatible = "renesas,r8a7796-drif", 736 "renesas,rcar-gen3-drif"; 737 reg = <0 0xe6fa0000 0 0x64>; 738 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 739 clocks = <&cpg CPG_MOD 509>; 740 clock-names = "fck"; 741 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 742 dma-names = "rx", "rx"; 743 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 744 resets = <&cpg 509>; 745 renesas,bonding = <&drif31>; 746 status = "disabled"; 747 }; 748 749 drif31: rif@e6fb0000 { 750 compatible = "renesas,r8a7796-drif", 751 "renesas,rcar-gen3-drif"; 752 reg = <0 0xe6fb0000 0 0x64>; 753 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 754 clocks = <&cpg CPG_MOD 508>; 755 clock-names = "fck"; 756 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 757 dma-names = "rx", "rx"; 758 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 759 resets = <&cpg 508>; 760 renesas,bonding = <&drif30>; 761 status = "disabled"; 762 }; 763 764 avb: ethernet@e6800000 { 765 compatible = "renesas,etheravb-r8a7796", 766 "renesas,etheravb-rcar-gen3"; 767 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 768 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 793 interrupt-names = "ch0", "ch1", "ch2", "ch3", 794 "ch4", "ch5", "ch6", "ch7", 795 "ch8", "ch9", "ch10", "ch11", 796 "ch12", "ch13", "ch14", "ch15", 797 "ch16", "ch17", "ch18", "ch19", 798 "ch20", "ch21", "ch22", "ch23", 799 "ch24"; 800 clocks = <&cpg CPG_MOD 812>; 801 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 802 resets = <&cpg 812>; 803 phy-mode = "rgmii-txid"; 804 #address-cells = <1>; 805 #size-cells = <0>; 806 status = "disabled"; 807 }; 808 809 hscif0: serial@e6540000 { 810 compatible = "renesas,hscif-r8a7796", 811 "renesas,rcar-gen3-hscif", 812 "renesas,hscif"; 813 reg = <0 0xe6540000 0 0x60>; 814 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 815 clocks = <&cpg CPG_MOD 520>, 816 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 817 <&scif_clk>; 818 clock-names = "fck", "brg_int", "scif_clk"; 819 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 820 <&dmac2 0x31>, <&dmac2 0x30>; 821 dma-names = "tx", "rx", "tx", "rx"; 822 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 823 resets = <&cpg 520>; 824 status = "disabled"; 825 }; 826 827 hscif1: serial@e6550000 { 828 compatible = "renesas,hscif-r8a7796", 829 "renesas,rcar-gen3-hscif", 830 "renesas,hscif"; 831 reg = <0 0xe6550000 0 0x60>; 832 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 833 clocks = <&cpg CPG_MOD 519>, 834 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 835 <&scif_clk>; 836 clock-names = "fck", "brg_int", "scif_clk"; 837 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 838 <&dmac2 0x33>, <&dmac2 0x32>; 839 dma-names = "tx", "rx", "tx", "rx"; 840 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 841 resets = <&cpg 519>; 842 status = "disabled"; 843 }; 844 845 hscif2: serial@e6560000 { 846 compatible = "renesas,hscif-r8a7796", 847 "renesas,rcar-gen3-hscif", 848 "renesas,hscif"; 849 reg = <0 0xe6560000 0 0x60>; 850 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 851 clocks = <&cpg CPG_MOD 518>, 852 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 853 <&scif_clk>; 854 clock-names = "fck", "brg_int", "scif_clk"; 855 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 856 <&dmac2 0x35>, <&dmac2 0x34>; 857 dma-names = "tx", "rx", "tx", "rx"; 858 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 859 resets = <&cpg 518>; 860 status = "disabled"; 861 }; 862 863 hscif3: serial@e66a0000 { 864 compatible = "renesas,hscif-r8a7796", 865 "renesas,rcar-gen3-hscif", 866 "renesas,hscif"; 867 reg = <0 0xe66a0000 0 0x60>; 868 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 869 clocks = <&cpg CPG_MOD 517>, 870 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 871 <&scif_clk>; 872 clock-names = "fck", "brg_int", "scif_clk"; 873 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 874 dma-names = "tx", "rx"; 875 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 876 resets = <&cpg 517>; 877 status = "disabled"; 878 }; 879 880 hscif4: serial@e66b0000 { 881 compatible = "renesas,hscif-r8a7796", 882 "renesas,rcar-gen3-hscif", 883 "renesas,hscif"; 884 reg = <0 0xe66b0000 0 0x60>; 885 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 886 clocks = <&cpg CPG_MOD 516>, 887 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 888 <&scif_clk>; 889 clock-names = "fck", "brg_int", "scif_clk"; 890 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 891 dma-names = "tx", "rx"; 892 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 893 resets = <&cpg 516>; 894 status = "disabled"; 895 }; 896 897 scif0: serial@e6e60000 { 898 compatible = "renesas,scif-r8a7796", 899 "renesas,rcar-gen3-scif", "renesas,scif"; 900 reg = <0 0xe6e60000 0 64>; 901 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 902 clocks = <&cpg CPG_MOD 207>, 903 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 904 <&scif_clk>; 905 clock-names = "fck", "brg_int", "scif_clk"; 906 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 907 <&dmac2 0x51>, <&dmac2 0x50>; 908 dma-names = "tx", "rx", "tx", "rx"; 909 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 910 resets = <&cpg 207>; 911 status = "disabled"; 912 }; 913 914 scif1: serial@e6e68000 { 915 compatible = "renesas,scif-r8a7796", 916 "renesas,rcar-gen3-scif", "renesas,scif"; 917 reg = <0 0xe6e68000 0 64>; 918 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 919 clocks = <&cpg CPG_MOD 206>, 920 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 921 <&scif_clk>; 922 clock-names = "fck", "brg_int", "scif_clk"; 923 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 924 <&dmac2 0x53>, <&dmac2 0x52>; 925 dma-names = "tx", "rx", "tx", "rx"; 926 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 927 resets = <&cpg 206>; 928 status = "disabled"; 929 }; 930 931 scif2: serial@e6e88000 { 932 compatible = "renesas,scif-r8a7796", 933 "renesas,rcar-gen3-scif", "renesas,scif"; 934 reg = <0 0xe6e88000 0 64>; 935 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 936 clocks = <&cpg CPG_MOD 310>, 937 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 938 <&scif_clk>; 939 clock-names = "fck", "brg_int", "scif_clk"; 940 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 941 <&dmac2 0x13>, <&dmac2 0x12>; 942 dma-names = "tx", "rx", "tx", "rx"; 943 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 944 resets = <&cpg 310>; 945 status = "disabled"; 946 }; 947 948 scif3: serial@e6c50000 { 949 compatible = "renesas,scif-r8a7796", 950 "renesas,rcar-gen3-scif", "renesas,scif"; 951 reg = <0 0xe6c50000 0 64>; 952 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 953 clocks = <&cpg CPG_MOD 204>, 954 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 955 <&scif_clk>; 956 clock-names = "fck", "brg_int", "scif_clk"; 957 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 958 dma-names = "tx", "rx"; 959 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 960 resets = <&cpg 204>; 961 status = "disabled"; 962 }; 963 964 scif4: serial@e6c40000 { 965 compatible = "renesas,scif-r8a7796", 966 "renesas,rcar-gen3-scif", "renesas,scif"; 967 reg = <0 0xe6c40000 0 64>; 968 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 969 clocks = <&cpg CPG_MOD 203>, 970 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 971 <&scif_clk>; 972 clock-names = "fck", "brg_int", "scif_clk"; 973 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 974 dma-names = "tx", "rx"; 975 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 976 resets = <&cpg 203>; 977 status = "disabled"; 978 }; 979 980 scif5: serial@e6f30000 { 981 compatible = "renesas,scif-r8a7796", 982 "renesas,rcar-gen3-scif", "renesas,scif"; 983 reg = <0 0xe6f30000 0 64>; 984 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 985 clocks = <&cpg CPG_MOD 202>, 986 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 987 <&scif_clk>; 988 clock-names = "fck", "brg_int", "scif_clk"; 989 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 990 <&dmac2 0x5b>, <&dmac2 0x5a>; 991 dma-names = "tx", "rx", "tx", "rx"; 992 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 993 resets = <&cpg 202>; 994 status = "disabled"; 995 }; 996 997 msiof0: spi@e6e90000 { 998 compatible = "renesas,msiof-r8a7796", 999 "renesas,rcar-gen3-msiof"; 1000 reg = <0 0xe6e90000 0 0x0064>; 1001 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1002 clocks = <&cpg CPG_MOD 211>; 1003 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1004 <&dmac2 0x41>, <&dmac2 0x40>; 1005 dma-names = "tx", "rx", "tx", "rx"; 1006 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1007 resets = <&cpg 211>; 1008 #address-cells = <1>; 1009 #size-cells = <0>; 1010 status = "disabled"; 1011 }; 1012 1013 msiof1: spi@e6ea0000 { 1014 compatible = "renesas,msiof-r8a7796", 1015 "renesas,rcar-gen3-msiof"; 1016 reg = <0 0xe6ea0000 0 0x0064>; 1017 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1018 clocks = <&cpg CPG_MOD 210>; 1019 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1020 <&dmac2 0x43>, <&dmac2 0x42>; 1021 dma-names = "tx", "rx", "tx", "rx"; 1022 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1023 resets = <&cpg 210>; 1024 #address-cells = <1>; 1025 #size-cells = <0>; 1026 status = "disabled"; 1027 }; 1028 1029 msiof2: spi@e6c00000 { 1030 compatible = "renesas,msiof-r8a7796", 1031 "renesas,rcar-gen3-msiof"; 1032 reg = <0 0xe6c00000 0 0x0064>; 1033 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1034 clocks = <&cpg CPG_MOD 209>; 1035 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1036 dma-names = "tx", "rx"; 1037 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1038 resets = <&cpg 209>; 1039 #address-cells = <1>; 1040 #size-cells = <0>; 1041 status = "disabled"; 1042 }; 1043 1044 msiof3: spi@e6c10000 { 1045 compatible = "renesas,msiof-r8a7796", 1046 "renesas,rcar-gen3-msiof"; 1047 reg = <0 0xe6c10000 0 0x0064>; 1048 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1049 clocks = <&cpg CPG_MOD 208>; 1050 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1051 dma-names = "tx", "rx"; 1052 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1053 resets = <&cpg 208>; 1054 #address-cells = <1>; 1055 #size-cells = <0>; 1056 status = "disabled"; 1057 }; 1058 1059 dmac0: dma-controller@e6700000 { 1060 compatible = "renesas,dmac-r8a7796", 1061 "renesas,rcar-dmac"; 1062 reg = <0 0xe6700000 0 0x10000>; 1063 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 1064 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 1065 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 1066 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 1067 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 1068 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 1069 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 1070 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 1071 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 1072 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 1073 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 1074 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 1075 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 1076 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 1077 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 1078 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 1079 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 1080 interrupt-names = "error", 1081 "ch0", "ch1", "ch2", "ch3", 1082 "ch4", "ch5", "ch6", "ch7", 1083 "ch8", "ch9", "ch10", "ch11", 1084 "ch12", "ch13", "ch14", "ch15"; 1085 clocks = <&cpg CPG_MOD 219>; 1086 clock-names = "fck"; 1087 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1088 resets = <&cpg 219>; 1089 #dma-cells = <1>; 1090 dma-channels = <16>; 1091 }; 1092 1093 dmac1: dma-controller@e7300000 { 1094 compatible = "renesas,dmac-r8a7796", 1095 "renesas,rcar-dmac"; 1096 reg = <0 0xe7300000 0 0x10000>; 1097 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 1098 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 1099 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 1100 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 1101 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 1102 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 1103 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 1104 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 1105 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 1106 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 1107 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 1108 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 1109 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 1110 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 1111 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 1112 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 1113 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1114 interrupt-names = "error", 1115 "ch0", "ch1", "ch2", "ch3", 1116 "ch4", "ch5", "ch6", "ch7", 1117 "ch8", "ch9", "ch10", "ch11", 1118 "ch12", "ch13", "ch14", "ch15"; 1119 clocks = <&cpg CPG_MOD 218>; 1120 clock-names = "fck"; 1121 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1122 resets = <&cpg 218>; 1123 #dma-cells = <1>; 1124 dma-channels = <16>; 1125 }; 1126 1127 dmac2: dma-controller@e7310000 { 1128 compatible = "renesas,dmac-r8a7796", 1129 "renesas,rcar-dmac"; 1130 reg = <0 0xe7310000 0 0x10000>; 1131 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 1132 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 1133 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 1134 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 1135 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 1136 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 1137 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 1138 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 1139 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 1140 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 1141 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 1142 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 1143 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 1144 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 1145 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 1146 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 1147 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1148 interrupt-names = "error", 1149 "ch0", "ch1", "ch2", "ch3", 1150 "ch4", "ch5", "ch6", "ch7", 1151 "ch8", "ch9", "ch10", "ch11", 1152 "ch12", "ch13", "ch14", "ch15"; 1153 clocks = <&cpg CPG_MOD 217>; 1154 clock-names = "fck"; 1155 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1156 resets = <&cpg 217>; 1157 #dma-cells = <1>; 1158 dma-channels = <16>; 1159 }; 1160 1161 audma0: dma-controller@ec700000 { 1162 compatible = "renesas,dmac-r8a7796", 1163 "renesas,rcar-dmac"; 1164 reg = <0 0xec700000 0 0x10000>; 1165 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1166 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1167 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1168 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1169 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1170 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1171 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1172 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1173 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1174 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1175 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1176 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1177 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1178 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1179 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1180 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1181 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1182 interrupt-names = "error", 1183 "ch0", "ch1", "ch2", "ch3", 1184 "ch4", "ch5", "ch6", "ch7", 1185 "ch8", "ch9", "ch10", "ch11", 1186 "ch12", "ch13", "ch14", "ch15"; 1187 clocks = <&cpg CPG_MOD 502>; 1188 clock-names = "fck"; 1189 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1190 resets = <&cpg 502>; 1191 #dma-cells = <1>; 1192 dma-channels = <16>; 1193 }; 1194 1195 audma1: dma-controller@ec720000 { 1196 compatible = "renesas,dmac-r8a7796", 1197 "renesas,rcar-dmac"; 1198 reg = <0 0xec720000 0 0x10000>; 1199 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH 1200 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 1201 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 1202 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 1203 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 1204 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 1205 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 1206 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 1207 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 1208 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 1209 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 1210 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1211 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 1212 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 1213 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH 1214 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 1215 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 1216 interrupt-names = "error", 1217 "ch0", "ch1", "ch2", "ch3", 1218 "ch4", "ch5", "ch6", "ch7", 1219 "ch8", "ch9", "ch10", "ch11", 1220 "ch12", "ch13", "ch14", "ch15"; 1221 clocks = <&cpg CPG_MOD 501>; 1222 clock-names = "fck"; 1223 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1224 resets = <&cpg 501>; 1225 #dma-cells = <1>; 1226 dma-channels = <16>; 1227 }; 1228 1229 usb_dmac0: dma-controller@e65a0000 { 1230 compatible = "renesas,r8a7796-usb-dmac", 1231 "renesas,usb-dmac"; 1232 reg = <0 0xe65a0000 0 0x100>; 1233 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 1234 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 1235 interrupt-names = "ch0", "ch1"; 1236 clocks = <&cpg CPG_MOD 330>; 1237 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1238 resets = <&cpg 330>; 1239 #dma-cells = <1>; 1240 dma-channels = <2>; 1241 }; 1242 1243 usb_dmac1: dma-controller@e65b0000 { 1244 compatible = "renesas,r8a7796-usb-dmac", 1245 "renesas,usb-dmac"; 1246 reg = <0 0xe65b0000 0 0x100>; 1247 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 1248 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 1249 interrupt-names = "ch0", "ch1"; 1250 clocks = <&cpg CPG_MOD 331>; 1251 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1252 resets = <&cpg 331>; 1253 #dma-cells = <1>; 1254 dma-channels = <2>; 1255 }; 1256 1257 hsusb: usb@e6590000 { 1258 compatible = "renesas,usbhs-r8a7796", 1259 "renesas,rcar-gen3-usbhs"; 1260 reg = <0 0xe6590000 0 0x100>; 1261 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 1262 clocks = <&cpg CPG_MOD 704>; 1263 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 1264 <&usb_dmac1 0>, <&usb_dmac1 1>; 1265 dma-names = "ch0", "ch1", "ch2", "ch3"; 1266 renesas,buswait = <11>; 1267 phys = <&usb2_phy0>; 1268 phy-names = "usb"; 1269 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1270 resets = <&cpg 704>; 1271 status = "disabled"; 1272 }; 1273 1274 xhci0: usb@ee000000 { 1275 compatible = "renesas,xhci-r8a7796", 1276 "renesas,rcar-gen3-xhci"; 1277 reg = <0 0xee000000 0 0xc00>; 1278 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1279 clocks = <&cpg CPG_MOD 328>; 1280 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1281 resets = <&cpg 328>; 1282 status = "disabled"; 1283 }; 1284 1285 ohci0: usb@ee080000 { 1286 compatible = "generic-ohci"; 1287 reg = <0 0xee080000 0 0x100>; 1288 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1289 clocks = <&cpg CPG_MOD 703>; 1290 phys = <&usb2_phy0>; 1291 phy-names = "usb"; 1292 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1293 resets = <&cpg 703>; 1294 status = "disabled"; 1295 }; 1296 1297 ehci0: usb@ee080100 { 1298 compatible = "generic-ehci"; 1299 reg = <0 0xee080100 0 0x100>; 1300 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1301 clocks = <&cpg CPG_MOD 703>; 1302 phys = <&usb2_phy0>; 1303 phy-names = "usb"; 1304 companion= <&ohci0>; 1305 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1306 resets = <&cpg 703>; 1307 status = "disabled"; 1308 }; 1309 1310 usb2_phy0: usb-phy@ee080200 { 1311 compatible = "renesas,usb2-phy-r8a7796", 1312 "renesas,rcar-gen3-usb2-phy"; 1313 reg = <0 0xee080200 0 0x700>; 1314 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1315 clocks = <&cpg CPG_MOD 703>; 1316 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1317 resets = <&cpg 703>; 1318 #phy-cells = <0>; 1319 status = "disabled"; 1320 }; 1321 1322 ohci1: usb@ee0a0000 { 1323 compatible = "generic-ohci"; 1324 reg = <0 0xee0a0000 0 0x100>; 1325 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1326 clocks = <&cpg CPG_MOD 702>; 1327 phys = <&usb2_phy1>; 1328 phy-names = "usb"; 1329 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1330 resets = <&cpg 702>; 1331 status = "disabled"; 1332 }; 1333 1334 ehci1: usb@ee0a0100 { 1335 compatible = "generic-ehci"; 1336 reg = <0 0xee0a0100 0 0x100>; 1337 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1338 clocks = <&cpg CPG_MOD 702>; 1339 phys = <&usb2_phy1>; 1340 phy-names = "usb"; 1341 companion= <&ohci1>; 1342 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1343 resets = <&cpg 702>; 1344 status = "disabled"; 1345 }; 1346 1347 usb2_phy1: usb-phy@ee0a0200 { 1348 compatible = "renesas,usb2-phy-r8a7796", 1349 "renesas,rcar-gen3-usb2-phy"; 1350 reg = <0 0xee0a0200 0 0x700>; 1351 clocks = <&cpg CPG_MOD 702>; 1352 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1353 resets = <&cpg 702>; 1354 #phy-cells = <0>; 1355 status = "disabled"; 1356 }; 1357 1358 sdhi0: sd@ee100000 { 1359 compatible = "renesas,sdhi-r8a7796"; 1360 reg = <0 0xee100000 0 0x2000>; 1361 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1362 clocks = <&cpg CPG_MOD 314>; 1363 max-frequency = <200000000>; 1364 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1365 resets = <&cpg 314>; 1366 status = "disabled"; 1367 }; 1368 1369 sdhi1: sd@ee120000 { 1370 compatible = "renesas,sdhi-r8a7796"; 1371 reg = <0 0xee120000 0 0x2000>; 1372 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1373 clocks = <&cpg CPG_MOD 313>; 1374 max-frequency = <200000000>; 1375 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1376 resets = <&cpg 313>; 1377 status = "disabled"; 1378 }; 1379 1380 sdhi2: sd@ee140000 { 1381 compatible = "renesas,sdhi-r8a7796"; 1382 reg = <0 0xee140000 0 0x2000>; 1383 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1384 clocks = <&cpg CPG_MOD 312>; 1385 max-frequency = <200000000>; 1386 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1387 resets = <&cpg 312>; 1388 status = "disabled"; 1389 }; 1390 1391 sdhi3: sd@ee160000 { 1392 compatible = "renesas,sdhi-r8a7796"; 1393 reg = <0 0xee160000 0 0x2000>; 1394 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1395 clocks = <&cpg CPG_MOD 311>; 1396 max-frequency = <200000000>; 1397 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1398 resets = <&cpg 311>; 1399 status = "disabled"; 1400 }; 1401 1402 tsc: thermal@e6198000 { 1403 compatible = "renesas,r8a7796-thermal"; 1404 reg = <0 0xe6198000 0 0x68>, 1405 <0 0xe61a0000 0 0x5c>, 1406 <0 0xe61a8000 0 0x5c>; 1407 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 1408 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 1409 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 1410 clocks = <&cpg CPG_MOD 522>; 1411 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1412 resets = <&cpg 522>; 1413 #thermal-sensor-cells = <1>; 1414 status = "okay"; 1415 }; 1416 1417 thermal-zones { 1418 sensor_thermal1: sensor-thermal1 { 1419 polling-delay-passive = <250>; 1420 polling-delay = <1000>; 1421 thermal-sensors = <&tsc 0>; 1422 1423 trips { 1424 sensor1_crit: sensor1-crit { 1425 temperature = <120000>; 1426 hysteresis = <2000>; 1427 type = "critical"; 1428 }; 1429 }; 1430 }; 1431 1432 sensor_thermal2: sensor-thermal2 { 1433 polling-delay-passive = <250>; 1434 polling-delay = <1000>; 1435 thermal-sensors = <&tsc 1>; 1436 1437 trips { 1438 sensor2_crit: sensor2-crit { 1439 temperature = <120000>; 1440 hysteresis = <2000>; 1441 type = "critical"; 1442 }; 1443 }; 1444 }; 1445 1446 sensor_thermal3: sensor-thermal3 { 1447 polling-delay-passive = <250>; 1448 polling-delay = <1000>; 1449 thermal-sensors = <&tsc 2>; 1450 1451 trips { 1452 sensor3_crit: sensor3-crit { 1453 temperature = <120000>; 1454 hysteresis = <2000>; 1455 type = "critical"; 1456 }; 1457 }; 1458 }; 1459 }; 1460 1461 rcar_sound: sound@ec500000 { 1462 /* 1463 * #sound-dai-cells is required 1464 * 1465 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1466 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1467 */ 1468 /* 1469 * #clock-cells is required for audio_clkout0/1/2/3 1470 * 1471 * clkout : #clock-cells = <0>; <&rcar_sound>; 1472 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1473 */ 1474 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1475 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1476 <0 0xec5a0000 0 0x100>, /* ADG */ 1477 <0 0xec540000 0 0x1000>, /* SSIU */ 1478 <0 0xec541000 0 0x280>, /* SSI */ 1479 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1480 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1481 1482 clocks = <&cpg CPG_MOD 1005>, 1483 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1484 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1485 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1486 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1487 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1488 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1489 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1490 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1491 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1492 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1493 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1494 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1495 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1496 <&audio_clk_a>, <&audio_clk_b>, 1497 <&audio_clk_c>, 1498 <&cpg CPG_CORE R8A7796_CLK_S0D4>; 1499 clock-names = "ssi-all", 1500 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1501 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1502 "ssi.1", "ssi.0", 1503 "src.9", "src.8", "src.7", "src.6", 1504 "src.5", "src.4", "src.3", "src.2", 1505 "src.1", "src.0", 1506 "mix.1", "mix.0", 1507 "ctu.1", "ctu.0", 1508 "dvc.0", "dvc.1", 1509 "clk_a", "clk_b", "clk_c", "clk_i"; 1510 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1511 resets = <&cpg 1005>, 1512 <&cpg 1006>, <&cpg 1007>, 1513 <&cpg 1008>, <&cpg 1009>, 1514 <&cpg 1010>, <&cpg 1011>, 1515 <&cpg 1012>, <&cpg 1013>, 1516 <&cpg 1014>, <&cpg 1015>; 1517 reset-names = "ssi-all", 1518 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1519 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1520 "ssi.1", "ssi.0"; 1521 status = "disabled"; 1522 1523 rcar_sound,dvc { 1524 dvc0: dvc-0 { 1525 dmas = <&audma1 0xbc>; 1526 dma-names = "tx"; 1527 }; 1528 dvc1: dvc-1 { 1529 dmas = <&audma1 0xbe>; 1530 dma-names = "tx"; 1531 }; 1532 }; 1533 1534 rcar_sound,mix { 1535 mix0: mix-0 { }; 1536 mix1: mix-1 { }; 1537 }; 1538 1539 rcar_sound,ctu { 1540 ctu00: ctu-0 { }; 1541 ctu01: ctu-1 { }; 1542 ctu02: ctu-2 { }; 1543 ctu03: ctu-3 { }; 1544 ctu10: ctu-4 { }; 1545 ctu11: ctu-5 { }; 1546 ctu12: ctu-6 { }; 1547 ctu13: ctu-7 { }; 1548 }; 1549 1550 rcar_sound,src { 1551 src0: src-0 { 1552 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1553 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1554 dma-names = "rx", "tx"; 1555 }; 1556 src1: src-1 { 1557 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1558 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1559 dma-names = "rx", "tx"; 1560 }; 1561 src2: src-2 { 1562 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1563 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1564 dma-names = "rx", "tx"; 1565 }; 1566 src3: src-3 { 1567 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1568 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1569 dma-names = "rx", "tx"; 1570 }; 1571 src4: src-4 { 1572 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1573 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1574 dma-names = "rx", "tx"; 1575 }; 1576 src5: src-5 { 1577 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1578 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1579 dma-names = "rx", "tx"; 1580 }; 1581 src6: src-6 { 1582 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1583 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1584 dma-names = "rx", "tx"; 1585 }; 1586 src7: src-7 { 1587 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1588 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1589 dma-names = "rx", "tx"; 1590 }; 1591 src8: src-8 { 1592 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1593 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1594 dma-names = "rx", "tx"; 1595 }; 1596 src9: src-9 { 1597 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1598 dmas = <&audma0 0x97>, <&audma1 0xba>; 1599 dma-names = "rx", "tx"; 1600 }; 1601 }; 1602 1603 rcar_sound,ssi { 1604 ssi0: ssi-0 { 1605 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1606 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1607 dma-names = "rx", "tx", "rxu", "txu"; 1608 }; 1609 ssi1: ssi-1 { 1610 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1611 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1612 dma-names = "rx", "tx", "rxu", "txu"; 1613 }; 1614 ssi2: ssi-2 { 1615 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1616 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1617 dma-names = "rx", "tx", "rxu", "txu"; 1618 }; 1619 ssi3: ssi-3 { 1620 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1621 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1622 dma-names = "rx", "tx", "rxu", "txu"; 1623 }; 1624 ssi4: ssi-4 { 1625 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1626 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1627 dma-names = "rx", "tx", "rxu", "txu"; 1628 }; 1629 ssi5: ssi-5 { 1630 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1631 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1632 dma-names = "rx", "tx", "rxu", "txu"; 1633 }; 1634 ssi6: ssi-6 { 1635 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1636 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1637 dma-names = "rx", "tx", "rxu", "txu"; 1638 }; 1639 ssi7: ssi-7 { 1640 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1641 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1642 dma-names = "rx", "tx", "rxu", "txu"; 1643 }; 1644 ssi8: ssi-8 { 1645 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1646 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1647 dma-names = "rx", "tx", "rxu", "txu"; 1648 }; 1649 ssi9: ssi-9 { 1650 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1651 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1652 dma-names = "rx", "tx", "rxu", "txu"; 1653 }; 1654 }; 1655 }; 1656 1657 pciec0: pcie@fe000000 { 1658 /* placeholder */ 1659 }; 1660 1661 pciec1: pcie@ee800000 { 1662 /* placeholder */ 1663 }; 1664 1665 fcpf0: fcp@fe950000 { 1666 compatible = "renesas,fcpf"; 1667 reg = <0 0xfe950000 0 0x200>; 1668 clocks = <&cpg CPG_MOD 615>; 1669 power-domains = <&sysc R8A7796_PD_A3VC>; 1670 resets = <&cpg 615>; 1671 }; 1672 1673 vspb: vsp@fe960000 { 1674 compatible = "renesas,vsp2"; 1675 reg = <0 0xfe960000 0 0x8000>; 1676 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1677 clocks = <&cpg CPG_MOD 626>; 1678 power-domains = <&sysc R8A7796_PD_A3VC>; 1679 resets = <&cpg 626>; 1680 1681 renesas,fcp = <&fcpvb0>; 1682 }; 1683 1684 fcpvb0: fcp@fe96f000 { 1685 compatible = "renesas,fcpv"; 1686 reg = <0 0xfe96f000 0 0x200>; 1687 clocks = <&cpg CPG_MOD 607>; 1688 power-domains = <&sysc R8A7796_PD_A3VC>; 1689 resets = <&cpg 607>; 1690 }; 1691 1692 vspi0: vsp@fe9a0000 { 1693 compatible = "renesas,vsp2"; 1694 reg = <0 0xfe9a0000 0 0x8000>; 1695 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1696 clocks = <&cpg CPG_MOD 631>; 1697 power-domains = <&sysc R8A7796_PD_A3VC>; 1698 resets = <&cpg 631>; 1699 1700 renesas,fcp = <&fcpvi0>; 1701 }; 1702 1703 fcpvi0: fcp@fe9af000 { 1704 compatible = "renesas,fcpv"; 1705 reg = <0 0xfe9af000 0 0x200>; 1706 clocks = <&cpg CPG_MOD 611>; 1707 power-domains = <&sysc R8A7796_PD_A3VC>; 1708 resets = <&cpg 611>; 1709 }; 1710 1711 vspd0: vsp@fea20000 { 1712 compatible = "renesas,vsp2"; 1713 reg = <0 0xfea20000 0 0x4000>; 1714 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1715 clocks = <&cpg CPG_MOD 623>; 1716 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1717 resets = <&cpg 623>; 1718 1719 renesas,fcp = <&fcpvd0>; 1720 }; 1721 1722 fcpvd0: fcp@fea27000 { 1723 compatible = "renesas,fcpv"; 1724 reg = <0 0xfea27000 0 0x200>; 1725 clocks = <&cpg CPG_MOD 603>; 1726 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1727 resets = <&cpg 603>; 1728 }; 1729 1730 vspd1: vsp@fea28000 { 1731 compatible = "renesas,vsp2"; 1732 reg = <0 0xfea28000 0 0x4000>; 1733 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1734 clocks = <&cpg CPG_MOD 622>; 1735 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1736 resets = <&cpg 622>; 1737 1738 renesas,fcp = <&fcpvd1>; 1739 }; 1740 1741 fcpvd1: fcp@fea2f000 { 1742 compatible = "renesas,fcpv"; 1743 reg = <0 0xfea2f000 0 0x200>; 1744 clocks = <&cpg CPG_MOD 602>; 1745 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1746 resets = <&cpg 602>; 1747 }; 1748 1749 vspd2: vsp@fea30000 { 1750 compatible = "renesas,vsp2"; 1751 reg = <0 0xfea30000 0 0x4000>; 1752 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 1753 clocks = <&cpg CPG_MOD 621>; 1754 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1755 resets = <&cpg 621>; 1756 1757 renesas,fcp = <&fcpvd2>; 1758 }; 1759 1760 fcpvd2: fcp@fea37000 { 1761 compatible = "renesas,fcpv"; 1762 reg = <0 0xfea37000 0 0x200>; 1763 clocks = <&cpg CPG_MOD 601>; 1764 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1765 resets = <&cpg 601>; 1766 }; 1767 1768 hdmi0: hdmi@fead0000 { 1769 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; 1770 reg = <0 0xfead0000 0 0x10000>; 1771 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 1772 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; 1773 clock-names = "iahb", "isfr"; 1774 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1775 resets = <&cpg 729>; 1776 status = "disabled"; 1777 1778 ports { 1779 #address-cells = <1>; 1780 #size-cells = <0>; 1781 port@0 { 1782 reg = <0>; 1783 dw_hdmi0_in: endpoint { 1784 remote-endpoint = <&du_out_hdmi0>; 1785 }; 1786 }; 1787 port@1 { 1788 reg = <1>; 1789 }; 1790 }; 1791 }; 1792 1793 du: display@feb00000 { 1794 compatible = "renesas,du-r8a7796"; 1795 reg = <0 0xfeb00000 0 0x70000>, 1796 <0 0xfeb90000 0 0x14>; 1797 reg-names = "du", "lvds.0"; 1798 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1799 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1800 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 1801 clocks = <&cpg CPG_MOD 724>, 1802 <&cpg CPG_MOD 723>, 1803 <&cpg CPG_MOD 722>, 1804 <&cpg CPG_MOD 727>; 1805 clock-names = "du.0", "du.1", "du.2", "lvds.0"; 1806 status = "disabled"; 1807 1808 vsps = <&vspd0 &vspd1 &vspd2>; 1809 1810 ports { 1811 #address-cells = <1>; 1812 #size-cells = <0>; 1813 1814 port@0 { 1815 reg = <0>; 1816 du_out_rgb: endpoint { 1817 }; 1818 }; 1819 port@1 { 1820 reg = <1>; 1821 du_out_hdmi0: endpoint { 1822 remote-endpoint = <&dw_hdmi0_in>; 1823 }; 1824 }; 1825 port@2 { 1826 reg = <2>; 1827 du_out_lvds0: endpoint { 1828 }; 1829 }; 1830 }; 1831 }; 1832 1833 imr-lx4@fe860000 { 1834 compatible = "renesas,r8a7796-imr-lx4", 1835 "renesas,imr-lx4"; 1836 reg = <0 0xfe860000 0 0x2000>; 1837 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 1838 clocks = <&cpg CPG_MOD 823>; 1839 power-domains = <&sysc R8A7796_PD_A3VC>; 1840 resets = <&cpg 823>; 1841 }; 1842 1843 imr-lx4@fe870000 { 1844 compatible = "renesas,r8a7796-imr-lx4", 1845 "renesas,imr-lx4"; 1846 reg = <0 0xfe870000 0 0x2000>; 1847 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 1848 clocks = <&cpg CPG_MOD 822>; 1849 power-domains = <&sysc R8A7796_PD_A3VC>; 1850 resets = <&cpg 822>; 1851 }; 1852 }; 1853}; 1854