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1 /*
2  * Board Info File for the BlackStamp
3  *
4  * Copyright 2004-2008 Analog Devices Inc.
5  *                2008 Benjamin Matthews <bmat@lle.rochester.edu>
6  *                2005 National ICT Australia (NICTA)
7  *                      Aidan Williams <aidan@nicta.com.au>
8  *
9  * More info about the BlackStamp at:
10  * 	http://blackfin.uclinux.org/gf/project/blackstamp/
11  *
12  * Licensed under the GPL-2 or later.
13  */
14 
15 #include <linux/device.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/partitions.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/flash.h>
22 #include <linux/irq.h>
23 #include <linux/gpio.h>
24 #include <linux/i2c.h>
25 #include <asm/dma.h>
26 #include <asm/bfin5xx_spi.h>
27 #include <asm/portmux.h>
28 #include <asm/dpmc.h>
29 
30 /*
31  * Name the Board for the /proc/cpuinfo
32  */
33 const char bfin_board_name[] = "BlackStamp";
34 
35 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
36 static struct platform_device rtc_device = {
37 	.name = "rtc-bfin",
38 	.id   = -1,
39 };
40 #endif
41 
42 /*
43  *  Driver needs to know address, irq and flag pin.
44  */
45 #if IS_ENABLED(CONFIG_SMC91X)
46 #include <linux/smc91x.h>
47 
48 static struct smc91x_platdata smc91x_info = {
49 	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
50 	.leda = RPC_LED_100_10,
51 	.ledb = RPC_LED_TX_RX,
52 };
53 
54 static struct resource smc91x_resources[] = {
55 	{
56 		.name = "smc91x-regs",
57 		.start = 0x20300300,
58 		.end = 0x20300300 + 16,
59 		.flags = IORESOURCE_MEM,
60 	}, {
61 		.start = IRQ_PF3,
62 		.end = IRQ_PF3,
63 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
64 	},
65 };
66 
67 static struct platform_device smc91x_device = {
68 	.name = "smc91x",
69 	.id = 0,
70 	.num_resources = ARRAY_SIZE(smc91x_resources),
71 	.resource = smc91x_resources,
72 	.dev	= {
73 		.platform_data	= &smc91x_info,
74 	},
75 };
76 #endif
77 
78 #if IS_ENABLED(CONFIG_MTD_M25P80)
79 static struct mtd_partition bfin_spi_flash_partitions[] = {
80 	{
81 		.name = "bootloader(spi)",
82 		.size = 0x00040000,
83 		.offset = 0,
84 		.mask_flags = MTD_CAP_ROM
85 	}, {
86 		.name = "linux kernel(spi)",
87 		.size = 0x180000,
88 		.offset = MTDPART_OFS_APPEND,
89 	}, {
90 		.name = "file system(spi)",
91 		.size = MTDPART_SIZ_FULL,
92 		.offset = MTDPART_OFS_APPEND,
93 	}
94 };
95 
96 static struct flash_platform_data bfin_spi_flash_data = {
97 	.name = "m25p80",
98 	.parts = bfin_spi_flash_partitions,
99 	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
100 	.type = "m25p64",
101 };
102 
103 /* SPI flash chip (m25p64) */
104 static struct bfin5xx_spi_chip spi_flash_chip_info = {
105 	.enable_dma = 0,         /* use dma transfer with this chip*/
106 };
107 #endif
108 
109 #if IS_ENABLED(CONFIG_MMC_SPI)
110 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
111 	.enable_dma = 0,
112 };
113 #endif
114 
115 static struct spi_board_info bfin_spi_board_info[] __initdata = {
116 #if IS_ENABLED(CONFIG_MTD_M25P80)
117 	{
118 		/* the modalias must be the same as spi device driver name */
119 		.modalias = "m25p80", /* Name of spi_driver for this device */
120 		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
121 		.bus_num = 0, /* Framework bus number */
122 		.chip_select = 2, /* Framework chip select. */
123 		.platform_data = &bfin_spi_flash_data,
124 		.controller_data = &spi_flash_chip_info,
125 		.mode = SPI_MODE_3,
126 	},
127 #endif
128 
129 #if IS_ENABLED(CONFIG_MMC_SPI)
130 	{
131 		.modalias = "mmc_spi",
132 		.max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
133 		.bus_num = 0,
134 		.chip_select = 5,
135 		.controller_data = &mmc_spi_chip_info,
136 		.mode = SPI_MODE_3,
137 	},
138 #endif
139 
140 #if IS_ENABLED(CONFIG_SPI_SPIDEV)
141 	{
142 		.modalias = "spidev",
143 		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
144 		.bus_num = 0,
145 		.chip_select = 7,
146 	},
147 #endif
148 };
149 
150 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
151 /* SPI (0) */
152 static struct resource bfin_spi0_resource[] = {
153 	[0] = {
154 		.start = SPI0_REGBASE,
155 		.end   = SPI0_REGBASE + 0xFF,
156 		.flags = IORESOURCE_MEM,
157 	},
158 	[1] = {
159 		.start = CH_SPI,
160 		.end   = CH_SPI,
161 		.flags = IORESOURCE_DMA,
162 	},
163 	[2] = {
164 		.start = IRQ_SPI,
165 		.end   = IRQ_SPI,
166 		.flags = IORESOURCE_IRQ,
167 	}
168 };
169 
170 /* SPI controller data */
171 static struct bfin5xx_spi_master bfin_spi0_info = {
172 	.num_chipselect = 8,
173 	.enable_dma = 1,  /* master has the ability to do dma transfer */
174 	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
175 };
176 
177 static struct platform_device bfin_spi0_device = {
178 	.name = "bfin-spi",
179 	.id = 0, /* Bus number */
180 	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
181 	.resource = bfin_spi0_resource,
182 	.dev = {
183 		.platform_data = &bfin_spi0_info, /* Passed to driver */
184 	},
185 };
186 #endif  /* spi master and devices */
187 
188 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
189 #ifdef CONFIG_SERIAL_BFIN_UART0
190 static struct resource bfin_uart0_resources[] = {
191 	{
192 		.start = BFIN_UART_THR,
193 		.end = BFIN_UART_GCTL+2,
194 		.flags = IORESOURCE_MEM,
195 	},
196 	{
197 		.start = IRQ_UART0_TX,
198 		.end = IRQ_UART0_TX,
199 		.flags = IORESOURCE_IRQ,
200 	},
201 	{
202 		.start = IRQ_UART0_RX,
203 		.end = IRQ_UART0_RX,
204 		.flags = IORESOURCE_IRQ,
205 	},
206 	{
207 		.start = IRQ_UART0_ERROR,
208 		.end = IRQ_UART0_ERROR,
209 		.flags = IORESOURCE_IRQ,
210 	},
211 	{
212 		.start = CH_UART0_TX,
213 		.end = CH_UART0_TX,
214 		.flags = IORESOURCE_DMA,
215 	},
216 	{
217 		.start = CH_UART0_RX,
218 		.end = CH_UART0_RX,
219 		.flags = IORESOURCE_DMA,
220 	},
221 };
222 
223 static unsigned short bfin_uart0_peripherals[] = {
224 	P_UART0_TX, P_UART0_RX, 0
225 };
226 
227 static struct platform_device bfin_uart0_device = {
228 	.name = "bfin-uart",
229 	.id = 0,
230 	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
231 	.resource = bfin_uart0_resources,
232 	.dev = {
233 		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
234 	},
235 };
236 #endif
237 #endif
238 
239 #if IS_ENABLED(CONFIG_BFIN_SIR)
240 #ifdef CONFIG_BFIN_SIR0
241 static struct resource bfin_sir0_resources[] = {
242 	{
243 		.start = 0xFFC00400,
244 		.end = 0xFFC004FF,
245 		.flags = IORESOURCE_MEM,
246 	},
247 	{
248 		.start = IRQ_UART0_RX,
249 		.end = IRQ_UART0_RX+1,
250 		.flags = IORESOURCE_IRQ,
251 	},
252 	{
253 		.start = CH_UART0_RX,
254 		.end = CH_UART0_RX+1,
255 		.flags = IORESOURCE_DMA,
256 	},
257 };
258 
259 static struct platform_device bfin_sir0_device = {
260 	.name = "bfin_sir",
261 	.id = 0,
262 	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
263 	.resource = bfin_sir0_resources,
264 };
265 #endif
266 #endif
267 
268 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
269 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
270 static struct resource bfin_sport0_uart_resources[] = {
271 	{
272 		.start = SPORT0_TCR1,
273 		.end = SPORT0_MRCS3+4,
274 		.flags = IORESOURCE_MEM,
275 	},
276 	{
277 		.start = IRQ_SPORT0_RX,
278 		.end = IRQ_SPORT0_RX+1,
279 		.flags = IORESOURCE_IRQ,
280 	},
281 	{
282 		.start = IRQ_SPORT0_ERROR,
283 		.end = IRQ_SPORT0_ERROR,
284 		.flags = IORESOURCE_IRQ,
285 	},
286 };
287 
288 static unsigned short bfin_sport0_peripherals[] = {
289 	P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
290 	P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
291 };
292 
293 static struct platform_device bfin_sport0_uart_device = {
294 	.name = "bfin-sport-uart",
295 	.id = 0,
296 	.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
297 	.resource = bfin_sport0_uart_resources,
298 	.dev = {
299 		.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
300 	},
301 };
302 #endif
303 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
304 static struct resource bfin_sport1_uart_resources[] = {
305 	{
306 		.start = SPORT1_TCR1,
307 		.end = SPORT1_MRCS3+4,
308 		.flags = IORESOURCE_MEM,
309 	},
310 	{
311 		.start = IRQ_SPORT1_RX,
312 		.end = IRQ_SPORT1_RX+1,
313 		.flags = IORESOURCE_IRQ,
314 	},
315 	{
316 		.start = IRQ_SPORT1_ERROR,
317 		.end = IRQ_SPORT1_ERROR,
318 		.flags = IORESOURCE_IRQ,
319 	},
320 };
321 
322 static unsigned short bfin_sport1_peripherals[] = {
323 	P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
324 	P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
325 };
326 
327 static struct platform_device bfin_sport1_uart_device = {
328 	.name = "bfin-sport-uart",
329 	.id = 1,
330 	.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
331 	.resource = bfin_sport1_uart_resources,
332 	.dev = {
333 		.platform_data = &bfin_sport1_peripherals, /* Passed to driver */
334 	},
335 };
336 #endif
337 #endif
338 
339 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
340 #include <linux/input.h>
341 #include <linux/gpio_keys.h>
342 
343 static struct gpio_keys_button bfin_gpio_keys_table[] = {
344 	{BTN_0, GPIO_PF4, 0, "gpio-keys: BTN0"},
345 	{BTN_1, GPIO_PF5, 0, "gpio-keys: BTN1"},
346 	{BTN_2, GPIO_PF6, 0, "gpio-keys: BTN2"},
347 }; /* Mapped to the first three PF Test Points */
348 
349 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
350 	.buttons        = bfin_gpio_keys_table,
351 	.nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
352 };
353 
354 static struct platform_device bfin_device_gpiokeys = {
355 	.name      = "gpio-keys",
356 	.dev = {
357 		.platform_data = &bfin_gpio_keys_data,
358 	},
359 };
360 #endif
361 
362 #if IS_ENABLED(CONFIG_I2C_GPIO)
363 #include <linux/i2c-gpio.h>
364 
365 static struct i2c_gpio_platform_data i2c_gpio_data = {
366 	.sda_pin		= GPIO_PF8,
367 	.scl_pin		= GPIO_PF9,
368 	.sda_is_open_drain	= 0,
369 	.scl_is_open_drain	= 0,
370 	.udelay			= 40,
371 }; /* This hasn't actually been used these pins
372     * are (currently) free pins on the expansion connector */
373 
374 static struct platform_device i2c_gpio_device = {
375 	.name		= "i2c-gpio",
376 	.id		= 0,
377 	.dev		= {
378 		.platform_data	= &i2c_gpio_data,
379 	},
380 };
381 #endif
382 
383 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
384 };
385 
386 static const unsigned int cclk_vlev_datasheet[] =
387 {
388 	VRPAIR(VLEV_085, 250000000),
389 	VRPAIR(VLEV_090, 376000000),
390 	VRPAIR(VLEV_095, 426000000),
391 	VRPAIR(VLEV_100, 426000000),
392 	VRPAIR(VLEV_105, 476000000),
393 	VRPAIR(VLEV_110, 476000000),
394 	VRPAIR(VLEV_115, 476000000),
395 	VRPAIR(VLEV_120, 600000000),
396 	VRPAIR(VLEV_125, 600000000),
397 	VRPAIR(VLEV_130, 600000000),
398 };
399 
400 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
401 	.tuple_tab = cclk_vlev_datasheet,
402 	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
403 	.vr_settling_time = 25 /* us */,
404 };
405 
406 static struct platform_device bfin_dpmc = {
407 	.name = "bfin dpmc",
408 	.dev = {
409 		.platform_data = &bfin_dmpc_vreg_data,
410 	},
411 };
412 
413 static struct platform_device *stamp_devices[] __initdata = {
414 
415 	&bfin_dpmc,
416 
417 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
418 	&rtc_device,
419 #endif
420 
421 #if IS_ENABLED(CONFIG_SMC91X)
422 	&smc91x_device,
423 #endif
424 
425 
426 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
427 	&bfin_spi0_device,
428 #endif
429 
430 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
431 #ifdef CONFIG_SERIAL_BFIN_UART0
432 	&bfin_uart0_device,
433 #endif
434 #endif
435 
436 #if IS_ENABLED(CONFIG_BFIN_SIR)
437 #ifdef CONFIG_BFIN_SIR0
438 	&bfin_sir0_device,
439 #endif
440 #endif
441 
442 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
443 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
444 	&bfin_sport0_uart_device,
445 #endif
446 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
447 	&bfin_sport1_uart_device,
448 #endif
449 #endif
450 
451 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
452 	&bfin_device_gpiokeys,
453 #endif
454 
455 #if IS_ENABLED(CONFIG_I2C_GPIO)
456 	&i2c_gpio_device,
457 #endif
458 };
459 
blackstamp_init(void)460 static int __init blackstamp_init(void)
461 {
462 	int ret;
463 
464 	printk(KERN_INFO "%s(): registering device resources\n", __func__);
465 
466 	i2c_register_board_info(0, bfin_i2c_board_info,
467 				ARRAY_SIZE(bfin_i2c_board_info));
468 
469 	ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
470 	if (ret < 0)
471 		return ret;
472 
473 #if IS_ENABLED(CONFIG_SMC91X)
474 	/*
475 	 * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
476 	 * the bfin-async-map driver takes care of flipping between
477 	 * flash and ethernet when necessary.
478 	 */
479 	ret = gpio_request(GPIO_PF0, "enet_cpld");
480 	if (!ret) {
481 		gpio_direction_output(GPIO_PF0, 1);
482 		gpio_free(GPIO_PF0);
483 	}
484 #endif
485 
486 	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
487 	return 0;
488 }
489 
490 arch_initcall(blackstamp_init);
491 
492 static struct platform_device *stamp_early_devices[] __initdata = {
493 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
494 #ifdef CONFIG_SERIAL_BFIN_UART0
495 	&bfin_uart0_device,
496 #endif
497 #endif
498 
499 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
500 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
501 	&bfin_sport0_uart_device,
502 #endif
503 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
504 	&bfin_sport1_uart_device,
505 #endif
506 #endif
507 };
508 
native_machine_early_platform_add_devices(void)509 void __init native_machine_early_platform_add_devices(void)
510 {
511 	printk(KERN_INFO "register early platform devices\n");
512 	early_platform_add_devices(stamp_early_devices,
513 		ARRAY_SIZE(stamp_early_devices));
514 }
515