1# SPDX-License-Identifier: GPL-2.0 2config BF542 3 def_bool y 4 depends on BF542_std || BF542M 5config BF544 6 def_bool y 7 depends on BF544_std || BF544M 8config BF547 9 def_bool y 10 depends on BF547_std || BF547M 11config BF548 12 def_bool y 13 depends on BF548_std || BF548M 14config BF549 15 def_bool y 16 depends on BF549_std || BF549M 17 18config BF54xM 19 def_bool y 20 depends on (BF542M || BF544M || BF547M || BF548M || BF549M) 21 22config BF54x 23 def_bool y 24 depends on (BF542 || BF544 || BF547 || BF548 || BF549) 25 26if (BF54x) 27 28source "arch/blackfin/mach-bf548/boards/Kconfig" 29 30menu "BF548 Specific Configuration" 31 32config DEB_DMA_URGENT 33 bool "DMA has priority over core for ext. accesses" 34 depends on BF54x 35 default y 36 help 37 Treat any DEB1, DEB2 and DEB3 request as Urgent 38 39config BF548_ATAPI_ALTERNATIVE_PORT 40 bool "BF548 ATAPI alternative port via GPIO" 41 help 42 BF548 ATAPI data and address PINs can be routed through 43 async address or GPIO port F and G. Select y to route it 44 to GPIO. 45 46choice 47 prompt "UART2 DMA channel selection" 48 depends on SERIAL_BFIN_UART2 49 default UART2_DMA_RX_ON_DMA18 50 help 51 UART2 DMA channel selection 52 RX -> DMA18 53 TX -> DMA19 54 or 55 RX -> DMA13 56 TX -> DMA14 57 58config UART2_DMA_RX_ON_DMA18 59 bool "UART2 DMA RX -> DMA18 TX -> DMA19" 60 help 61 UART2 DMA channel assignment 62 RX -> DMA18 63 TX -> DMA19 64 use SPORT2 default DMA channel 65 66config UART2_DMA_RX_ON_DMA13 67 bool "UART2 DMA RX -> DMA13 TX -> DMA14" 68 help 69 UART2 DMA channel assignment 70 RX -> DMA13 71 TX -> DMA14 72 use EPPI1 EPPI2 default DMA channel 73endchoice 74 75choice 76 prompt "UART3 DMA channel selection" 77 depends on SERIAL_BFIN_UART3 78 default UART3_DMA_RX_ON_DMA20 79 help 80 UART3 DMA channel selection 81 RX -> DMA20 82 TX -> DMA21 83 or 84 RX -> DMA15 85 TX -> DMA16 86 87config UART3_DMA_RX_ON_DMA20 88 bool "UART3 DMA RX -> DMA20 TX -> DMA21" 89 help 90 UART3 DMA channel assignment 91 RX -> DMA20 92 TX -> DMA21 93 use SPORT3 default DMA channel 94 95config UART3_DMA_RX_ON_DMA15 96 bool "UART3 DMA RX -> DMA15 TX -> DMA16" 97 help 98 UART3 DMA channel assignment 99 RX -> DMA15 100 TX -> DMA16 101 use PIXC default DMA channel 102 103endchoice 104 105comment "Interrupt Priority Assignment" 106menu "Priority" 107 108config IRQ_PLL_WAKEUP 109 int "IRQ_PLL_WAKEUP" 110 default 7 111config IRQ_DMAC0_ERR 112 int "IRQ_DMAC0_ERR" 113 default 7 114config IRQ_EPPI0_ERR 115 int "IRQ_EPPI0_ERR" 116 default 7 117config IRQ_SPORT0_ERR 118 int "IRQ_SPORT0_ERR" 119 default 7 120config IRQ_SPORT1_ERR 121 int "IRQ_SPORT1_ERR" 122 default 7 123config IRQ_SPI0_ERR 124 int "IRQ_SPI0_ERR" 125 default 7 126config IRQ_UART0_ERR 127 int "IRQ_UART0_ERR" 128 default 7 129config IRQ_RTC 130 int "IRQ_RTC" 131 default 8 132config IRQ_EPPI0 133 int "IRQ_EPPI0" 134 default 8 135config IRQ_SPORT0_RX 136 int "IRQ_SPORT0_RX" 137 default 9 138config IRQ_SPORT0_TX 139 int "IRQ_SPORT0_TX" 140 default 9 141config IRQ_SPORT1_RX 142 int "IRQ_SPORT1_RX" 143 default 9 144config IRQ_SPORT1_TX 145 int "IRQ_SPORT1_TX" 146 default 9 147config IRQ_SPI0 148 int "IRQ_SPI0" 149 default 10 150config IRQ_UART0_RX 151 int "IRQ_UART0_RX" 152 default 10 153config IRQ_UART0_TX 154 int "IRQ_UART0_TX" 155 default 10 156config IRQ_TIMER8 157 int "IRQ_TIMER8" 158 default 11 159config IRQ_TIMER9 160 int "IRQ_TIMER9" 161 default 11 162config IRQ_TIMER10 163 int "IRQ_TIMER10" 164 default 11 165config IRQ_PINT0 166 int "IRQ_PINT0" 167 default 12 168config IRQ_PINT1 169 int "IRQ_PINT0" 170 default 12 171config IRQ_MDMAS0 172 int "IRQ_MDMAS0" 173 default 13 174config IRQ_MDMAS1 175 int "IRQ_DMDMAS1" 176 default 13 177config IRQ_WATCHDOG 178 int "IRQ_WATCHDOG" 179 default 13 180config IRQ_DMAC1_ERR 181 int "IRQ_DMAC1_ERR" 182 default 7 183config IRQ_SPORT2_ERR 184 int "IRQ_SPORT2_ERR" 185 default 7 186config IRQ_SPORT3_ERR 187 int "IRQ_SPORT3_ERR" 188 default 7 189config IRQ_MXVR_DATA 190 int "IRQ MXVR Data" 191 default 7 192config IRQ_SPI1_ERR 193 int "IRQ_SPI1_ERR" 194 default 7 195config IRQ_SPI2_ERR 196 int "IRQ_SPI2_ERR" 197 default 7 198config IRQ_UART1_ERR 199 int "IRQ_UART1_ERR" 200 default 7 201config IRQ_UART2_ERR 202 int "IRQ_UART2_ERR" 203 default 7 204config IRQ_CAN0_ERR 205 int "IRQ_CAN0_ERR" 206 default 7 207config IRQ_SPORT2_RX 208 int "IRQ_SPORT2_RX" 209 default 9 210config IRQ_SPORT2_TX 211 int "IRQ_SPORT2_TX" 212 default 9 213config IRQ_SPORT3_RX 214 int "IRQ_SPORT3_RX" 215 default 9 216config IRQ_SPORT3_TX 217 int "IRQ_SPORT3_TX" 218 default 9 219config IRQ_EPPI1 220 int "IRQ_EPPI1" 221 default 9 222config IRQ_EPPI2 223 int "IRQ_EPPI2" 224 default 9 225config IRQ_SPI1 226 int "IRQ_SPI1" 227 default 10 228config IRQ_SPI2 229 int "IRQ_SPI2" 230 default 10 231config IRQ_UART1_RX 232 int "IRQ_UART1_RX" 233 default 10 234config IRQ_UART1_TX 235 int "IRQ_UART1_TX" 236 default 10 237config IRQ_ATAPI_RX 238 int "IRQ_ATAPI_RX" 239 default 10 240config IRQ_ATAPI_TX 241 int "IRQ_ATAPI_TX" 242 default 10 243config IRQ_TWI0 244 int "IRQ_TWI0" 245 default 11 246config IRQ_TWI1 247 int "IRQ_TWI1" 248 default 11 249config IRQ_CAN0_RX 250 int "IRQ_CAN_RX" 251 default 11 252config IRQ_CAN0_TX 253 int "IRQ_CAN_TX" 254 default 11 255config IRQ_MDMAS2 256 int "IRQ_MDMAS2" 257 default 13 258config IRQ_MDMAS3 259 int "IRQ_DMMAS3" 260 default 13 261config IRQ_MXVR_ERR 262 int "IRQ_MXVR_ERR" 263 default 11 264config IRQ_MXVR_MSG 265 int "IRQ_MXVR_MSG" 266 default 11 267config IRQ_MXVR_PKT 268 int "IRQ_MXVR_PKT" 269 default 11 270config IRQ_EPPI1_ERR 271 int "IRQ_EPPI1_ERR" 272 default 7 273config IRQ_EPPI2_ERR 274 int "IRQ_EPPI2_ERR" 275 default 7 276config IRQ_UART3_ERR 277 int "IRQ_UART3_ERR" 278 default 7 279config IRQ_HOST_ERR 280 int "IRQ_HOST_ERR" 281 default 7 282config IRQ_PIXC_ERR 283 int "IRQ_PIXC_ERR" 284 default 7 285config IRQ_NFC_ERR 286 int "IRQ_NFC_ERR" 287 default 7 288config IRQ_ATAPI_ERR 289 int "IRQ_ATAPI_ERR" 290 default 7 291config IRQ_CAN1_ERR 292 int "IRQ_CAN1_ERR" 293 default 7 294config IRQ_HS_DMA_ERR 295 int "IRQ Handshake DMA Status" 296 default 7 297config IRQ_PIXC_IN0 298 int "IRQ PIXC IN0" 299 default 8 300config IRQ_PIXC_IN1 301 int "IRQ PIXC IN1" 302 default 8 303config IRQ_PIXC_OUT 304 int "IRQ PIXC OUT" 305 default 8 306config IRQ_SDH 307 int "IRQ SDH" 308 default 8 309config IRQ_CNT 310 int "IRQ CNT" 311 default 8 312config IRQ_KEY 313 int "IRQ KEY" 314 default 8 315config IRQ_CAN1_RX 316 int "IRQ CAN1 RX" 317 default 11 318config IRQ_CAN1_TX 319 int "IRQ_CAN1_TX" 320 default 11 321config IRQ_SDH_MASK0 322 int "IRQ_SDH_MASK0" 323 default 11 324config IRQ_SDH_MASK1 325 int "IRQ_SDH_MASK1" 326 default 11 327config IRQ_USB_INT0 328 int "IRQ USB INT0" 329 default 11 330config IRQ_USB_INT1 331 int "IRQ USB INT1" 332 default 11 333config IRQ_USB_INT2 334 int "IRQ USB INT2" 335 default 11 336config IRQ_USB_DMA 337 int "IRQ USB DMA" 338 default 11 339config IRQ_OTPSEC 340 int "IRQ OPTSEC" 341 default 11 342config IRQ_TIMER0 343 int "IRQ_TIMER0" 344 default 7 if TICKSOURCE_GPTMR0 345 default 8 346config IRQ_TIMER1 347 int "IRQ_TIMER1" 348 default 11 349config IRQ_TIMER2 350 int "IRQ_TIMER2" 351 default 11 352config IRQ_TIMER3 353 int "IRQ_TIMER3" 354 default 11 355config IRQ_TIMER4 356 int "IRQ_TIMER4" 357 default 11 358config IRQ_TIMER5 359 int "IRQ_TIMER5" 360 default 11 361config IRQ_TIMER6 362 int "IRQ_TIMER6" 363 default 11 364config IRQ_TIMER7 365 int "IRQ_TIMER7" 366 default 11 367config IRQ_PINT2 368 int "IRQ_PIN2" 369 default 11 370config IRQ_PINT3 371 int "IRQ_PIN3" 372 default 11 373 374 help 375 Enter the priority numbers between 7-13 ONLY. Others are Reserved. 376 This applies to all the above. It is not recommended to assign the 377 highest priority number 7 to UART or any other device. 378 379endmenu 380 381endmenu 382 383endif 384