1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_M32R_CACHE_H 3 #define _ASM_M32R_CACHE_H 4 5 /* L1 cache line size */ 6 #define L1_CACHE_SHIFT 4 7 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 8 9 #endif /* _ASM_M32R_CACHE_H */ 10
1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_M32R_CACHE_H 3 #define _ASM_M32R_CACHE_H 4 5 /* L1 cache line size */ 6 #define L1_CACHE_SHIFT 4 7 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 8 9 #endif /* _ASM_M32R_CACHE_H */ 10