1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * linux/arch/m32r/platforms/m32104ut/setup.c
4 *
5 * Setup routines for M32104UT Board
6 *
7 * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
8 * Hitoshi Yamamoto, Mamoru Sakugawa,
9 * Naoto Sugai, Hayato Fujiwara
10 */
11
12 #include <linux/irq.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/device.h>
16
17 #include <asm/m32r.h>
18 #include <asm/io.h>
19
20 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
21
22 icu_data_t icu_data[NR_IRQS];
23
disable_m32104ut_irq(unsigned int irq)24 static void disable_m32104ut_irq(unsigned int irq)
25 {
26 unsigned long port, data;
27
28 port = irq2port(irq);
29 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
30 outl(data, port);
31 }
32
enable_m32104ut_irq(unsigned int irq)33 static void enable_m32104ut_irq(unsigned int irq)
34 {
35 unsigned long port, data;
36
37 port = irq2port(irq);
38 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
39 outl(data, port);
40 }
41
mask_m32104ut_irq(struct irq_data * data)42 static void mask_m32104ut_irq(struct irq_data *data)
43 {
44 disable_m32104ut_irq(data->irq);
45 }
46
unmask_m32104ut_irq(struct irq_data * data)47 static void unmask_m32104ut_irq(struct irq_data *data)
48 {
49 enable_m32104ut_irq(data->irq);
50 }
51
shutdown_m32104ut_irq(struct irq_data * data)52 static void shutdown_m32104ut_irq(struct irq_data *data)
53 {
54 unsigned int irq = data->irq;
55 unsigned long port = irq2port(irq);
56
57 outl(M32R_ICUCR_ILEVEL7, port);
58 }
59
60 static struct irq_chip m32104ut_irq_type =
61 {
62 .name = "M32104UT-IRQ",
63 .irq_shutdown = shutdown_m32104ut_irq,
64 .irq_unmask = unmask_m32104ut_irq,
65 .irq_mask = mask_m32104ut_irq,
66 };
67
init_IRQ(void)68 void __init init_IRQ(void)
69 {
70 static int once = 0;
71
72 if (once)
73 return;
74 else
75 once++;
76
77 #if defined(CONFIG_SMC91X)
78 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
79 irq_set_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type,
80 handle_level_irq);
81 /* "H" level sense */
82 cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11;
83 disable_m32104ut_irq(M32R_IRQ_INT0);
84 #endif /* CONFIG_SMC91X */
85
86 /* MFT2 : system timer */
87 irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type,
88 handle_level_irq);
89 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
90 disable_m32104ut_irq(M32R_IRQ_MFT2);
91
92 #ifdef CONFIG_SERIAL_M32R_SIO
93 /* SIO0_R : uart receive data */
94 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type,
95 handle_level_irq);
96 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
97 disable_m32104ut_irq(M32R_IRQ_SIO0_R);
98
99 /* SIO0_S : uart send data */
100 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type,
101 handle_level_irq);
102 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
103 disable_m32104ut_irq(M32R_IRQ_SIO0_S);
104 #endif /* CONFIG_SERIAL_M32R_SIO */
105 }
106
107 #if defined(CONFIG_SMC91X)
108
109 #define LAN_IOSTART 0x300
110 #define LAN_IOEND 0x320
111 static struct resource smc91x_resources[] = {
112 [0] = {
113 .start = (LAN_IOSTART),
114 .end = (LAN_IOEND),
115 .flags = IORESOURCE_MEM,
116 },
117 [1] = {
118 .start = M32R_IRQ_INT0,
119 .end = M32R_IRQ_INT0,
120 .flags = IORESOURCE_IRQ,
121 }
122 };
123
124 static struct platform_device smc91x_device = {
125 .name = "smc91x",
126 .id = 0,
127 .num_resources = ARRAY_SIZE(smc91x_resources),
128 .resource = smc91x_resources,
129 };
130 #endif
131
platform_init(void)132 static int __init platform_init(void)
133 {
134 #if defined(CONFIG_SMC91X)
135 platform_device_register(&smc91x_device);
136 #endif
137 return 0;
138 }
139 arch_initcall(platform_init);
140