1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_METAG_IO_H
3 #define _ASM_METAG_IO_H
4
5 #include <linux/types.h>
6 #include <asm/pgtable-bits.h>
7
8 #define IO_SPACE_LIMIT 0
9
10 #define page_to_bus page_to_phys
11 #define bus_to_page phys_to_page
12
13 /*
14 * Generic I/O
15 */
16
17 #define __raw_readb __raw_readb
__raw_readb(const volatile void __iomem * addr)18 static inline u8 __raw_readb(const volatile void __iomem *addr)
19 {
20 u8 ret;
21 asm volatile("GETB %0,[%1]"
22 : "=da" (ret)
23 : "da" (addr)
24 : "memory");
25 return ret;
26 }
27
28 #define __raw_readw __raw_readw
__raw_readw(const volatile void __iomem * addr)29 static inline u16 __raw_readw(const volatile void __iomem *addr)
30 {
31 u16 ret;
32 asm volatile("GETW %0,[%1]"
33 : "=da" (ret)
34 : "da" (addr)
35 : "memory");
36 return ret;
37 }
38
39 #define __raw_readl __raw_readl
__raw_readl(const volatile void __iomem * addr)40 static inline u32 __raw_readl(const volatile void __iomem *addr)
41 {
42 u32 ret;
43 asm volatile("GETD %0,[%1]"
44 : "=da" (ret)
45 : "da" (addr)
46 : "memory");
47 return ret;
48 }
49
50 #define __raw_readq __raw_readq
__raw_readq(const volatile void __iomem * addr)51 static inline u64 __raw_readq(const volatile void __iomem *addr)
52 {
53 u64 ret;
54 asm volatile("GETL %0,%t0,[%1]"
55 : "=da" (ret)
56 : "da" (addr)
57 : "memory");
58 return ret;
59 }
60
61 #define __raw_writeb __raw_writeb
__raw_writeb(u8 b,volatile void __iomem * addr)62 static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
63 {
64 asm volatile("SETB [%0],%1"
65 :
66 : "da" (addr),
67 "da" (b)
68 : "memory");
69 }
70
71 #define __raw_writew __raw_writew
__raw_writew(u16 b,volatile void __iomem * addr)72 static inline void __raw_writew(u16 b, volatile void __iomem *addr)
73 {
74 asm volatile("SETW [%0],%1"
75 :
76 : "da" (addr),
77 "da" (b)
78 : "memory");
79 }
80
81 #define __raw_writel __raw_writel
__raw_writel(u32 b,volatile void __iomem * addr)82 static inline void __raw_writel(u32 b, volatile void __iomem *addr)
83 {
84 asm volatile("SETD [%0],%1"
85 :
86 : "da" (addr),
87 "da" (b)
88 : "memory");
89 }
90
91 #define __raw_writeq __raw_writeq
__raw_writeq(u64 b,volatile void __iomem * addr)92 static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
93 {
94 asm volatile("SETL [%0],%1,%t1"
95 :
96 : "da" (addr),
97 "da" (b)
98 : "memory");
99 }
100
101 /*
102 * The generic io.h can define all the other generic accessors
103 */
104
105 #include <asm-generic/io.h>
106
107 /*
108 * Despite being a 32bit architecture, Meta can do 64bit memory accesses
109 * (assuming the bus supports it).
110 */
111
112 #define readq __raw_readq
113 #define writeq __raw_writeq
114
115 /*
116 * Meta specific I/O for accessing non-MMU areas.
117 *
118 * These can be provided with a physical address rather than an __iomem pointer
119 * and should only be used by core architecture code for accessing fixed core
120 * registers. Generic drivers should use ioremap and the generic I/O accessors.
121 */
122
123 #define metag_in8(addr) __raw_readb((volatile void __iomem *)(addr))
124 #define metag_in16(addr) __raw_readw((volatile void __iomem *)(addr))
125 #define metag_in32(addr) __raw_readl((volatile void __iomem *)(addr))
126 #define metag_in64(addr) __raw_readq((volatile void __iomem *)(addr))
127
128 #define metag_out8(b, addr) __raw_writeb(b, (volatile void __iomem *)(addr))
129 #define metag_out16(b, addr) __raw_writew(b, (volatile void __iomem *)(addr))
130 #define metag_out32(b, addr) __raw_writel(b, (volatile void __iomem *)(addr))
131 #define metag_out64(b, addr) __raw_writeq(b, (volatile void __iomem *)(addr))
132
133 /*
134 * io remapping functions
135 */
136
137 extern void __iomem *__ioremap(unsigned long offset,
138 size_t size, unsigned long flags);
139 extern void __iounmap(void __iomem *addr);
140
141 /**
142 * ioremap - map bus memory into CPU space
143 * @offset: bus address of the memory
144 * @size: size of the resource to map
145 *
146 * ioremap performs a platform specific sequence of operations to
147 * make bus memory CPU accessible via the readb/readw/readl/writeb/
148 * writew/writel functions and the other mmio helpers. The returned
149 * address is not guaranteed to be usable directly as a virtual
150 * address.
151 */
152 #define ioremap(offset, size) \
153 __ioremap((offset), (size), 0)
154
155 #define ioremap_nocache(offset, size) \
156 __ioremap((offset), (size), 0)
157
158 #define ioremap_cached(offset, size) \
159 __ioremap((offset), (size), _PAGE_CACHEABLE)
160
161 #define ioremap_wc(offset, size) \
162 __ioremap((offset), (size), _PAGE_WR_COMBINE)
163
164 #define ioremap_wt(offset, size) \
165 __ioremap((offset), (size), 0)
166
167 #define iounmap(addr) \
168 __iounmap(addr)
169
170 #endif /* _ASM_METAG_IO_H */
171