1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18 #include <linux/jump_label.h>
19
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
23 #include <asm/mmu.h>
24 #include <asm/setup.h>
25
26 static struct cpu_spec the_cpu_spec __read_mostly;
27
28 struct cpu_spec* cur_cpu_spec __read_mostly = NULL;
29 EXPORT_SYMBOL(cur_cpu_spec);
30
31 /* The platform string corresponding to the real PVR */
32 const char *powerpc_base_platform;
33
34 /* NOTE:
35 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
36 * the responsibility of the appropriate CPU save/restore functions to
37 * eventually copy these settings over. Those save/restore aren't yet
38 * part of the cputable though. That has to be fixed for both ppc32
39 * and ppc64
40 */
41 #ifdef CONFIG_PPC32
42 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
52 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
53 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
55 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
56 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
61 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
62 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
63 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
64 #endif /* CONFIG_PPC32 */
65 #ifdef CONFIG_PPC64
66 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
67 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
68 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
69 extern void __restore_cpu_pa6t(void);
70 extern void __restore_cpu_ppc970(void);
71 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power7(void);
73 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
74 extern void __restore_cpu_power8(void);
75 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec);
76 extern void __restore_cpu_power9(void);
77 extern void __flush_tlb_power7(unsigned int action);
78 extern void __flush_tlb_power8(unsigned int action);
79 extern void __flush_tlb_power9(unsigned int action);
80 extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
81 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
82 extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
83 #endif /* CONFIG_PPC64 */
84 #if defined(CONFIG_E500)
85 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
86 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
87 extern void __restore_cpu_e5500(void);
88 extern void __restore_cpu_e6500(void);
89 #endif /* CONFIG_E500 */
90
91 /* This table only contains "desktop" CPUs, it need to be filled with embedded
92 * ones as well...
93 */
94 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
95 PPC_FEATURE_HAS_MMU)
96 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
97 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
98 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
99 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
100 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
101 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
102 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
103 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
104 PPC_FEATURE_TRUE_LE | \
105 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
106 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
108 PPC_FEATURE_TRUE_LE | \
109 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
110 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
111 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
112 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
113 PPC_FEATURE_TRUE_LE | \
114 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
115 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
116 PPC_FEATURE2_HTM_COMP | \
117 PPC_FEATURE2_HTM_NOSC_COMP | \
118 PPC_FEATURE2_DSCR | \
119 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
120 PPC_FEATURE2_VEC_CRYPTO)
121 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
122 PPC_FEATURE_TRUE_LE | \
123 PPC_FEATURE_HAS_ALTIVEC_COMP)
124 #define COMMON_USER_POWER9 COMMON_USER_POWER8
125 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
126 PPC_FEATURE2_ARCH_3_00 | \
127 PPC_FEATURE2_HAS_IEEE128 | \
128 PPC_FEATURE2_DARN )
129
130 #ifdef CONFIG_PPC_BOOK3E_64
131 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
132 #else
133 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
134 PPC_FEATURE_BOOKE)
135 #endif
136
137 static struct cpu_spec __initdata cpu_specs[] = {
138 #ifdef CONFIG_PPC_BOOK3S_64
139 { /* Power4 */
140 .pvr_mask = 0xffff0000,
141 .pvr_value = 0x00350000,
142 .cpu_name = "POWER4 (gp)",
143 .cpu_features = CPU_FTRS_POWER4,
144 .cpu_user_features = COMMON_USER_POWER4,
145 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
146 .icache_bsize = 128,
147 .dcache_bsize = 128,
148 .num_pmcs = 8,
149 .pmc_type = PPC_PMC_IBM,
150 .oprofile_cpu_type = "ppc64/power4",
151 .oprofile_type = PPC_OPROFILE_POWER4,
152 .platform = "power4",
153 },
154 { /* Power4+ */
155 .pvr_mask = 0xffff0000,
156 .pvr_value = 0x00380000,
157 .cpu_name = "POWER4+ (gq)",
158 .cpu_features = CPU_FTRS_POWER4,
159 .cpu_user_features = COMMON_USER_POWER4,
160 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
161 .icache_bsize = 128,
162 .dcache_bsize = 128,
163 .num_pmcs = 8,
164 .pmc_type = PPC_PMC_IBM,
165 .oprofile_cpu_type = "ppc64/power4",
166 .oprofile_type = PPC_OPROFILE_POWER4,
167 .platform = "power4",
168 },
169 { /* PPC970 */
170 .pvr_mask = 0xffff0000,
171 .pvr_value = 0x00390000,
172 .cpu_name = "PPC970",
173 .cpu_features = CPU_FTRS_PPC970,
174 .cpu_user_features = COMMON_USER_POWER4 |
175 PPC_FEATURE_HAS_ALTIVEC_COMP,
176 .mmu_features = MMU_FTRS_PPC970,
177 .icache_bsize = 128,
178 .dcache_bsize = 128,
179 .num_pmcs = 8,
180 .pmc_type = PPC_PMC_IBM,
181 .cpu_setup = __setup_cpu_ppc970,
182 .cpu_restore = __restore_cpu_ppc970,
183 .oprofile_cpu_type = "ppc64/970",
184 .oprofile_type = PPC_OPROFILE_POWER4,
185 .platform = "ppc970",
186 },
187 { /* PPC970FX */
188 .pvr_mask = 0xffff0000,
189 .pvr_value = 0x003c0000,
190 .cpu_name = "PPC970FX",
191 .cpu_features = CPU_FTRS_PPC970,
192 .cpu_user_features = COMMON_USER_POWER4 |
193 PPC_FEATURE_HAS_ALTIVEC_COMP,
194 .mmu_features = MMU_FTRS_PPC970,
195 .icache_bsize = 128,
196 .dcache_bsize = 128,
197 .num_pmcs = 8,
198 .pmc_type = PPC_PMC_IBM,
199 .cpu_setup = __setup_cpu_ppc970,
200 .cpu_restore = __restore_cpu_ppc970,
201 .oprofile_cpu_type = "ppc64/970",
202 .oprofile_type = PPC_OPROFILE_POWER4,
203 .platform = "ppc970",
204 },
205 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
206 .pvr_mask = 0xffffffff,
207 .pvr_value = 0x00440100,
208 .cpu_name = "PPC970MP",
209 .cpu_features = CPU_FTRS_PPC970,
210 .cpu_user_features = COMMON_USER_POWER4 |
211 PPC_FEATURE_HAS_ALTIVEC_COMP,
212 .mmu_features = MMU_FTRS_PPC970,
213 .icache_bsize = 128,
214 .dcache_bsize = 128,
215 .num_pmcs = 8,
216 .pmc_type = PPC_PMC_IBM,
217 .cpu_setup = __setup_cpu_ppc970,
218 .cpu_restore = __restore_cpu_ppc970,
219 .oprofile_cpu_type = "ppc64/970MP",
220 .oprofile_type = PPC_OPROFILE_POWER4,
221 .platform = "ppc970",
222 },
223 { /* PPC970MP */
224 .pvr_mask = 0xffff0000,
225 .pvr_value = 0x00440000,
226 .cpu_name = "PPC970MP",
227 .cpu_features = CPU_FTRS_PPC970,
228 .cpu_user_features = COMMON_USER_POWER4 |
229 PPC_FEATURE_HAS_ALTIVEC_COMP,
230 .mmu_features = MMU_FTRS_PPC970,
231 .icache_bsize = 128,
232 .dcache_bsize = 128,
233 .num_pmcs = 8,
234 .pmc_type = PPC_PMC_IBM,
235 .cpu_setup = __setup_cpu_ppc970MP,
236 .cpu_restore = __restore_cpu_ppc970,
237 .oprofile_cpu_type = "ppc64/970MP",
238 .oprofile_type = PPC_OPROFILE_POWER4,
239 .platform = "ppc970",
240 },
241 { /* PPC970GX */
242 .pvr_mask = 0xffff0000,
243 .pvr_value = 0x00450000,
244 .cpu_name = "PPC970GX",
245 .cpu_features = CPU_FTRS_PPC970,
246 .cpu_user_features = COMMON_USER_POWER4 |
247 PPC_FEATURE_HAS_ALTIVEC_COMP,
248 .mmu_features = MMU_FTRS_PPC970,
249 .icache_bsize = 128,
250 .dcache_bsize = 128,
251 .num_pmcs = 8,
252 .pmc_type = PPC_PMC_IBM,
253 .cpu_setup = __setup_cpu_ppc970,
254 .oprofile_cpu_type = "ppc64/970",
255 .oprofile_type = PPC_OPROFILE_POWER4,
256 .platform = "ppc970",
257 },
258 { /* Power5 GR */
259 .pvr_mask = 0xffff0000,
260 .pvr_value = 0x003a0000,
261 .cpu_name = "POWER5 (gr)",
262 .cpu_features = CPU_FTRS_POWER5,
263 .cpu_user_features = COMMON_USER_POWER5,
264 .mmu_features = MMU_FTRS_POWER5,
265 .icache_bsize = 128,
266 .dcache_bsize = 128,
267 .num_pmcs = 6,
268 .pmc_type = PPC_PMC_IBM,
269 .oprofile_cpu_type = "ppc64/power5",
270 .oprofile_type = PPC_OPROFILE_POWER4,
271 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
272 * and above but only works on POWER5 and above
273 */
274 .oprofile_mmcra_sihv = MMCRA_SIHV,
275 .oprofile_mmcra_sipr = MMCRA_SIPR,
276 .platform = "power5",
277 },
278 { /* Power5++ */
279 .pvr_mask = 0xffffff00,
280 .pvr_value = 0x003b0300,
281 .cpu_name = "POWER5+ (gs)",
282 .cpu_features = CPU_FTRS_POWER5,
283 .cpu_user_features = COMMON_USER_POWER5_PLUS,
284 .mmu_features = MMU_FTRS_POWER5,
285 .icache_bsize = 128,
286 .dcache_bsize = 128,
287 .num_pmcs = 6,
288 .oprofile_cpu_type = "ppc64/power5++",
289 .oprofile_type = PPC_OPROFILE_POWER4,
290 .oprofile_mmcra_sihv = MMCRA_SIHV,
291 .oprofile_mmcra_sipr = MMCRA_SIPR,
292 .platform = "power5+",
293 },
294 { /* Power5 GS */
295 .pvr_mask = 0xffff0000,
296 .pvr_value = 0x003b0000,
297 .cpu_name = "POWER5+ (gs)",
298 .cpu_features = CPU_FTRS_POWER5,
299 .cpu_user_features = COMMON_USER_POWER5_PLUS,
300 .mmu_features = MMU_FTRS_POWER5,
301 .icache_bsize = 128,
302 .dcache_bsize = 128,
303 .num_pmcs = 6,
304 .pmc_type = PPC_PMC_IBM,
305 .oprofile_cpu_type = "ppc64/power5+",
306 .oprofile_type = PPC_OPROFILE_POWER4,
307 .oprofile_mmcra_sihv = MMCRA_SIHV,
308 .oprofile_mmcra_sipr = MMCRA_SIPR,
309 .platform = "power5+",
310 },
311 { /* POWER6 in P5+ mode; 2.04-compliant processor */
312 .pvr_mask = 0xffffffff,
313 .pvr_value = 0x0f000001,
314 .cpu_name = "POWER5+",
315 .cpu_features = CPU_FTRS_POWER5,
316 .cpu_user_features = COMMON_USER_POWER5_PLUS,
317 .mmu_features = MMU_FTRS_POWER5,
318 .icache_bsize = 128,
319 .dcache_bsize = 128,
320 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
321 .oprofile_type = PPC_OPROFILE_POWER4,
322 .platform = "power5+",
323 },
324 { /* Power6 */
325 .pvr_mask = 0xffff0000,
326 .pvr_value = 0x003e0000,
327 .cpu_name = "POWER6 (raw)",
328 .cpu_features = CPU_FTRS_POWER6,
329 .cpu_user_features = COMMON_USER_POWER6 |
330 PPC_FEATURE_POWER6_EXT,
331 .mmu_features = MMU_FTRS_POWER6,
332 .icache_bsize = 128,
333 .dcache_bsize = 128,
334 .num_pmcs = 6,
335 .pmc_type = PPC_PMC_IBM,
336 .oprofile_cpu_type = "ppc64/power6",
337 .oprofile_type = PPC_OPROFILE_POWER4,
338 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
339 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
340 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
341 POWER6_MMCRA_OTHER,
342 .platform = "power6x",
343 },
344 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
345 .pvr_mask = 0xffffffff,
346 .pvr_value = 0x0f000002,
347 .cpu_name = "POWER6 (architected)",
348 .cpu_features = CPU_FTRS_POWER6,
349 .cpu_user_features = COMMON_USER_POWER6,
350 .mmu_features = MMU_FTRS_POWER6,
351 .icache_bsize = 128,
352 .dcache_bsize = 128,
353 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
354 .oprofile_type = PPC_OPROFILE_POWER4,
355 .platform = "power6",
356 },
357 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
358 .pvr_mask = 0xffffffff,
359 .pvr_value = 0x0f000003,
360 .cpu_name = "POWER7 (architected)",
361 .cpu_features = CPU_FTRS_POWER7,
362 .cpu_user_features = COMMON_USER_POWER7,
363 .cpu_user_features2 = COMMON_USER2_POWER7,
364 .mmu_features = MMU_FTRS_POWER7,
365 .icache_bsize = 128,
366 .dcache_bsize = 128,
367 .oprofile_type = PPC_OPROFILE_POWER4,
368 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
369 .cpu_setup = __setup_cpu_power7,
370 .cpu_restore = __restore_cpu_power7,
371 .flush_tlb = __flush_tlb_power7,
372 .machine_check_early = __machine_check_early_realmode_p7,
373 .platform = "power7",
374 },
375 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
376 .pvr_mask = 0xffffffff,
377 .pvr_value = 0x0f000004,
378 .cpu_name = "POWER8 (architected)",
379 .cpu_features = CPU_FTRS_POWER8,
380 .cpu_user_features = COMMON_USER_POWER8,
381 .cpu_user_features2 = COMMON_USER2_POWER8,
382 .mmu_features = MMU_FTRS_POWER8,
383 .icache_bsize = 128,
384 .dcache_bsize = 128,
385 .oprofile_type = PPC_OPROFILE_INVALID,
386 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
387 .cpu_setup = __setup_cpu_power8,
388 .cpu_restore = __restore_cpu_power8,
389 .flush_tlb = __flush_tlb_power8,
390 .machine_check_early = __machine_check_early_realmode_p8,
391 .platform = "power8",
392 },
393 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
394 .pvr_mask = 0xffffffff,
395 .pvr_value = 0x0f000005,
396 .cpu_name = "POWER9 (architected)",
397 .cpu_features = CPU_FTRS_POWER9,
398 .cpu_user_features = COMMON_USER_POWER9,
399 .cpu_user_features2 = COMMON_USER2_POWER9,
400 .mmu_features = MMU_FTRS_POWER9,
401 .icache_bsize = 128,
402 .dcache_bsize = 128,
403 .oprofile_type = PPC_OPROFILE_INVALID,
404 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
405 .cpu_setup = __setup_cpu_power9,
406 .cpu_restore = __restore_cpu_power9,
407 .flush_tlb = __flush_tlb_power9,
408 .platform = "power9",
409 },
410 { /* Power7 */
411 .pvr_mask = 0xffff0000,
412 .pvr_value = 0x003f0000,
413 .cpu_name = "POWER7 (raw)",
414 .cpu_features = CPU_FTRS_POWER7,
415 .cpu_user_features = COMMON_USER_POWER7,
416 .cpu_user_features2 = COMMON_USER2_POWER7,
417 .mmu_features = MMU_FTRS_POWER7,
418 .icache_bsize = 128,
419 .dcache_bsize = 128,
420 .num_pmcs = 6,
421 .pmc_type = PPC_PMC_IBM,
422 .oprofile_cpu_type = "ppc64/power7",
423 .oprofile_type = PPC_OPROFILE_POWER4,
424 .cpu_setup = __setup_cpu_power7,
425 .cpu_restore = __restore_cpu_power7,
426 .flush_tlb = __flush_tlb_power7,
427 .machine_check_early = __machine_check_early_realmode_p7,
428 .platform = "power7",
429 },
430 { /* Power7+ */
431 .pvr_mask = 0xffff0000,
432 .pvr_value = 0x004A0000,
433 .cpu_name = "POWER7+ (raw)",
434 .cpu_features = CPU_FTRS_POWER7,
435 .cpu_user_features = COMMON_USER_POWER7,
436 .cpu_user_features2 = COMMON_USER2_POWER7,
437 .mmu_features = MMU_FTRS_POWER7,
438 .icache_bsize = 128,
439 .dcache_bsize = 128,
440 .num_pmcs = 6,
441 .pmc_type = PPC_PMC_IBM,
442 .oprofile_cpu_type = "ppc64/power7",
443 .oprofile_type = PPC_OPROFILE_POWER4,
444 .cpu_setup = __setup_cpu_power7,
445 .cpu_restore = __restore_cpu_power7,
446 .flush_tlb = __flush_tlb_power7,
447 .machine_check_early = __machine_check_early_realmode_p7,
448 .platform = "power7+",
449 },
450 { /* Power8E */
451 .pvr_mask = 0xffff0000,
452 .pvr_value = 0x004b0000,
453 .cpu_name = "POWER8E (raw)",
454 .cpu_features = CPU_FTRS_POWER8E,
455 .cpu_user_features = COMMON_USER_POWER8,
456 .cpu_user_features2 = COMMON_USER2_POWER8,
457 .mmu_features = MMU_FTRS_POWER8,
458 .icache_bsize = 128,
459 .dcache_bsize = 128,
460 .num_pmcs = 6,
461 .pmc_type = PPC_PMC_IBM,
462 .oprofile_cpu_type = "ppc64/power8",
463 .oprofile_type = PPC_OPROFILE_INVALID,
464 .cpu_setup = __setup_cpu_power8,
465 .cpu_restore = __restore_cpu_power8,
466 .flush_tlb = __flush_tlb_power8,
467 .machine_check_early = __machine_check_early_realmode_p8,
468 .platform = "power8",
469 },
470 { /* Power8NVL */
471 .pvr_mask = 0xffff0000,
472 .pvr_value = 0x004c0000,
473 .cpu_name = "POWER8NVL (raw)",
474 .cpu_features = CPU_FTRS_POWER8,
475 .cpu_user_features = COMMON_USER_POWER8,
476 .cpu_user_features2 = COMMON_USER2_POWER8,
477 .mmu_features = MMU_FTRS_POWER8,
478 .icache_bsize = 128,
479 .dcache_bsize = 128,
480 .num_pmcs = 6,
481 .pmc_type = PPC_PMC_IBM,
482 .oprofile_cpu_type = "ppc64/power8",
483 .oprofile_type = PPC_OPROFILE_INVALID,
484 .cpu_setup = __setup_cpu_power8,
485 .cpu_restore = __restore_cpu_power8,
486 .flush_tlb = __flush_tlb_power8,
487 .machine_check_early = __machine_check_early_realmode_p8,
488 .platform = "power8",
489 },
490 { /* Power8 DD1: Does not support doorbell IPIs */
491 .pvr_mask = 0xffffff00,
492 .pvr_value = 0x004d0100,
493 .cpu_name = "POWER8 (raw)",
494 .cpu_features = CPU_FTRS_POWER8_DD1,
495 .cpu_user_features = COMMON_USER_POWER8,
496 .cpu_user_features2 = COMMON_USER2_POWER8,
497 .mmu_features = MMU_FTRS_POWER8,
498 .icache_bsize = 128,
499 .dcache_bsize = 128,
500 .num_pmcs = 6,
501 .pmc_type = PPC_PMC_IBM,
502 .oprofile_cpu_type = "ppc64/power8",
503 .oprofile_type = PPC_OPROFILE_INVALID,
504 .cpu_setup = __setup_cpu_power8,
505 .cpu_restore = __restore_cpu_power8,
506 .flush_tlb = __flush_tlb_power8,
507 .machine_check_early = __machine_check_early_realmode_p8,
508 .platform = "power8",
509 },
510 { /* Power8 */
511 .pvr_mask = 0xffff0000,
512 .pvr_value = 0x004d0000,
513 .cpu_name = "POWER8 (raw)",
514 .cpu_features = CPU_FTRS_POWER8,
515 .cpu_user_features = COMMON_USER_POWER8,
516 .cpu_user_features2 = COMMON_USER2_POWER8,
517 .mmu_features = MMU_FTRS_POWER8,
518 .icache_bsize = 128,
519 .dcache_bsize = 128,
520 .num_pmcs = 6,
521 .pmc_type = PPC_PMC_IBM,
522 .oprofile_cpu_type = "ppc64/power8",
523 .oprofile_type = PPC_OPROFILE_INVALID,
524 .cpu_setup = __setup_cpu_power8,
525 .cpu_restore = __restore_cpu_power8,
526 .flush_tlb = __flush_tlb_power8,
527 .machine_check_early = __machine_check_early_realmode_p8,
528 .platform = "power8",
529 },
530 { /* Power9 DD1*/
531 .pvr_mask = 0xffffff00,
532 .pvr_value = 0x004e0100,
533 .cpu_name = "POWER9 (raw)",
534 .cpu_features = CPU_FTRS_POWER9_DD1,
535 .cpu_user_features = COMMON_USER_POWER9,
536 .cpu_user_features2 = COMMON_USER2_POWER9,
537 .mmu_features = MMU_FTRS_POWER9,
538 .icache_bsize = 128,
539 .dcache_bsize = 128,
540 .num_pmcs = 6,
541 .pmc_type = PPC_PMC_IBM,
542 .oprofile_cpu_type = "ppc64/power9",
543 .oprofile_type = PPC_OPROFILE_INVALID,
544 .cpu_setup = __setup_cpu_power9,
545 .cpu_restore = __restore_cpu_power9,
546 .flush_tlb = __flush_tlb_power9,
547 .machine_check_early = __machine_check_early_realmode_p9,
548 .platform = "power9",
549 },
550 { /* Power9 */
551 .pvr_mask = 0xffff0000,
552 .pvr_value = 0x004e0000,
553 .cpu_name = "POWER9 (raw)",
554 .cpu_features = CPU_FTRS_POWER9,
555 .cpu_user_features = COMMON_USER_POWER9,
556 .cpu_user_features2 = COMMON_USER2_POWER9,
557 .mmu_features = MMU_FTRS_POWER9,
558 .icache_bsize = 128,
559 .dcache_bsize = 128,
560 .num_pmcs = 6,
561 .pmc_type = PPC_PMC_IBM,
562 .oprofile_cpu_type = "ppc64/power9",
563 .oprofile_type = PPC_OPROFILE_INVALID,
564 .cpu_setup = __setup_cpu_power9,
565 .cpu_restore = __restore_cpu_power9,
566 .flush_tlb = __flush_tlb_power9,
567 .machine_check_early = __machine_check_early_realmode_p9,
568 .platform = "power9",
569 },
570 { /* Cell Broadband Engine */
571 .pvr_mask = 0xffff0000,
572 .pvr_value = 0x00700000,
573 .cpu_name = "Cell Broadband Engine",
574 .cpu_features = CPU_FTRS_CELL,
575 .cpu_user_features = COMMON_USER_PPC64 |
576 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
577 PPC_FEATURE_SMT,
578 .mmu_features = MMU_FTRS_CELL,
579 .icache_bsize = 128,
580 .dcache_bsize = 128,
581 .num_pmcs = 4,
582 .pmc_type = PPC_PMC_IBM,
583 .oprofile_cpu_type = "ppc64/cell-be",
584 .oprofile_type = PPC_OPROFILE_CELL,
585 .platform = "ppc-cell-be",
586 },
587 { /* PA Semi PA6T */
588 .pvr_mask = 0x7fff0000,
589 .pvr_value = 0x00900000,
590 .cpu_name = "PA6T",
591 .cpu_features = CPU_FTRS_PA6T,
592 .cpu_user_features = COMMON_USER_PA6T,
593 .mmu_features = MMU_FTRS_PA6T,
594 .icache_bsize = 64,
595 .dcache_bsize = 64,
596 .num_pmcs = 6,
597 .pmc_type = PPC_PMC_PA6T,
598 .cpu_setup = __setup_cpu_pa6t,
599 .cpu_restore = __restore_cpu_pa6t,
600 .oprofile_cpu_type = "ppc64/pa6t",
601 .oprofile_type = PPC_OPROFILE_PA6T,
602 .platform = "pa6t",
603 },
604 { /* default match */
605 .pvr_mask = 0x00000000,
606 .pvr_value = 0x00000000,
607 .cpu_name = "POWER4 (compatible)",
608 .cpu_features = CPU_FTRS_COMPATIBLE,
609 .cpu_user_features = COMMON_USER_PPC64,
610 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
611 .icache_bsize = 128,
612 .dcache_bsize = 128,
613 .num_pmcs = 6,
614 .pmc_type = PPC_PMC_IBM,
615 .platform = "power4",
616 }
617 #endif /* CONFIG_PPC_BOOK3S_64 */
618
619 #ifdef CONFIG_PPC32
620 #ifdef CONFIG_PPC_BOOK3S_32
621 { /* 601 */
622 .pvr_mask = 0xffff0000,
623 .pvr_value = 0x00010000,
624 .cpu_name = "601",
625 .cpu_features = CPU_FTRS_PPC601,
626 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
627 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
628 .mmu_features = MMU_FTR_HPTE_TABLE,
629 .icache_bsize = 32,
630 .dcache_bsize = 32,
631 .machine_check = machine_check_generic,
632 .platform = "ppc601",
633 },
634 { /* 603 */
635 .pvr_mask = 0xffff0000,
636 .pvr_value = 0x00030000,
637 .cpu_name = "603",
638 .cpu_features = CPU_FTRS_603,
639 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
640 .mmu_features = 0,
641 .icache_bsize = 32,
642 .dcache_bsize = 32,
643 .cpu_setup = __setup_cpu_603,
644 .machine_check = machine_check_generic,
645 .platform = "ppc603",
646 },
647 { /* 603e */
648 .pvr_mask = 0xffff0000,
649 .pvr_value = 0x00060000,
650 .cpu_name = "603e",
651 .cpu_features = CPU_FTRS_603,
652 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
653 .mmu_features = 0,
654 .icache_bsize = 32,
655 .dcache_bsize = 32,
656 .cpu_setup = __setup_cpu_603,
657 .machine_check = machine_check_generic,
658 .platform = "ppc603",
659 },
660 { /* 603ev */
661 .pvr_mask = 0xffff0000,
662 .pvr_value = 0x00070000,
663 .cpu_name = "603ev",
664 .cpu_features = CPU_FTRS_603,
665 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
666 .mmu_features = 0,
667 .icache_bsize = 32,
668 .dcache_bsize = 32,
669 .cpu_setup = __setup_cpu_603,
670 .machine_check = machine_check_generic,
671 .platform = "ppc603",
672 },
673 { /* 604 */
674 .pvr_mask = 0xffff0000,
675 .pvr_value = 0x00040000,
676 .cpu_name = "604",
677 .cpu_features = CPU_FTRS_604,
678 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
679 .mmu_features = MMU_FTR_HPTE_TABLE,
680 .icache_bsize = 32,
681 .dcache_bsize = 32,
682 .num_pmcs = 2,
683 .cpu_setup = __setup_cpu_604,
684 .machine_check = machine_check_generic,
685 .platform = "ppc604",
686 },
687 { /* 604e */
688 .pvr_mask = 0xfffff000,
689 .pvr_value = 0x00090000,
690 .cpu_name = "604e",
691 .cpu_features = CPU_FTRS_604,
692 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
693 .mmu_features = MMU_FTR_HPTE_TABLE,
694 .icache_bsize = 32,
695 .dcache_bsize = 32,
696 .num_pmcs = 4,
697 .cpu_setup = __setup_cpu_604,
698 .machine_check = machine_check_generic,
699 .platform = "ppc604",
700 },
701 { /* 604r */
702 .pvr_mask = 0xffff0000,
703 .pvr_value = 0x00090000,
704 .cpu_name = "604r",
705 .cpu_features = CPU_FTRS_604,
706 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
707 .mmu_features = MMU_FTR_HPTE_TABLE,
708 .icache_bsize = 32,
709 .dcache_bsize = 32,
710 .num_pmcs = 4,
711 .cpu_setup = __setup_cpu_604,
712 .machine_check = machine_check_generic,
713 .platform = "ppc604",
714 },
715 { /* 604ev */
716 .pvr_mask = 0xffff0000,
717 .pvr_value = 0x000a0000,
718 .cpu_name = "604ev",
719 .cpu_features = CPU_FTRS_604,
720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
721 .mmu_features = MMU_FTR_HPTE_TABLE,
722 .icache_bsize = 32,
723 .dcache_bsize = 32,
724 .num_pmcs = 4,
725 .cpu_setup = __setup_cpu_604,
726 .machine_check = machine_check_generic,
727 .platform = "ppc604",
728 },
729 { /* 740/750 (0x4202, don't support TAU ?) */
730 .pvr_mask = 0xffffffff,
731 .pvr_value = 0x00084202,
732 .cpu_name = "740/750",
733 .cpu_features = CPU_FTRS_740_NOTAU,
734 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
735 .mmu_features = MMU_FTR_HPTE_TABLE,
736 .icache_bsize = 32,
737 .dcache_bsize = 32,
738 .num_pmcs = 4,
739 .cpu_setup = __setup_cpu_750,
740 .machine_check = machine_check_generic,
741 .platform = "ppc750",
742 },
743 { /* 750CX (80100 and 8010x?) */
744 .pvr_mask = 0xfffffff0,
745 .pvr_value = 0x00080100,
746 .cpu_name = "750CX",
747 .cpu_features = CPU_FTRS_750,
748 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
749 .mmu_features = MMU_FTR_HPTE_TABLE,
750 .icache_bsize = 32,
751 .dcache_bsize = 32,
752 .num_pmcs = 4,
753 .cpu_setup = __setup_cpu_750cx,
754 .machine_check = machine_check_generic,
755 .platform = "ppc750",
756 },
757 { /* 750CX (82201 and 82202) */
758 .pvr_mask = 0xfffffff0,
759 .pvr_value = 0x00082200,
760 .cpu_name = "750CX",
761 .cpu_features = CPU_FTRS_750,
762 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
763 .mmu_features = MMU_FTR_HPTE_TABLE,
764 .icache_bsize = 32,
765 .dcache_bsize = 32,
766 .num_pmcs = 4,
767 .pmc_type = PPC_PMC_IBM,
768 .cpu_setup = __setup_cpu_750cx,
769 .machine_check = machine_check_generic,
770 .platform = "ppc750",
771 },
772 { /* 750CXe (82214) */
773 .pvr_mask = 0xfffffff0,
774 .pvr_value = 0x00082210,
775 .cpu_name = "750CXe",
776 .cpu_features = CPU_FTRS_750,
777 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
778 .mmu_features = MMU_FTR_HPTE_TABLE,
779 .icache_bsize = 32,
780 .dcache_bsize = 32,
781 .num_pmcs = 4,
782 .pmc_type = PPC_PMC_IBM,
783 .cpu_setup = __setup_cpu_750cx,
784 .machine_check = machine_check_generic,
785 .platform = "ppc750",
786 },
787 { /* 750CXe "Gekko" (83214) */
788 .pvr_mask = 0xffffffff,
789 .pvr_value = 0x00083214,
790 .cpu_name = "750CXe",
791 .cpu_features = CPU_FTRS_750,
792 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
793 .mmu_features = MMU_FTR_HPTE_TABLE,
794 .icache_bsize = 32,
795 .dcache_bsize = 32,
796 .num_pmcs = 4,
797 .pmc_type = PPC_PMC_IBM,
798 .cpu_setup = __setup_cpu_750cx,
799 .machine_check = machine_check_generic,
800 .platform = "ppc750",
801 },
802 { /* 750CL (and "Broadway") */
803 .pvr_mask = 0xfffff0e0,
804 .pvr_value = 0x00087000,
805 .cpu_name = "750CL",
806 .cpu_features = CPU_FTRS_750CL,
807 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
808 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
809 .icache_bsize = 32,
810 .dcache_bsize = 32,
811 .num_pmcs = 4,
812 .pmc_type = PPC_PMC_IBM,
813 .cpu_setup = __setup_cpu_750,
814 .machine_check = machine_check_generic,
815 .platform = "ppc750",
816 .oprofile_cpu_type = "ppc/750",
817 .oprofile_type = PPC_OPROFILE_G4,
818 },
819 { /* 745/755 */
820 .pvr_mask = 0xfffff000,
821 .pvr_value = 0x00083000,
822 .cpu_name = "745/755",
823 .cpu_features = CPU_FTRS_750,
824 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
825 .mmu_features = MMU_FTR_HPTE_TABLE,
826 .icache_bsize = 32,
827 .dcache_bsize = 32,
828 .num_pmcs = 4,
829 .pmc_type = PPC_PMC_IBM,
830 .cpu_setup = __setup_cpu_750,
831 .machine_check = machine_check_generic,
832 .platform = "ppc750",
833 },
834 { /* 750FX rev 1.x */
835 .pvr_mask = 0xffffff00,
836 .pvr_value = 0x70000100,
837 .cpu_name = "750FX",
838 .cpu_features = CPU_FTRS_750FX1,
839 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
840 .mmu_features = MMU_FTR_HPTE_TABLE,
841 .icache_bsize = 32,
842 .dcache_bsize = 32,
843 .num_pmcs = 4,
844 .pmc_type = PPC_PMC_IBM,
845 .cpu_setup = __setup_cpu_750,
846 .machine_check = machine_check_generic,
847 .platform = "ppc750",
848 .oprofile_cpu_type = "ppc/750",
849 .oprofile_type = PPC_OPROFILE_G4,
850 },
851 { /* 750FX rev 2.0 must disable HID0[DPM] */
852 .pvr_mask = 0xffffffff,
853 .pvr_value = 0x70000200,
854 .cpu_name = "750FX",
855 .cpu_features = CPU_FTRS_750FX2,
856 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
857 .mmu_features = MMU_FTR_HPTE_TABLE,
858 .icache_bsize = 32,
859 .dcache_bsize = 32,
860 .num_pmcs = 4,
861 .pmc_type = PPC_PMC_IBM,
862 .cpu_setup = __setup_cpu_750,
863 .machine_check = machine_check_generic,
864 .platform = "ppc750",
865 .oprofile_cpu_type = "ppc/750",
866 .oprofile_type = PPC_OPROFILE_G4,
867 },
868 { /* 750FX (All revs except 2.0) */
869 .pvr_mask = 0xffff0000,
870 .pvr_value = 0x70000000,
871 .cpu_name = "750FX",
872 .cpu_features = CPU_FTRS_750FX,
873 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
874 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
875 .icache_bsize = 32,
876 .dcache_bsize = 32,
877 .num_pmcs = 4,
878 .pmc_type = PPC_PMC_IBM,
879 .cpu_setup = __setup_cpu_750fx,
880 .machine_check = machine_check_generic,
881 .platform = "ppc750",
882 .oprofile_cpu_type = "ppc/750",
883 .oprofile_type = PPC_OPROFILE_G4,
884 },
885 { /* 750GX */
886 .pvr_mask = 0xffff0000,
887 .pvr_value = 0x70020000,
888 .cpu_name = "750GX",
889 .cpu_features = CPU_FTRS_750GX,
890 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
891 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
892 .icache_bsize = 32,
893 .dcache_bsize = 32,
894 .num_pmcs = 4,
895 .pmc_type = PPC_PMC_IBM,
896 .cpu_setup = __setup_cpu_750fx,
897 .machine_check = machine_check_generic,
898 .platform = "ppc750",
899 .oprofile_cpu_type = "ppc/750",
900 .oprofile_type = PPC_OPROFILE_G4,
901 },
902 { /* 740/750 (L2CR bit need fixup for 740) */
903 .pvr_mask = 0xffff0000,
904 .pvr_value = 0x00080000,
905 .cpu_name = "740/750",
906 .cpu_features = CPU_FTRS_740,
907 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
908 .mmu_features = MMU_FTR_HPTE_TABLE,
909 .icache_bsize = 32,
910 .dcache_bsize = 32,
911 .num_pmcs = 4,
912 .pmc_type = PPC_PMC_IBM,
913 .cpu_setup = __setup_cpu_750,
914 .machine_check = machine_check_generic,
915 .platform = "ppc750",
916 },
917 { /* 7400 rev 1.1 ? (no TAU) */
918 .pvr_mask = 0xffffffff,
919 .pvr_value = 0x000c1101,
920 .cpu_name = "7400 (1.1)",
921 .cpu_features = CPU_FTRS_7400_NOTAU,
922 .cpu_user_features = COMMON_USER |
923 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
924 .mmu_features = MMU_FTR_HPTE_TABLE,
925 .icache_bsize = 32,
926 .dcache_bsize = 32,
927 .num_pmcs = 4,
928 .pmc_type = PPC_PMC_G4,
929 .cpu_setup = __setup_cpu_7400,
930 .machine_check = machine_check_generic,
931 .platform = "ppc7400",
932 },
933 { /* 7400 */
934 .pvr_mask = 0xffff0000,
935 .pvr_value = 0x000c0000,
936 .cpu_name = "7400",
937 .cpu_features = CPU_FTRS_7400,
938 .cpu_user_features = COMMON_USER |
939 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
940 .mmu_features = MMU_FTR_HPTE_TABLE,
941 .icache_bsize = 32,
942 .dcache_bsize = 32,
943 .num_pmcs = 4,
944 .pmc_type = PPC_PMC_G4,
945 .cpu_setup = __setup_cpu_7400,
946 .machine_check = machine_check_generic,
947 .platform = "ppc7400",
948 },
949 { /* 7410 */
950 .pvr_mask = 0xffff0000,
951 .pvr_value = 0x800c0000,
952 .cpu_name = "7410",
953 .cpu_features = CPU_FTRS_7400,
954 .cpu_user_features = COMMON_USER |
955 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
956 .mmu_features = MMU_FTR_HPTE_TABLE,
957 .icache_bsize = 32,
958 .dcache_bsize = 32,
959 .num_pmcs = 4,
960 .pmc_type = PPC_PMC_G4,
961 .cpu_setup = __setup_cpu_7410,
962 .machine_check = machine_check_generic,
963 .platform = "ppc7400",
964 },
965 { /* 7450 2.0 - no doze/nap */
966 .pvr_mask = 0xffffffff,
967 .pvr_value = 0x80000200,
968 .cpu_name = "7450",
969 .cpu_features = CPU_FTRS_7450_20,
970 .cpu_user_features = COMMON_USER |
971 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
972 .mmu_features = MMU_FTR_HPTE_TABLE,
973 .icache_bsize = 32,
974 .dcache_bsize = 32,
975 .num_pmcs = 6,
976 .pmc_type = PPC_PMC_G4,
977 .cpu_setup = __setup_cpu_745x,
978 .oprofile_cpu_type = "ppc/7450",
979 .oprofile_type = PPC_OPROFILE_G4,
980 .machine_check = machine_check_generic,
981 .platform = "ppc7450",
982 },
983 { /* 7450 2.1 */
984 .pvr_mask = 0xffffffff,
985 .pvr_value = 0x80000201,
986 .cpu_name = "7450",
987 .cpu_features = CPU_FTRS_7450_21,
988 .cpu_user_features = COMMON_USER |
989 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
990 .mmu_features = MMU_FTR_HPTE_TABLE,
991 .icache_bsize = 32,
992 .dcache_bsize = 32,
993 .num_pmcs = 6,
994 .pmc_type = PPC_PMC_G4,
995 .cpu_setup = __setup_cpu_745x,
996 .oprofile_cpu_type = "ppc/7450",
997 .oprofile_type = PPC_OPROFILE_G4,
998 .machine_check = machine_check_generic,
999 .platform = "ppc7450",
1000 },
1001 { /* 7450 2.3 and newer */
1002 .pvr_mask = 0xffff0000,
1003 .pvr_value = 0x80000000,
1004 .cpu_name = "7450",
1005 .cpu_features = CPU_FTRS_7450_23,
1006 .cpu_user_features = COMMON_USER |
1007 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1008 .mmu_features = MMU_FTR_HPTE_TABLE,
1009 .icache_bsize = 32,
1010 .dcache_bsize = 32,
1011 .num_pmcs = 6,
1012 .pmc_type = PPC_PMC_G4,
1013 .cpu_setup = __setup_cpu_745x,
1014 .oprofile_cpu_type = "ppc/7450",
1015 .oprofile_type = PPC_OPROFILE_G4,
1016 .machine_check = machine_check_generic,
1017 .platform = "ppc7450",
1018 },
1019 { /* 7455 rev 1.x */
1020 .pvr_mask = 0xffffff00,
1021 .pvr_value = 0x80010100,
1022 .cpu_name = "7455",
1023 .cpu_features = CPU_FTRS_7455_1,
1024 .cpu_user_features = COMMON_USER |
1025 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1026 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1027 .icache_bsize = 32,
1028 .dcache_bsize = 32,
1029 .num_pmcs = 6,
1030 .pmc_type = PPC_PMC_G4,
1031 .cpu_setup = __setup_cpu_745x,
1032 .oprofile_cpu_type = "ppc/7450",
1033 .oprofile_type = PPC_OPROFILE_G4,
1034 .machine_check = machine_check_generic,
1035 .platform = "ppc7450",
1036 },
1037 { /* 7455 rev 2.0 */
1038 .pvr_mask = 0xffffffff,
1039 .pvr_value = 0x80010200,
1040 .cpu_name = "7455",
1041 .cpu_features = CPU_FTRS_7455_20,
1042 .cpu_user_features = COMMON_USER |
1043 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1044 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1045 .icache_bsize = 32,
1046 .dcache_bsize = 32,
1047 .num_pmcs = 6,
1048 .pmc_type = PPC_PMC_G4,
1049 .cpu_setup = __setup_cpu_745x,
1050 .oprofile_cpu_type = "ppc/7450",
1051 .oprofile_type = PPC_OPROFILE_G4,
1052 .machine_check = machine_check_generic,
1053 .platform = "ppc7450",
1054 },
1055 { /* 7455 others */
1056 .pvr_mask = 0xffff0000,
1057 .pvr_value = 0x80010000,
1058 .cpu_name = "7455",
1059 .cpu_features = CPU_FTRS_7455,
1060 .cpu_user_features = COMMON_USER |
1061 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1062 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1063 .icache_bsize = 32,
1064 .dcache_bsize = 32,
1065 .num_pmcs = 6,
1066 .pmc_type = PPC_PMC_G4,
1067 .cpu_setup = __setup_cpu_745x,
1068 .oprofile_cpu_type = "ppc/7450",
1069 .oprofile_type = PPC_OPROFILE_G4,
1070 .machine_check = machine_check_generic,
1071 .platform = "ppc7450",
1072 },
1073 { /* 7447/7457 Rev 1.0 */
1074 .pvr_mask = 0xffffffff,
1075 .pvr_value = 0x80020100,
1076 .cpu_name = "7447/7457",
1077 .cpu_features = CPU_FTRS_7447_10,
1078 .cpu_user_features = COMMON_USER |
1079 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1080 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1081 .icache_bsize = 32,
1082 .dcache_bsize = 32,
1083 .num_pmcs = 6,
1084 .pmc_type = PPC_PMC_G4,
1085 .cpu_setup = __setup_cpu_745x,
1086 .oprofile_cpu_type = "ppc/7450",
1087 .oprofile_type = PPC_OPROFILE_G4,
1088 .machine_check = machine_check_generic,
1089 .platform = "ppc7450",
1090 },
1091 { /* 7447/7457 Rev 1.1 */
1092 .pvr_mask = 0xffffffff,
1093 .pvr_value = 0x80020101,
1094 .cpu_name = "7447/7457",
1095 .cpu_features = CPU_FTRS_7447_10,
1096 .cpu_user_features = COMMON_USER |
1097 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1098 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1099 .icache_bsize = 32,
1100 .dcache_bsize = 32,
1101 .num_pmcs = 6,
1102 .pmc_type = PPC_PMC_G4,
1103 .cpu_setup = __setup_cpu_745x,
1104 .oprofile_cpu_type = "ppc/7450",
1105 .oprofile_type = PPC_OPROFILE_G4,
1106 .machine_check = machine_check_generic,
1107 .platform = "ppc7450",
1108 },
1109 { /* 7447/7457 Rev 1.2 and later */
1110 .pvr_mask = 0xffff0000,
1111 .pvr_value = 0x80020000,
1112 .cpu_name = "7447/7457",
1113 .cpu_features = CPU_FTRS_7447,
1114 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1115 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1116 .icache_bsize = 32,
1117 .dcache_bsize = 32,
1118 .num_pmcs = 6,
1119 .pmc_type = PPC_PMC_G4,
1120 .cpu_setup = __setup_cpu_745x,
1121 .oprofile_cpu_type = "ppc/7450",
1122 .oprofile_type = PPC_OPROFILE_G4,
1123 .machine_check = machine_check_generic,
1124 .platform = "ppc7450",
1125 },
1126 { /* 7447A */
1127 .pvr_mask = 0xffff0000,
1128 .pvr_value = 0x80030000,
1129 .cpu_name = "7447A",
1130 .cpu_features = CPU_FTRS_7447A,
1131 .cpu_user_features = COMMON_USER |
1132 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1133 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1134 .icache_bsize = 32,
1135 .dcache_bsize = 32,
1136 .num_pmcs = 6,
1137 .pmc_type = PPC_PMC_G4,
1138 .cpu_setup = __setup_cpu_745x,
1139 .oprofile_cpu_type = "ppc/7450",
1140 .oprofile_type = PPC_OPROFILE_G4,
1141 .machine_check = machine_check_generic,
1142 .platform = "ppc7450",
1143 },
1144 { /* 7448 */
1145 .pvr_mask = 0xffff0000,
1146 .pvr_value = 0x80040000,
1147 .cpu_name = "7448",
1148 .cpu_features = CPU_FTRS_7448,
1149 .cpu_user_features = COMMON_USER |
1150 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1151 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1152 .icache_bsize = 32,
1153 .dcache_bsize = 32,
1154 .num_pmcs = 6,
1155 .pmc_type = PPC_PMC_G4,
1156 .cpu_setup = __setup_cpu_745x,
1157 .oprofile_cpu_type = "ppc/7450",
1158 .oprofile_type = PPC_OPROFILE_G4,
1159 .machine_check = machine_check_generic,
1160 .platform = "ppc7450",
1161 },
1162 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1163 .pvr_mask = 0x7fff0000,
1164 .pvr_value = 0x00810000,
1165 .cpu_name = "82xx",
1166 .cpu_features = CPU_FTRS_82XX,
1167 .cpu_user_features = COMMON_USER,
1168 .mmu_features = 0,
1169 .icache_bsize = 32,
1170 .dcache_bsize = 32,
1171 .cpu_setup = __setup_cpu_603,
1172 .machine_check = machine_check_generic,
1173 .platform = "ppc603",
1174 },
1175 { /* All G2_LE (603e core, plus some) have the same pvr */
1176 .pvr_mask = 0x7fff0000,
1177 .pvr_value = 0x00820000,
1178 .cpu_name = "G2_LE",
1179 .cpu_features = CPU_FTRS_G2_LE,
1180 .cpu_user_features = COMMON_USER,
1181 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1182 .icache_bsize = 32,
1183 .dcache_bsize = 32,
1184 .cpu_setup = __setup_cpu_603,
1185 .machine_check = machine_check_generic,
1186 .platform = "ppc603",
1187 },
1188 #ifdef CONFIG_PPC_83xx
1189 { /* e300c1 (a 603e core, plus some) on 83xx */
1190 .pvr_mask = 0x7fff0000,
1191 .pvr_value = 0x00830000,
1192 .cpu_name = "e300c1",
1193 .cpu_features = CPU_FTRS_E300,
1194 .cpu_user_features = COMMON_USER,
1195 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1196 .icache_bsize = 32,
1197 .dcache_bsize = 32,
1198 .cpu_setup = __setup_cpu_603,
1199 .machine_check = machine_check_83xx,
1200 .platform = "ppc603",
1201 },
1202 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1203 .pvr_mask = 0x7fff0000,
1204 .pvr_value = 0x00840000,
1205 .cpu_name = "e300c2",
1206 .cpu_features = CPU_FTRS_E300C2,
1207 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1208 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1209 MMU_FTR_NEED_DTLB_SW_LRU,
1210 .icache_bsize = 32,
1211 .dcache_bsize = 32,
1212 .cpu_setup = __setup_cpu_603,
1213 .machine_check = machine_check_83xx,
1214 .platform = "ppc603",
1215 },
1216 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1217 .pvr_mask = 0x7fff0000,
1218 .pvr_value = 0x00850000,
1219 .cpu_name = "e300c3",
1220 .cpu_features = CPU_FTRS_E300,
1221 .cpu_user_features = COMMON_USER,
1222 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1223 MMU_FTR_NEED_DTLB_SW_LRU,
1224 .icache_bsize = 32,
1225 .dcache_bsize = 32,
1226 .cpu_setup = __setup_cpu_603,
1227 .machine_check = machine_check_83xx,
1228 .num_pmcs = 4,
1229 .oprofile_cpu_type = "ppc/e300",
1230 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1231 .platform = "ppc603",
1232 },
1233 { /* e300c4 (e300c1, plus one IU) */
1234 .pvr_mask = 0x7fff0000,
1235 .pvr_value = 0x00860000,
1236 .cpu_name = "e300c4",
1237 .cpu_features = CPU_FTRS_E300,
1238 .cpu_user_features = COMMON_USER,
1239 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1240 MMU_FTR_NEED_DTLB_SW_LRU,
1241 .icache_bsize = 32,
1242 .dcache_bsize = 32,
1243 .cpu_setup = __setup_cpu_603,
1244 .machine_check = machine_check_83xx,
1245 .num_pmcs = 4,
1246 .oprofile_cpu_type = "ppc/e300",
1247 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1248 .platform = "ppc603",
1249 },
1250 #endif
1251 { /* default match, we assume split I/D cache & TB (non-601)... */
1252 .pvr_mask = 0x00000000,
1253 .pvr_value = 0x00000000,
1254 .cpu_name = "(generic PPC)",
1255 .cpu_features = CPU_FTRS_CLASSIC32,
1256 .cpu_user_features = COMMON_USER,
1257 .mmu_features = MMU_FTR_HPTE_TABLE,
1258 .icache_bsize = 32,
1259 .dcache_bsize = 32,
1260 .machine_check = machine_check_generic,
1261 .platform = "ppc603",
1262 },
1263 #endif /* CONFIG_PPC_BOOK3S_32 */
1264 #ifdef CONFIG_PPC_8xx
1265 { /* 8xx */
1266 .pvr_mask = 0xffff0000,
1267 .pvr_value = PVR_8xx,
1268 .cpu_name = "8xx",
1269 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1270 * if the 8xx code is there.... */
1271 .cpu_features = CPU_FTRS_8XX,
1272 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1273 .mmu_features = MMU_FTR_TYPE_8xx,
1274 .icache_bsize = 16,
1275 .dcache_bsize = 16,
1276 .machine_check = machine_check_8xx,
1277 .platform = "ppc823",
1278 },
1279 #endif /* CONFIG_PPC_8xx */
1280 #ifdef CONFIG_40x
1281 { /* 403GC */
1282 .pvr_mask = 0xffffff00,
1283 .pvr_value = 0x00200200,
1284 .cpu_name = "403GC",
1285 .cpu_features = CPU_FTRS_40X,
1286 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1287 .mmu_features = MMU_FTR_TYPE_40x,
1288 .icache_bsize = 16,
1289 .dcache_bsize = 16,
1290 .machine_check = machine_check_4xx,
1291 .platform = "ppc403",
1292 },
1293 { /* 403GCX */
1294 .pvr_mask = 0xffffff00,
1295 .pvr_value = 0x00201400,
1296 .cpu_name = "403GCX",
1297 .cpu_features = CPU_FTRS_40X,
1298 .cpu_user_features = PPC_FEATURE_32 |
1299 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1300 .mmu_features = MMU_FTR_TYPE_40x,
1301 .icache_bsize = 16,
1302 .dcache_bsize = 16,
1303 .machine_check = machine_check_4xx,
1304 .platform = "ppc403",
1305 },
1306 { /* 403G ?? */
1307 .pvr_mask = 0xffff0000,
1308 .pvr_value = 0x00200000,
1309 .cpu_name = "403G ??",
1310 .cpu_features = CPU_FTRS_40X,
1311 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1312 .mmu_features = MMU_FTR_TYPE_40x,
1313 .icache_bsize = 16,
1314 .dcache_bsize = 16,
1315 .machine_check = machine_check_4xx,
1316 .platform = "ppc403",
1317 },
1318 { /* 405GP */
1319 .pvr_mask = 0xffff0000,
1320 .pvr_value = 0x40110000,
1321 .cpu_name = "405GP",
1322 .cpu_features = CPU_FTRS_40X,
1323 .cpu_user_features = PPC_FEATURE_32 |
1324 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1325 .mmu_features = MMU_FTR_TYPE_40x,
1326 .icache_bsize = 32,
1327 .dcache_bsize = 32,
1328 .machine_check = machine_check_4xx,
1329 .platform = "ppc405",
1330 },
1331 { /* STB 03xxx */
1332 .pvr_mask = 0xffff0000,
1333 .pvr_value = 0x40130000,
1334 .cpu_name = "STB03xxx",
1335 .cpu_features = CPU_FTRS_40X,
1336 .cpu_user_features = PPC_FEATURE_32 |
1337 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1338 .mmu_features = MMU_FTR_TYPE_40x,
1339 .icache_bsize = 32,
1340 .dcache_bsize = 32,
1341 .machine_check = machine_check_4xx,
1342 .platform = "ppc405",
1343 },
1344 { /* STB 04xxx */
1345 .pvr_mask = 0xffff0000,
1346 .pvr_value = 0x41810000,
1347 .cpu_name = "STB04xxx",
1348 .cpu_features = CPU_FTRS_40X,
1349 .cpu_user_features = PPC_FEATURE_32 |
1350 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1351 .mmu_features = MMU_FTR_TYPE_40x,
1352 .icache_bsize = 32,
1353 .dcache_bsize = 32,
1354 .machine_check = machine_check_4xx,
1355 .platform = "ppc405",
1356 },
1357 { /* NP405L */
1358 .pvr_mask = 0xffff0000,
1359 .pvr_value = 0x41610000,
1360 .cpu_name = "NP405L",
1361 .cpu_features = CPU_FTRS_40X,
1362 .cpu_user_features = PPC_FEATURE_32 |
1363 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1364 .mmu_features = MMU_FTR_TYPE_40x,
1365 .icache_bsize = 32,
1366 .dcache_bsize = 32,
1367 .machine_check = machine_check_4xx,
1368 .platform = "ppc405",
1369 },
1370 { /* NP4GS3 */
1371 .pvr_mask = 0xffff0000,
1372 .pvr_value = 0x40B10000,
1373 .cpu_name = "NP4GS3",
1374 .cpu_features = CPU_FTRS_40X,
1375 .cpu_user_features = PPC_FEATURE_32 |
1376 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1377 .mmu_features = MMU_FTR_TYPE_40x,
1378 .icache_bsize = 32,
1379 .dcache_bsize = 32,
1380 .machine_check = machine_check_4xx,
1381 .platform = "ppc405",
1382 },
1383 { /* NP405H */
1384 .pvr_mask = 0xffff0000,
1385 .pvr_value = 0x41410000,
1386 .cpu_name = "NP405H",
1387 .cpu_features = CPU_FTRS_40X,
1388 .cpu_user_features = PPC_FEATURE_32 |
1389 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1390 .mmu_features = MMU_FTR_TYPE_40x,
1391 .icache_bsize = 32,
1392 .dcache_bsize = 32,
1393 .machine_check = machine_check_4xx,
1394 .platform = "ppc405",
1395 },
1396 { /* 405GPr */
1397 .pvr_mask = 0xffff0000,
1398 .pvr_value = 0x50910000,
1399 .cpu_name = "405GPr",
1400 .cpu_features = CPU_FTRS_40X,
1401 .cpu_user_features = PPC_FEATURE_32 |
1402 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1403 .mmu_features = MMU_FTR_TYPE_40x,
1404 .icache_bsize = 32,
1405 .dcache_bsize = 32,
1406 .machine_check = machine_check_4xx,
1407 .platform = "ppc405",
1408 },
1409 { /* STBx25xx */
1410 .pvr_mask = 0xffff0000,
1411 .pvr_value = 0x51510000,
1412 .cpu_name = "STBx25xx",
1413 .cpu_features = CPU_FTRS_40X,
1414 .cpu_user_features = PPC_FEATURE_32 |
1415 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1416 .mmu_features = MMU_FTR_TYPE_40x,
1417 .icache_bsize = 32,
1418 .dcache_bsize = 32,
1419 .machine_check = machine_check_4xx,
1420 .platform = "ppc405",
1421 },
1422 { /* 405LP */
1423 .pvr_mask = 0xffff0000,
1424 .pvr_value = 0x41F10000,
1425 .cpu_name = "405LP",
1426 .cpu_features = CPU_FTRS_40X,
1427 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1428 .mmu_features = MMU_FTR_TYPE_40x,
1429 .icache_bsize = 32,
1430 .dcache_bsize = 32,
1431 .machine_check = machine_check_4xx,
1432 .platform = "ppc405",
1433 },
1434 { /* Xilinx Virtex-II Pro */
1435 .pvr_mask = 0xfffff000,
1436 .pvr_value = 0x20010000,
1437 .cpu_name = "Virtex-II Pro",
1438 .cpu_features = CPU_FTRS_40X,
1439 .cpu_user_features = PPC_FEATURE_32 |
1440 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1441 .mmu_features = MMU_FTR_TYPE_40x,
1442 .icache_bsize = 32,
1443 .dcache_bsize = 32,
1444 .machine_check = machine_check_4xx,
1445 .platform = "ppc405",
1446 },
1447 { /* Xilinx Virtex-4 FX */
1448 .pvr_mask = 0xfffff000,
1449 .pvr_value = 0x20011000,
1450 .cpu_name = "Virtex-4 FX",
1451 .cpu_features = CPU_FTRS_40X,
1452 .cpu_user_features = PPC_FEATURE_32 |
1453 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1454 .mmu_features = MMU_FTR_TYPE_40x,
1455 .icache_bsize = 32,
1456 .dcache_bsize = 32,
1457 .machine_check = machine_check_4xx,
1458 .platform = "ppc405",
1459 },
1460 { /* 405EP */
1461 .pvr_mask = 0xffff0000,
1462 .pvr_value = 0x51210000,
1463 .cpu_name = "405EP",
1464 .cpu_features = CPU_FTRS_40X,
1465 .cpu_user_features = PPC_FEATURE_32 |
1466 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1467 .mmu_features = MMU_FTR_TYPE_40x,
1468 .icache_bsize = 32,
1469 .dcache_bsize = 32,
1470 .machine_check = machine_check_4xx,
1471 .platform = "ppc405",
1472 },
1473 { /* 405EX Rev. A/B with Security */
1474 .pvr_mask = 0xffff000f,
1475 .pvr_value = 0x12910007,
1476 .cpu_name = "405EX Rev. A/B",
1477 .cpu_features = CPU_FTRS_40X,
1478 .cpu_user_features = PPC_FEATURE_32 |
1479 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1480 .mmu_features = MMU_FTR_TYPE_40x,
1481 .icache_bsize = 32,
1482 .dcache_bsize = 32,
1483 .machine_check = machine_check_4xx,
1484 .platform = "ppc405",
1485 },
1486 { /* 405EX Rev. C without Security */
1487 .pvr_mask = 0xffff000f,
1488 .pvr_value = 0x1291000d,
1489 .cpu_name = "405EX Rev. C",
1490 .cpu_features = CPU_FTRS_40X,
1491 .cpu_user_features = PPC_FEATURE_32 |
1492 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1493 .mmu_features = MMU_FTR_TYPE_40x,
1494 .icache_bsize = 32,
1495 .dcache_bsize = 32,
1496 .machine_check = machine_check_4xx,
1497 .platform = "ppc405",
1498 },
1499 { /* 405EX Rev. C with Security */
1500 .pvr_mask = 0xffff000f,
1501 .pvr_value = 0x1291000f,
1502 .cpu_name = "405EX Rev. C",
1503 .cpu_features = CPU_FTRS_40X,
1504 .cpu_user_features = PPC_FEATURE_32 |
1505 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1506 .mmu_features = MMU_FTR_TYPE_40x,
1507 .icache_bsize = 32,
1508 .dcache_bsize = 32,
1509 .machine_check = machine_check_4xx,
1510 .platform = "ppc405",
1511 },
1512 { /* 405EX Rev. D without Security */
1513 .pvr_mask = 0xffff000f,
1514 .pvr_value = 0x12910003,
1515 .cpu_name = "405EX Rev. D",
1516 .cpu_features = CPU_FTRS_40X,
1517 .cpu_user_features = PPC_FEATURE_32 |
1518 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1519 .mmu_features = MMU_FTR_TYPE_40x,
1520 .icache_bsize = 32,
1521 .dcache_bsize = 32,
1522 .machine_check = machine_check_4xx,
1523 .platform = "ppc405",
1524 },
1525 { /* 405EX Rev. D with Security */
1526 .pvr_mask = 0xffff000f,
1527 .pvr_value = 0x12910005,
1528 .cpu_name = "405EX Rev. D",
1529 .cpu_features = CPU_FTRS_40X,
1530 .cpu_user_features = PPC_FEATURE_32 |
1531 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1532 .mmu_features = MMU_FTR_TYPE_40x,
1533 .icache_bsize = 32,
1534 .dcache_bsize = 32,
1535 .machine_check = machine_check_4xx,
1536 .platform = "ppc405",
1537 },
1538 { /* 405EXr Rev. A/B without Security */
1539 .pvr_mask = 0xffff000f,
1540 .pvr_value = 0x12910001,
1541 .cpu_name = "405EXr Rev. A/B",
1542 .cpu_features = CPU_FTRS_40X,
1543 .cpu_user_features = PPC_FEATURE_32 |
1544 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1545 .mmu_features = MMU_FTR_TYPE_40x,
1546 .icache_bsize = 32,
1547 .dcache_bsize = 32,
1548 .machine_check = machine_check_4xx,
1549 .platform = "ppc405",
1550 },
1551 { /* 405EXr Rev. C without Security */
1552 .pvr_mask = 0xffff000f,
1553 .pvr_value = 0x12910009,
1554 .cpu_name = "405EXr Rev. C",
1555 .cpu_features = CPU_FTRS_40X,
1556 .cpu_user_features = PPC_FEATURE_32 |
1557 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1558 .mmu_features = MMU_FTR_TYPE_40x,
1559 .icache_bsize = 32,
1560 .dcache_bsize = 32,
1561 .machine_check = machine_check_4xx,
1562 .platform = "ppc405",
1563 },
1564 { /* 405EXr Rev. C with Security */
1565 .pvr_mask = 0xffff000f,
1566 .pvr_value = 0x1291000b,
1567 .cpu_name = "405EXr Rev. C",
1568 .cpu_features = CPU_FTRS_40X,
1569 .cpu_user_features = PPC_FEATURE_32 |
1570 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1571 .mmu_features = MMU_FTR_TYPE_40x,
1572 .icache_bsize = 32,
1573 .dcache_bsize = 32,
1574 .machine_check = machine_check_4xx,
1575 .platform = "ppc405",
1576 },
1577 { /* 405EXr Rev. D without Security */
1578 .pvr_mask = 0xffff000f,
1579 .pvr_value = 0x12910000,
1580 .cpu_name = "405EXr Rev. D",
1581 .cpu_features = CPU_FTRS_40X,
1582 .cpu_user_features = PPC_FEATURE_32 |
1583 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1584 .mmu_features = MMU_FTR_TYPE_40x,
1585 .icache_bsize = 32,
1586 .dcache_bsize = 32,
1587 .machine_check = machine_check_4xx,
1588 .platform = "ppc405",
1589 },
1590 { /* 405EXr Rev. D with Security */
1591 .pvr_mask = 0xffff000f,
1592 .pvr_value = 0x12910002,
1593 .cpu_name = "405EXr Rev. D",
1594 .cpu_features = CPU_FTRS_40X,
1595 .cpu_user_features = PPC_FEATURE_32 |
1596 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1597 .mmu_features = MMU_FTR_TYPE_40x,
1598 .icache_bsize = 32,
1599 .dcache_bsize = 32,
1600 .machine_check = machine_check_4xx,
1601 .platform = "ppc405",
1602 },
1603 {
1604 /* 405EZ */
1605 .pvr_mask = 0xffff0000,
1606 .pvr_value = 0x41510000,
1607 .cpu_name = "405EZ",
1608 .cpu_features = CPU_FTRS_40X,
1609 .cpu_user_features = PPC_FEATURE_32 |
1610 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1611 .mmu_features = MMU_FTR_TYPE_40x,
1612 .icache_bsize = 32,
1613 .dcache_bsize = 32,
1614 .machine_check = machine_check_4xx,
1615 .platform = "ppc405",
1616 },
1617 { /* APM8018X */
1618 .pvr_mask = 0xffff0000,
1619 .pvr_value = 0x7ff11432,
1620 .cpu_name = "APM8018X",
1621 .cpu_features = CPU_FTRS_40X,
1622 .cpu_user_features = PPC_FEATURE_32 |
1623 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1624 .mmu_features = MMU_FTR_TYPE_40x,
1625 .icache_bsize = 32,
1626 .dcache_bsize = 32,
1627 .machine_check = machine_check_4xx,
1628 .platform = "ppc405",
1629 },
1630 { /* default match */
1631 .pvr_mask = 0x00000000,
1632 .pvr_value = 0x00000000,
1633 .cpu_name = "(generic 40x PPC)",
1634 .cpu_features = CPU_FTRS_40X,
1635 .cpu_user_features = PPC_FEATURE_32 |
1636 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1637 .mmu_features = MMU_FTR_TYPE_40x,
1638 .icache_bsize = 32,
1639 .dcache_bsize = 32,
1640 .machine_check = machine_check_4xx,
1641 .platform = "ppc405",
1642 }
1643
1644 #endif /* CONFIG_40x */
1645 #ifdef CONFIG_44x
1646 {
1647 .pvr_mask = 0xf0000fff,
1648 .pvr_value = 0x40000850,
1649 .cpu_name = "440GR Rev. A",
1650 .cpu_features = CPU_FTRS_44X,
1651 .cpu_user_features = COMMON_USER_BOOKE,
1652 .mmu_features = MMU_FTR_TYPE_44x,
1653 .icache_bsize = 32,
1654 .dcache_bsize = 32,
1655 .machine_check = machine_check_4xx,
1656 .platform = "ppc440",
1657 },
1658 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1659 .pvr_mask = 0xf0000fff,
1660 .pvr_value = 0x40000858,
1661 .cpu_name = "440EP Rev. A",
1662 .cpu_features = CPU_FTRS_44X,
1663 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1664 .mmu_features = MMU_FTR_TYPE_44x,
1665 .icache_bsize = 32,
1666 .dcache_bsize = 32,
1667 .cpu_setup = __setup_cpu_440ep,
1668 .machine_check = machine_check_4xx,
1669 .platform = "ppc440",
1670 },
1671 {
1672 .pvr_mask = 0xf0000fff,
1673 .pvr_value = 0x400008d3,
1674 .cpu_name = "440GR Rev. B",
1675 .cpu_features = CPU_FTRS_44X,
1676 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1677 .mmu_features = MMU_FTR_TYPE_44x,
1678 .icache_bsize = 32,
1679 .dcache_bsize = 32,
1680 .machine_check = machine_check_4xx,
1681 .platform = "ppc440",
1682 },
1683 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1684 .pvr_mask = 0xf0000ff7,
1685 .pvr_value = 0x400008d4,
1686 .cpu_name = "440EP Rev. C",
1687 .cpu_features = CPU_FTRS_44X,
1688 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1689 .mmu_features = MMU_FTR_TYPE_44x,
1690 .icache_bsize = 32,
1691 .dcache_bsize = 32,
1692 .cpu_setup = __setup_cpu_440ep,
1693 .machine_check = machine_check_4xx,
1694 .platform = "ppc440",
1695 },
1696 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1697 .pvr_mask = 0xf0000fff,
1698 .pvr_value = 0x400008db,
1699 .cpu_name = "440EP Rev. B",
1700 .cpu_features = CPU_FTRS_44X,
1701 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1702 .mmu_features = MMU_FTR_TYPE_44x,
1703 .icache_bsize = 32,
1704 .dcache_bsize = 32,
1705 .cpu_setup = __setup_cpu_440ep,
1706 .machine_check = machine_check_4xx,
1707 .platform = "ppc440",
1708 },
1709 { /* 440GRX */
1710 .pvr_mask = 0xf0000ffb,
1711 .pvr_value = 0x200008D0,
1712 .cpu_name = "440GRX",
1713 .cpu_features = CPU_FTRS_44X,
1714 .cpu_user_features = COMMON_USER_BOOKE,
1715 .mmu_features = MMU_FTR_TYPE_44x,
1716 .icache_bsize = 32,
1717 .dcache_bsize = 32,
1718 .cpu_setup = __setup_cpu_440grx,
1719 .machine_check = machine_check_440A,
1720 .platform = "ppc440",
1721 },
1722 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1723 .pvr_mask = 0xf0000ffb,
1724 .pvr_value = 0x200008D8,
1725 .cpu_name = "440EPX",
1726 .cpu_features = CPU_FTRS_44X,
1727 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1728 .mmu_features = MMU_FTR_TYPE_44x,
1729 .icache_bsize = 32,
1730 .dcache_bsize = 32,
1731 .cpu_setup = __setup_cpu_440epx,
1732 .machine_check = machine_check_440A,
1733 .platform = "ppc440",
1734 },
1735 { /* 440GP Rev. B */
1736 .pvr_mask = 0xf0000fff,
1737 .pvr_value = 0x40000440,
1738 .cpu_name = "440GP Rev. B",
1739 .cpu_features = CPU_FTRS_44X,
1740 .cpu_user_features = COMMON_USER_BOOKE,
1741 .mmu_features = MMU_FTR_TYPE_44x,
1742 .icache_bsize = 32,
1743 .dcache_bsize = 32,
1744 .machine_check = machine_check_4xx,
1745 .platform = "ppc440gp",
1746 },
1747 { /* 440GP Rev. C */
1748 .pvr_mask = 0xf0000fff,
1749 .pvr_value = 0x40000481,
1750 .cpu_name = "440GP Rev. C",
1751 .cpu_features = CPU_FTRS_44X,
1752 .cpu_user_features = COMMON_USER_BOOKE,
1753 .mmu_features = MMU_FTR_TYPE_44x,
1754 .icache_bsize = 32,
1755 .dcache_bsize = 32,
1756 .machine_check = machine_check_4xx,
1757 .platform = "ppc440gp",
1758 },
1759 { /* 440GX Rev. A */
1760 .pvr_mask = 0xf0000fff,
1761 .pvr_value = 0x50000850,
1762 .cpu_name = "440GX Rev. A",
1763 .cpu_features = CPU_FTRS_44X,
1764 .cpu_user_features = COMMON_USER_BOOKE,
1765 .mmu_features = MMU_FTR_TYPE_44x,
1766 .icache_bsize = 32,
1767 .dcache_bsize = 32,
1768 .cpu_setup = __setup_cpu_440gx,
1769 .machine_check = machine_check_440A,
1770 .platform = "ppc440",
1771 },
1772 { /* 440GX Rev. B */
1773 .pvr_mask = 0xf0000fff,
1774 .pvr_value = 0x50000851,
1775 .cpu_name = "440GX Rev. B",
1776 .cpu_features = CPU_FTRS_44X,
1777 .cpu_user_features = COMMON_USER_BOOKE,
1778 .mmu_features = MMU_FTR_TYPE_44x,
1779 .icache_bsize = 32,
1780 .dcache_bsize = 32,
1781 .cpu_setup = __setup_cpu_440gx,
1782 .machine_check = machine_check_440A,
1783 .platform = "ppc440",
1784 },
1785 { /* 440GX Rev. C */
1786 .pvr_mask = 0xf0000fff,
1787 .pvr_value = 0x50000892,
1788 .cpu_name = "440GX Rev. C",
1789 .cpu_features = CPU_FTRS_44X,
1790 .cpu_user_features = COMMON_USER_BOOKE,
1791 .mmu_features = MMU_FTR_TYPE_44x,
1792 .icache_bsize = 32,
1793 .dcache_bsize = 32,
1794 .cpu_setup = __setup_cpu_440gx,
1795 .machine_check = machine_check_440A,
1796 .platform = "ppc440",
1797 },
1798 { /* 440GX Rev. F */
1799 .pvr_mask = 0xf0000fff,
1800 .pvr_value = 0x50000894,
1801 .cpu_name = "440GX Rev. F",
1802 .cpu_features = CPU_FTRS_44X,
1803 .cpu_user_features = COMMON_USER_BOOKE,
1804 .mmu_features = MMU_FTR_TYPE_44x,
1805 .icache_bsize = 32,
1806 .dcache_bsize = 32,
1807 .cpu_setup = __setup_cpu_440gx,
1808 .machine_check = machine_check_440A,
1809 .platform = "ppc440",
1810 },
1811 { /* 440SP Rev. A */
1812 .pvr_mask = 0xfff00fff,
1813 .pvr_value = 0x53200891,
1814 .cpu_name = "440SP Rev. A",
1815 .cpu_features = CPU_FTRS_44X,
1816 .cpu_user_features = COMMON_USER_BOOKE,
1817 .mmu_features = MMU_FTR_TYPE_44x,
1818 .icache_bsize = 32,
1819 .dcache_bsize = 32,
1820 .machine_check = machine_check_4xx,
1821 .platform = "ppc440",
1822 },
1823 { /* 440SPe Rev. A */
1824 .pvr_mask = 0xfff00fff,
1825 .pvr_value = 0x53400890,
1826 .cpu_name = "440SPe Rev. A",
1827 .cpu_features = CPU_FTRS_44X,
1828 .cpu_user_features = COMMON_USER_BOOKE,
1829 .mmu_features = MMU_FTR_TYPE_44x,
1830 .icache_bsize = 32,
1831 .dcache_bsize = 32,
1832 .cpu_setup = __setup_cpu_440spe,
1833 .machine_check = machine_check_440A,
1834 .platform = "ppc440",
1835 },
1836 { /* 440SPe Rev. B */
1837 .pvr_mask = 0xfff00fff,
1838 .pvr_value = 0x53400891,
1839 .cpu_name = "440SPe Rev. B",
1840 .cpu_features = CPU_FTRS_44X,
1841 .cpu_user_features = COMMON_USER_BOOKE,
1842 .mmu_features = MMU_FTR_TYPE_44x,
1843 .icache_bsize = 32,
1844 .dcache_bsize = 32,
1845 .cpu_setup = __setup_cpu_440spe,
1846 .machine_check = machine_check_440A,
1847 .platform = "ppc440",
1848 },
1849 { /* 440 in Xilinx Virtex-5 FXT */
1850 .pvr_mask = 0xfffffff0,
1851 .pvr_value = 0x7ff21910,
1852 .cpu_name = "440 in Virtex-5 FXT",
1853 .cpu_features = CPU_FTRS_44X,
1854 .cpu_user_features = COMMON_USER_BOOKE,
1855 .mmu_features = MMU_FTR_TYPE_44x,
1856 .icache_bsize = 32,
1857 .dcache_bsize = 32,
1858 .cpu_setup = __setup_cpu_440x5,
1859 .machine_check = machine_check_440A,
1860 .platform = "ppc440",
1861 },
1862 { /* 460EX */
1863 .pvr_mask = 0xffff0006,
1864 .pvr_value = 0x13020002,
1865 .cpu_name = "460EX",
1866 .cpu_features = CPU_FTRS_440x6,
1867 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1868 .mmu_features = MMU_FTR_TYPE_44x,
1869 .icache_bsize = 32,
1870 .dcache_bsize = 32,
1871 .cpu_setup = __setup_cpu_460ex,
1872 .machine_check = machine_check_440A,
1873 .platform = "ppc440",
1874 },
1875 { /* 460EX Rev B */
1876 .pvr_mask = 0xffff0007,
1877 .pvr_value = 0x13020004,
1878 .cpu_name = "460EX Rev. B",
1879 .cpu_features = CPU_FTRS_440x6,
1880 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1881 .mmu_features = MMU_FTR_TYPE_44x,
1882 .icache_bsize = 32,
1883 .dcache_bsize = 32,
1884 .cpu_setup = __setup_cpu_460ex,
1885 .machine_check = machine_check_440A,
1886 .platform = "ppc440",
1887 },
1888 { /* 460GT */
1889 .pvr_mask = 0xffff0006,
1890 .pvr_value = 0x13020000,
1891 .cpu_name = "460GT",
1892 .cpu_features = CPU_FTRS_440x6,
1893 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1894 .mmu_features = MMU_FTR_TYPE_44x,
1895 .icache_bsize = 32,
1896 .dcache_bsize = 32,
1897 .cpu_setup = __setup_cpu_460gt,
1898 .machine_check = machine_check_440A,
1899 .platform = "ppc440",
1900 },
1901 { /* 460GT Rev B */
1902 .pvr_mask = 0xffff0007,
1903 .pvr_value = 0x13020005,
1904 .cpu_name = "460GT Rev. B",
1905 .cpu_features = CPU_FTRS_440x6,
1906 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1907 .mmu_features = MMU_FTR_TYPE_44x,
1908 .icache_bsize = 32,
1909 .dcache_bsize = 32,
1910 .cpu_setup = __setup_cpu_460gt,
1911 .machine_check = machine_check_440A,
1912 .platform = "ppc440",
1913 },
1914 { /* 460SX */
1915 .pvr_mask = 0xffffff00,
1916 .pvr_value = 0x13541800,
1917 .cpu_name = "460SX",
1918 .cpu_features = CPU_FTRS_44X,
1919 .cpu_user_features = COMMON_USER_BOOKE,
1920 .mmu_features = MMU_FTR_TYPE_44x,
1921 .icache_bsize = 32,
1922 .dcache_bsize = 32,
1923 .cpu_setup = __setup_cpu_460sx,
1924 .machine_check = machine_check_440A,
1925 .platform = "ppc440",
1926 },
1927 { /* 464 in APM821xx */
1928 .pvr_mask = 0xfffffff0,
1929 .pvr_value = 0x12C41C80,
1930 .cpu_name = "APM821XX",
1931 .cpu_features = CPU_FTRS_44X,
1932 .cpu_user_features = COMMON_USER_BOOKE |
1933 PPC_FEATURE_HAS_FPU,
1934 .mmu_features = MMU_FTR_TYPE_44x,
1935 .icache_bsize = 32,
1936 .dcache_bsize = 32,
1937 .cpu_setup = __setup_cpu_apm821xx,
1938 .machine_check = machine_check_440A,
1939 .platform = "ppc440",
1940 },
1941 #ifdef CONFIG_PPC_47x
1942 { /* 476 DD2 core */
1943 .pvr_mask = 0xffffffff,
1944 .pvr_value = 0x11a52080,
1945 .cpu_name = "476",
1946 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1947 .cpu_user_features = COMMON_USER_BOOKE |
1948 PPC_FEATURE_HAS_FPU,
1949 .mmu_features = MMU_FTR_TYPE_47x |
1950 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1951 .icache_bsize = 32,
1952 .dcache_bsize = 128,
1953 .machine_check = machine_check_47x,
1954 .platform = "ppc470",
1955 },
1956 { /* 476fpe */
1957 .pvr_mask = 0xffff0000,
1958 .pvr_value = 0x7ff50000,
1959 .cpu_name = "476fpe",
1960 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1961 .cpu_user_features = COMMON_USER_BOOKE |
1962 PPC_FEATURE_HAS_FPU,
1963 .mmu_features = MMU_FTR_TYPE_47x |
1964 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1965 .icache_bsize = 32,
1966 .dcache_bsize = 128,
1967 .machine_check = machine_check_47x,
1968 .platform = "ppc470",
1969 },
1970 { /* 476 iss */
1971 .pvr_mask = 0xffff0000,
1972 .pvr_value = 0x00050000,
1973 .cpu_name = "476",
1974 .cpu_features = CPU_FTRS_47X,
1975 .cpu_user_features = COMMON_USER_BOOKE |
1976 PPC_FEATURE_HAS_FPU,
1977 .mmu_features = MMU_FTR_TYPE_47x |
1978 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1979 .icache_bsize = 32,
1980 .dcache_bsize = 128,
1981 .machine_check = machine_check_47x,
1982 .platform = "ppc470",
1983 },
1984 { /* 476 others */
1985 .pvr_mask = 0xffff0000,
1986 .pvr_value = 0x11a50000,
1987 .cpu_name = "476",
1988 .cpu_features = CPU_FTRS_47X,
1989 .cpu_user_features = COMMON_USER_BOOKE |
1990 PPC_FEATURE_HAS_FPU,
1991 .mmu_features = MMU_FTR_TYPE_47x |
1992 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1993 .icache_bsize = 32,
1994 .dcache_bsize = 128,
1995 .machine_check = machine_check_47x,
1996 .platform = "ppc470",
1997 },
1998 #endif /* CONFIG_PPC_47x */
1999 { /* default match */
2000 .pvr_mask = 0x00000000,
2001 .pvr_value = 0x00000000,
2002 .cpu_name = "(generic 44x PPC)",
2003 .cpu_features = CPU_FTRS_44X,
2004 .cpu_user_features = COMMON_USER_BOOKE,
2005 .mmu_features = MMU_FTR_TYPE_44x,
2006 .icache_bsize = 32,
2007 .dcache_bsize = 32,
2008 .machine_check = machine_check_4xx,
2009 .platform = "ppc440",
2010 }
2011 #endif /* CONFIG_44x */
2012 #ifdef CONFIG_E200
2013 { /* e200z5 */
2014 .pvr_mask = 0xfff00000,
2015 .pvr_value = 0x81000000,
2016 .cpu_name = "e200z5",
2017 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2018 .cpu_features = CPU_FTRS_E200,
2019 .cpu_user_features = COMMON_USER_BOOKE |
2020 PPC_FEATURE_HAS_EFP_SINGLE |
2021 PPC_FEATURE_UNIFIED_CACHE,
2022 .mmu_features = MMU_FTR_TYPE_FSL_E,
2023 .dcache_bsize = 32,
2024 .machine_check = machine_check_e200,
2025 .platform = "ppc5554",
2026 },
2027 { /* e200z6 */
2028 .pvr_mask = 0xfff00000,
2029 .pvr_value = 0x81100000,
2030 .cpu_name = "e200z6",
2031 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2032 .cpu_features = CPU_FTRS_E200,
2033 .cpu_user_features = COMMON_USER_BOOKE |
2034 PPC_FEATURE_HAS_SPE_COMP |
2035 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2036 PPC_FEATURE_UNIFIED_CACHE,
2037 .mmu_features = MMU_FTR_TYPE_FSL_E,
2038 .dcache_bsize = 32,
2039 .machine_check = machine_check_e200,
2040 .platform = "ppc5554",
2041 },
2042 { /* default match */
2043 .pvr_mask = 0x00000000,
2044 .pvr_value = 0x00000000,
2045 .cpu_name = "(generic E200 PPC)",
2046 .cpu_features = CPU_FTRS_E200,
2047 .cpu_user_features = COMMON_USER_BOOKE |
2048 PPC_FEATURE_HAS_EFP_SINGLE |
2049 PPC_FEATURE_UNIFIED_CACHE,
2050 .mmu_features = MMU_FTR_TYPE_FSL_E,
2051 .dcache_bsize = 32,
2052 .cpu_setup = __setup_cpu_e200,
2053 .machine_check = machine_check_e200,
2054 .platform = "ppc5554",
2055 }
2056 #endif /* CONFIG_E200 */
2057 #endif /* CONFIG_PPC32 */
2058 #ifdef CONFIG_E500
2059 #ifdef CONFIG_PPC32
2060 #ifndef CONFIG_PPC_E500MC
2061 { /* e500 */
2062 .pvr_mask = 0xffff0000,
2063 .pvr_value = 0x80200000,
2064 .cpu_name = "e500",
2065 .cpu_features = CPU_FTRS_E500,
2066 .cpu_user_features = COMMON_USER_BOOKE |
2067 PPC_FEATURE_HAS_SPE_COMP |
2068 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2069 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2070 .mmu_features = MMU_FTR_TYPE_FSL_E,
2071 .icache_bsize = 32,
2072 .dcache_bsize = 32,
2073 .num_pmcs = 4,
2074 .oprofile_cpu_type = "ppc/e500",
2075 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2076 .cpu_setup = __setup_cpu_e500v1,
2077 .machine_check = machine_check_e500,
2078 .platform = "ppc8540",
2079 },
2080 { /* e500v2 */
2081 .pvr_mask = 0xffff0000,
2082 .pvr_value = 0x80210000,
2083 .cpu_name = "e500v2",
2084 .cpu_features = CPU_FTRS_E500_2,
2085 .cpu_user_features = COMMON_USER_BOOKE |
2086 PPC_FEATURE_HAS_SPE_COMP |
2087 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2088 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2089 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2090 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2091 .icache_bsize = 32,
2092 .dcache_bsize = 32,
2093 .num_pmcs = 4,
2094 .oprofile_cpu_type = "ppc/e500",
2095 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2096 .cpu_setup = __setup_cpu_e500v2,
2097 .machine_check = machine_check_e500,
2098 .platform = "ppc8548",
2099 .cpu_down_flush = cpu_down_flush_e500v2,
2100 },
2101 #else
2102 { /* e500mc */
2103 .pvr_mask = 0xffff0000,
2104 .pvr_value = 0x80230000,
2105 .cpu_name = "e500mc",
2106 .cpu_features = CPU_FTRS_E500MC,
2107 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2108 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2109 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2110 MMU_FTR_USE_TLBILX,
2111 .icache_bsize = 64,
2112 .dcache_bsize = 64,
2113 .num_pmcs = 4,
2114 .oprofile_cpu_type = "ppc/e500mc",
2115 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2116 .cpu_setup = __setup_cpu_e500mc,
2117 .machine_check = machine_check_e500mc,
2118 .platform = "ppce500mc",
2119 .cpu_down_flush = cpu_down_flush_e500mc,
2120 },
2121 #endif /* CONFIG_PPC_E500MC */
2122 #endif /* CONFIG_PPC32 */
2123 #ifdef CONFIG_PPC_E500MC
2124 { /* e5500 */
2125 .pvr_mask = 0xffff0000,
2126 .pvr_value = 0x80240000,
2127 .cpu_name = "e5500",
2128 .cpu_features = CPU_FTRS_E5500,
2129 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2130 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2131 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2132 MMU_FTR_USE_TLBILX,
2133 .icache_bsize = 64,
2134 .dcache_bsize = 64,
2135 .num_pmcs = 4,
2136 .oprofile_cpu_type = "ppc/e500mc",
2137 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2138 .cpu_setup = __setup_cpu_e5500,
2139 #ifndef CONFIG_PPC32
2140 .cpu_restore = __restore_cpu_e5500,
2141 #endif
2142 .machine_check = machine_check_e500mc,
2143 .platform = "ppce5500",
2144 .cpu_down_flush = cpu_down_flush_e5500,
2145 },
2146 { /* e6500 */
2147 .pvr_mask = 0xffff0000,
2148 .pvr_value = 0x80400000,
2149 .cpu_name = "e6500",
2150 .cpu_features = CPU_FTRS_E6500,
2151 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2152 PPC_FEATURE_HAS_ALTIVEC_COMP,
2153 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2154 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2155 MMU_FTR_USE_TLBILX,
2156 .icache_bsize = 64,
2157 .dcache_bsize = 64,
2158 .num_pmcs = 6,
2159 .oprofile_cpu_type = "ppc/e6500",
2160 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2161 .cpu_setup = __setup_cpu_e6500,
2162 #ifndef CONFIG_PPC32
2163 .cpu_restore = __restore_cpu_e6500,
2164 #endif
2165 .machine_check = machine_check_e500mc,
2166 .platform = "ppce6500",
2167 .cpu_down_flush = cpu_down_flush_e6500,
2168 },
2169 #endif /* CONFIG_PPC_E500MC */
2170 #ifdef CONFIG_PPC32
2171 { /* default match */
2172 .pvr_mask = 0x00000000,
2173 .pvr_value = 0x00000000,
2174 .cpu_name = "(generic E500 PPC)",
2175 .cpu_features = CPU_FTRS_E500,
2176 .cpu_user_features = COMMON_USER_BOOKE |
2177 PPC_FEATURE_HAS_SPE_COMP |
2178 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2179 .mmu_features = MMU_FTR_TYPE_FSL_E,
2180 .icache_bsize = 32,
2181 .dcache_bsize = 32,
2182 .machine_check = machine_check_e500,
2183 .platform = "powerpc",
2184 }
2185 #endif /* CONFIG_PPC32 */
2186 #endif /* CONFIG_E500 */
2187 };
2188
set_cur_cpu_spec(struct cpu_spec * s)2189 void __init set_cur_cpu_spec(struct cpu_spec *s)
2190 {
2191 struct cpu_spec *t = &the_cpu_spec;
2192
2193 t = PTRRELOC(t);
2194 *t = *s;
2195
2196 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2197 }
2198
setup_cpu_spec(unsigned long offset,struct cpu_spec * s)2199 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2200 struct cpu_spec *s)
2201 {
2202 struct cpu_spec *t = &the_cpu_spec;
2203 struct cpu_spec old;
2204
2205 t = PTRRELOC(t);
2206 old = *t;
2207
2208 /* Copy everything, then do fixups */
2209 *t = *s;
2210
2211 /*
2212 * If we are overriding a previous value derived from the real
2213 * PVR with a new value obtained using a logical PVR value,
2214 * don't modify the performance monitor fields.
2215 */
2216 if (old.num_pmcs && !s->num_pmcs) {
2217 t->num_pmcs = old.num_pmcs;
2218 t->pmc_type = old.pmc_type;
2219 t->oprofile_type = old.oprofile_type;
2220 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2221 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2222 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2223
2224 /*
2225 * If we have passed through this logic once before and
2226 * have pulled the default case because the real PVR was
2227 * not found inside cpu_specs[], then we are possibly
2228 * running in compatibility mode. In that case, let the
2229 * oprofiler know which set of compatibility counters to
2230 * pull from by making sure the oprofile_cpu_type string
2231 * is set to that of compatibility mode. If the
2232 * oprofile_cpu_type already has a value, then we are
2233 * possibly overriding a real PVR with a logical one,
2234 * and, in that case, keep the current value for
2235 * oprofile_cpu_type. Futhermore, let's ensure that the
2236 * fix for the PMAO bug is enabled on compatibility mode.
2237 */
2238 if (old.oprofile_cpu_type != NULL) {
2239 t->oprofile_cpu_type = old.oprofile_cpu_type;
2240 t->oprofile_type = old.oprofile_type;
2241 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG;
2242 }
2243 }
2244
2245 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2246
2247 /*
2248 * Set the base platform string once; assumes
2249 * we're called with real pvr first.
2250 */
2251 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2252 *PTRRELOC(&powerpc_base_platform) = t->platform;
2253
2254 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2255 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2256 * that processor. I will consolidate that at a later time, for now,
2257 * just use #ifdef. We also don't need to PTRRELOC the function
2258 * pointer on ppc64 and booke as we are running at 0 in real mode
2259 * on ppc64 and reloc_offset is always 0 on booke.
2260 */
2261 if (t->cpu_setup) {
2262 t->cpu_setup(offset, t);
2263 }
2264 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2265
2266 return t;
2267 }
2268
identify_cpu(unsigned long offset,unsigned int pvr)2269 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2270 {
2271 struct cpu_spec *s = cpu_specs;
2272 int i;
2273
2274 s = PTRRELOC(s);
2275
2276 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2277 if ((pvr & s->pvr_mask) == s->pvr_value)
2278 return setup_cpu_spec(offset, s);
2279 }
2280
2281 BUG();
2282
2283 return NULL;
2284 }
2285
2286 /*
2287 * Used by cpufeatures to get the name for CPUs with a PVR table.
2288 * If they don't hae a PVR table, cpufeatures gets the name from
2289 * cpu device-tree node.
2290 */
identify_cpu_name(unsigned int pvr)2291 void __init identify_cpu_name(unsigned int pvr)
2292 {
2293 struct cpu_spec *s = cpu_specs;
2294 struct cpu_spec *t = &the_cpu_spec;
2295 int i;
2296
2297 s = PTRRELOC(s);
2298 t = PTRRELOC(t);
2299
2300 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2301 if ((pvr & s->pvr_mask) == s->pvr_value) {
2302 t->cpu_name = s->cpu_name;
2303 return;
2304 }
2305 }
2306 }
2307
2308
2309 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
2310 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
2311 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2312 };
2313 EXPORT_SYMBOL_GPL(cpu_feature_keys);
2314
cpu_feature_keys_init(void)2315 void __init cpu_feature_keys_init(void)
2316 {
2317 int i;
2318
2319 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
2320 unsigned long f = 1ul << i;
2321
2322 if (!(cur_cpu_spec->cpu_features & f))
2323 static_branch_disable(&cpu_feature_keys[i]);
2324 }
2325 }
2326
2327 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
2328 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2329 };
2330 EXPORT_SYMBOL_GPL(mmu_feature_keys);
2331
mmu_feature_keys_init(void)2332 void __init mmu_feature_keys_init(void)
2333 {
2334 int i;
2335
2336 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
2337 unsigned long f = 1ul << i;
2338
2339 if (!(cur_cpu_spec->mmu_features & f))
2340 static_branch_disable(&mmu_feature_keys[i]);
2341 }
2342 }
2343 #endif
2344