1 /*
2 * Helper routines to scan the device tree for PCI devices and busses
3 *
4 * Migrated out of PowerPC architecture pci_64.c file by Grant Likely
5 * <grant.likely@secretlab.ca> so that these routines are available for
6 * 32 bit also.
7 *
8 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
9 * Rework, based on alpha PCI code.
10 * Copyright (c) 2009 Secret Lab Technologies Ltd.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
15 */
16
17 #include <linux/pci.h>
18 #include <linux/export.h>
19 #include <asm/pci-bridge.h>
20 #include <asm/prom.h>
21
22 /**
23 * get_int_prop - Decode a u32 from a device tree property
24 */
get_int_prop(struct device_node * np,const char * name,u32 def)25 static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
26 {
27 const __be32 *prop;
28 int len;
29
30 prop = of_get_property(np, name, &len);
31 if (prop && len >= 4)
32 return of_read_number(prop, 1);
33 return def;
34 }
35
36 /**
37 * pci_parse_of_flags - Parse the flags cell of a device tree PCI address
38 * @addr0: value of 1st cell of a device tree PCI address.
39 * @bridge: Set this flag if the address is from a bridge 'ranges' property
40 */
pci_parse_of_flags(u32 addr0,int bridge)41 static unsigned int pci_parse_of_flags(u32 addr0, int bridge)
42 {
43 unsigned int flags = 0;
44
45 if (addr0 & 0x02000000) {
46 flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
47 flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
48 if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
49 flags |= IORESOURCE_MEM_64;
50 flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
51 if (addr0 & 0x40000000)
52 flags |= IORESOURCE_PREFETCH
53 | PCI_BASE_ADDRESS_MEM_PREFETCH;
54 /* Note: We don't know whether the ROM has been left enabled
55 * by the firmware or not. We mark it as disabled (ie, we do
56 * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
57 * do a config space read, it will be force-enabled if needed
58 */
59 if (!bridge && (addr0 & 0xff) == 0x30)
60 flags |= IORESOURCE_READONLY;
61 } else if (addr0 & 0x01000000)
62 flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
63 if (flags)
64 flags |= IORESOURCE_SIZEALIGN;
65 return flags;
66 }
67
68 /**
69 * of_pci_parse_addrs - Parse PCI addresses assigned in the device tree node
70 * @node: device tree node for the PCI device
71 * @dev: pci_dev structure for the device
72 *
73 * This function parses the 'assigned-addresses' property of a PCI devices'
74 * device tree node and writes them into the associated pci_dev structure.
75 */
of_pci_parse_addrs(struct device_node * node,struct pci_dev * dev)76 static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
77 {
78 u64 base, size;
79 unsigned int flags;
80 struct pci_bus_region region;
81 struct resource *res;
82 const __be32 *addrs;
83 u32 i;
84 int proplen;
85
86 addrs = of_get_property(node, "assigned-addresses", &proplen);
87 if (!addrs)
88 return;
89 pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
90 for (; proplen >= 20; proplen -= 20, addrs += 5) {
91 flags = pci_parse_of_flags(of_read_number(addrs, 1), 0);
92 if (!flags)
93 continue;
94 base = of_read_number(&addrs[1], 2);
95 size = of_read_number(&addrs[3], 2);
96 if (!size)
97 continue;
98 i = of_read_number(addrs, 1) & 0xff;
99 pr_debug(" base: %llx, size: %llx, i: %x\n",
100 (unsigned long long)base,
101 (unsigned long long)size, i);
102
103 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
104 res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
105 } else if (i == dev->rom_base_reg) {
106 res = &dev->resource[PCI_ROM_RESOURCE];
107 flags |= IORESOURCE_READONLY;
108 } else {
109 printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
110 continue;
111 }
112 res->flags = flags;
113 res->name = pci_name(dev);
114 region.start = base;
115 region.end = base + size - 1;
116 pcibios_bus_to_resource(dev->bus, res, ®ion);
117 }
118 }
119
120 /**
121 * of_create_pci_dev - Given a device tree node on a pci bus, create a pci_dev
122 * @node: device tree node pointer
123 * @bus: bus the device is sitting on
124 * @devfn: PCI function number, extracted from device tree by caller.
125 */
of_create_pci_dev(struct device_node * node,struct pci_bus * bus,int devfn)126 struct pci_dev *of_create_pci_dev(struct device_node *node,
127 struct pci_bus *bus, int devfn)
128 {
129 struct pci_dev *dev;
130 const char *type;
131
132 dev = pci_alloc_dev(bus);
133 if (!dev)
134 return NULL;
135 type = of_get_property(node, "device_type", NULL);
136 if (type == NULL)
137 type = "";
138
139 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type);
140
141 dev->dev.of_node = of_node_get(node);
142 dev->dev.parent = bus->bridge;
143 dev->dev.bus = &pci_bus_type;
144 dev->devfn = devfn;
145 dev->multifunction = 0; /* maybe a lie? */
146 dev->needs_freset = 0; /* pcie fundamental reset required */
147 set_pcie_port_type(dev);
148
149 pci_dev_assign_slot(dev);
150 dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
151 dev->device = get_int_prop(node, "device-id", 0xffff);
152 dev->subsystem_vendor = get_int_prop(node, "subsystem-vendor-id", 0);
153 dev->subsystem_device = get_int_prop(node, "subsystem-id", 0);
154
155 dev->cfg_size = pci_cfg_space_size(dev);
156
157 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
158 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
159 dev->class = get_int_prop(node, "class-code", 0);
160 dev->revision = get_int_prop(node, "revision-id", 0);
161
162 pr_debug(" class: 0x%x\n", dev->class);
163 pr_debug(" revision: 0x%x\n", dev->revision);
164
165 dev->current_state = PCI_UNKNOWN; /* unknown power state */
166 dev->error_state = pci_channel_io_normal;
167 dev->dma_mask = 0xffffffff;
168
169 /* Early fixups, before probing the BARs */
170 pci_fixup_device(pci_fixup_early, dev);
171
172 if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
173 /* a PCI-PCI bridge */
174 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
175 dev->rom_base_reg = PCI_ROM_ADDRESS1;
176 set_pcie_hotplug_bridge(dev);
177 } else if (!strcmp(type, "cardbus")) {
178 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
179 } else {
180 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
181 dev->rom_base_reg = PCI_ROM_ADDRESS;
182 /* Maybe do a default OF mapping here */
183 dev->irq = 0;
184 }
185
186 of_pci_parse_addrs(node, dev);
187
188 pr_debug(" adding to system ...\n");
189
190 pci_device_add(dev, bus);
191
192 return dev;
193 }
194 EXPORT_SYMBOL(of_create_pci_dev);
195
196 /**
197 * of_scan_pci_bridge - Set up a PCI bridge and scan for child nodes
198 * @dev: pci_dev structure for the bridge
199 *
200 * of_scan_bus() calls this routine for each PCI bridge that it finds, and
201 * this routine in turn call of_scan_bus() recusively to scan for more child
202 * devices.
203 */
of_scan_pci_bridge(struct pci_dev * dev)204 void of_scan_pci_bridge(struct pci_dev *dev)
205 {
206 struct device_node *node = dev->dev.of_node;
207 struct pci_bus *bus;
208 struct pci_controller *phb;
209 const __be32 *busrange, *ranges;
210 int len, i, mode;
211 struct pci_bus_region region;
212 struct resource *res;
213 unsigned int flags;
214 u64 size;
215
216 pr_debug("of_scan_pci_bridge(%pOF)\n", node);
217
218 /* parse bus-range property */
219 busrange = of_get_property(node, "bus-range", &len);
220 if (busrange == NULL || len != 8) {
221 printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %pOF\n",
222 node);
223 return;
224 }
225 ranges = of_get_property(node, "ranges", &len);
226 if (ranges == NULL) {
227 printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %pOF\n",
228 node);
229 return;
230 }
231
232 bus = pci_find_bus(pci_domain_nr(dev->bus),
233 of_read_number(busrange, 1));
234 if (!bus) {
235 bus = pci_add_new_bus(dev->bus, dev,
236 of_read_number(busrange, 1));
237 if (!bus) {
238 printk(KERN_ERR "Failed to create pci bus for %pOF\n",
239 node);
240 return;
241 }
242 }
243
244 bus->primary = dev->bus->number;
245 pci_bus_insert_busn_res(bus, of_read_number(busrange, 1),
246 of_read_number(busrange+1, 1));
247 bus->bridge_ctl = 0;
248
249 /* parse ranges property */
250 /* PCI #address-cells == 3 and #size-cells == 2 always */
251 res = &dev->resource[PCI_BRIDGE_RESOURCES];
252 for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
253 res->flags = 0;
254 bus->resource[i] = res;
255 ++res;
256 }
257 i = 1;
258 for (; len >= 32; len -= 32, ranges += 8) {
259 flags = pci_parse_of_flags(of_read_number(ranges, 1), 1);
260 size = of_read_number(&ranges[6], 2);
261 if (flags == 0 || size == 0)
262 continue;
263 if (flags & IORESOURCE_IO) {
264 res = bus->resource[0];
265 if (res->flags) {
266 printk(KERN_ERR "PCI: ignoring extra I/O range"
267 " for bridge %pOF\n", node);
268 continue;
269 }
270 } else {
271 if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
272 printk(KERN_ERR "PCI: too many memory ranges"
273 " for bridge %pOF\n", node);
274 continue;
275 }
276 res = bus->resource[i];
277 ++i;
278 }
279 res->flags = flags;
280 region.start = of_read_number(&ranges[1], 2);
281 region.end = region.start + size - 1;
282 pcibios_bus_to_resource(dev->bus, res, ®ion);
283 }
284 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
285 bus->number);
286 pr_debug(" bus name: %s\n", bus->name);
287
288 phb = pci_bus_to_host(bus);
289
290 mode = PCI_PROBE_NORMAL;
291 if (phb->controller_ops.probe_mode)
292 mode = phb->controller_ops.probe_mode(bus);
293 pr_debug(" probe mode: %d\n", mode);
294
295 if (mode == PCI_PROBE_DEVTREE)
296 of_scan_bus(node, bus);
297 else if (mode == PCI_PROBE_NORMAL)
298 pci_scan_child_bus(bus);
299 }
300 EXPORT_SYMBOL(of_scan_pci_bridge);
301
of_scan_pci_dev(struct pci_bus * bus,struct device_node * dn)302 static struct pci_dev *of_scan_pci_dev(struct pci_bus *bus,
303 struct device_node *dn)
304 {
305 struct pci_dev *dev = NULL;
306 const __be32 *reg;
307 int reglen, devfn;
308 #ifdef CONFIG_EEH
309 struct eeh_dev *edev = pdn_to_eeh_dev(PCI_DN(dn));
310 #endif
311
312 pr_debug(" * %pOF\n", dn);
313 if (!of_device_is_available(dn))
314 return NULL;
315
316 reg = of_get_property(dn, "reg", ®len);
317 if (reg == NULL || reglen < 20)
318 return NULL;
319 devfn = (of_read_number(reg, 1) >> 8) & 0xff;
320
321 /* Check if the PCI device is already there */
322 dev = pci_get_slot(bus, devfn);
323 if (dev) {
324 pci_dev_put(dev);
325 return dev;
326 }
327
328 /* Device removed permanently ? */
329 #ifdef CONFIG_EEH
330 if (edev && (edev->mode & EEH_DEV_REMOVED))
331 return NULL;
332 #endif
333
334 /* create a new pci_dev for this device */
335 dev = of_create_pci_dev(dn, bus, devfn);
336 if (!dev)
337 return NULL;
338
339 pr_debug(" dev header type: %x\n", dev->hdr_type);
340 return dev;
341 }
342
343 /**
344 * __of_scan_bus - given a PCI bus node, setup bus and scan for child devices
345 * @node: device tree node for the PCI bus
346 * @bus: pci_bus structure for the PCI bus
347 * @rescan_existing: Flag indicating bus has already been set up
348 */
__of_scan_bus(struct device_node * node,struct pci_bus * bus,int rescan_existing)349 static void __of_scan_bus(struct device_node *node, struct pci_bus *bus,
350 int rescan_existing)
351 {
352 struct device_node *child;
353 struct pci_dev *dev;
354
355 pr_debug("of_scan_bus(%pOF) bus no %d...\n",
356 node, bus->number);
357
358 /* Scan direct children */
359 for_each_child_of_node(node, child) {
360 dev = of_scan_pci_dev(bus, child);
361 if (!dev)
362 continue;
363 pr_debug(" dev header type: %x\n", dev->hdr_type);
364 }
365
366 /* Apply all fixups necessary. We don't fixup the bus "self"
367 * for an existing bridge that is being rescanned
368 */
369 if (!rescan_existing)
370 pcibios_setup_bus_self(bus);
371 pcibios_setup_bus_devices(bus);
372
373 /* Now scan child busses */
374 list_for_each_entry(dev, &bus->devices, bus_list) {
375 if (pci_is_bridge(dev)) {
376 of_scan_pci_bridge(dev);
377 }
378 }
379 }
380
381 /**
382 * of_scan_bus - given a PCI bus node, setup bus and scan for child devices
383 * @node: device tree node for the PCI bus
384 * @bus: pci_bus structure for the PCI bus
385 */
of_scan_bus(struct device_node * node,struct pci_bus * bus)386 void of_scan_bus(struct device_node *node, struct pci_bus *bus)
387 {
388 __of_scan_bus(node, bus, 0);
389 }
390 EXPORT_SYMBOL_GPL(of_scan_bus);
391
392 /**
393 * of_rescan_bus - given a PCI bus node, scan for child devices
394 * @node: device tree node for the PCI bus
395 * @bus: pci_bus structure for the PCI bus
396 *
397 * Same as of_scan_bus, but for a pci_bus structure that has already been
398 * setup.
399 */
of_rescan_bus(struct device_node * node,struct pci_bus * bus)400 void of_rescan_bus(struct device_node *node, struct pci_bus *bus)
401 {
402 __of_scan_bus(node, bus, 1);
403 }
404 EXPORT_SYMBOL_GPL(of_rescan_bus);
405
406