1 /*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 *
8 * Description:
9 * This file is derived from arch/powerpc/kvm/44x.c,
10 * by Hollis Blanchard <hollisb@us.ibm.com>.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License, version 2, as
14 * published by the Free Software Foundation.
15 */
16
17 #include <linux/kvm_host.h>
18 #include <linux/err.h>
19 #include <linux/export.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
22 #include <linux/miscdevice.h>
23 #include <linux/gfp.h>
24 #include <linux/sched.h>
25 #include <linux/vmalloc.h>
26 #include <linux/highmem.h>
27
28 #include <asm/reg.h>
29 #include <asm/cputable.h>
30 #include <asm/cacheflush.h>
31 #include <asm/tlbflush.h>
32 #include <linux/uaccess.h>
33 #include <asm/io.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/kvm_book3s.h>
36 #include <asm/mmu_context.h>
37 #include <asm/page.h>
38 #include <asm/xive.h>
39
40 #include "book3s.h"
41 #include "trace.h"
42
43 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
44
45 /* #define EXIT_DEBUG */
46
47 struct kvm_stats_debugfs_item debugfs_entries[] = {
48 { "exits", VCPU_STAT(sum_exits) },
49 { "mmio", VCPU_STAT(mmio_exits) },
50 { "sig", VCPU_STAT(signal_exits) },
51 { "sysc", VCPU_STAT(syscall_exits) },
52 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
53 { "dec", VCPU_STAT(dec_exits) },
54 { "ext_intr", VCPU_STAT(ext_intr_exits) },
55 { "queue_intr", VCPU_STAT(queue_intr) },
56 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) },
57 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) },
58 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) },
59 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
60 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
61 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) },
62 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
63 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
64 { "pf_storage", VCPU_STAT(pf_storage) },
65 { "sp_storage", VCPU_STAT(sp_storage) },
66 { "pf_instruc", VCPU_STAT(pf_instruc) },
67 { "sp_instruc", VCPU_STAT(sp_instruc) },
68 { "ld", VCPU_STAT(ld) },
69 { "ld_slow", VCPU_STAT(ld_slow) },
70 { "st", VCPU_STAT(st) },
71 { "st_slow", VCPU_STAT(st_slow) },
72 { "pthru_all", VCPU_STAT(pthru_all) },
73 { "pthru_host", VCPU_STAT(pthru_host) },
74 { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) },
75 { NULL }
76 };
77
kvmppc_unfixup_split_real(struct kvm_vcpu * vcpu)78 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
79 {
80 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
81 ulong pc = kvmppc_get_pc(vcpu);
82 ulong lr = kvmppc_get_lr(vcpu);
83 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
84 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
85 if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
86 kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK);
87 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
88 }
89 }
90 EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
91
kvmppc_interrupt_offset(struct kvm_vcpu * vcpu)92 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
93 {
94 if (!is_kvmppc_hv_enabled(vcpu->kvm))
95 return to_book3s(vcpu)->hior;
96 return 0;
97 }
98
kvmppc_update_int_pending(struct kvm_vcpu * vcpu,unsigned long pending_now,unsigned long old_pending)99 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
100 unsigned long pending_now, unsigned long old_pending)
101 {
102 if (is_kvmppc_hv_enabled(vcpu->kvm))
103 return;
104 if (pending_now)
105 kvmppc_set_int_pending(vcpu, 1);
106 else if (old_pending)
107 kvmppc_set_int_pending(vcpu, 0);
108 }
109
kvmppc_critical_section(struct kvm_vcpu * vcpu)110 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
111 {
112 ulong crit_raw;
113 ulong crit_r1;
114 bool crit;
115
116 if (is_kvmppc_hv_enabled(vcpu->kvm))
117 return false;
118
119 crit_raw = kvmppc_get_critical(vcpu);
120 crit_r1 = kvmppc_get_gpr(vcpu, 1);
121
122 /* Truncate crit indicators in 32 bit mode */
123 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
124 crit_raw &= 0xffffffff;
125 crit_r1 &= 0xffffffff;
126 }
127
128 /* Critical section when crit == r1 */
129 crit = (crit_raw == crit_r1);
130 /* ... and we're in supervisor mode */
131 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
132
133 return crit;
134 }
135
kvmppc_inject_interrupt(struct kvm_vcpu * vcpu,int vec,u64 flags)136 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
137 {
138 kvmppc_unfixup_split_real(vcpu);
139 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
140 kvmppc_set_srr1(vcpu, kvmppc_get_msr(vcpu) | flags);
141 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
142 vcpu->arch.mmu.reset_msr(vcpu);
143 }
144
kvmppc_book3s_vec2irqprio(unsigned int vec)145 static int kvmppc_book3s_vec2irqprio(unsigned int vec)
146 {
147 unsigned int prio;
148
149 switch (vec) {
150 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
151 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
152 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
153 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
154 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
155 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
156 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
157 case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break;
158 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
159 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
160 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
161 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
162 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
163 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
164 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
165 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
166 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
167 default: prio = BOOK3S_IRQPRIO_MAX; break;
168 }
169
170 return prio;
171 }
172
kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu * vcpu,unsigned int vec)173 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
174 unsigned int vec)
175 {
176 unsigned long old_pending = vcpu->arch.pending_exceptions;
177
178 clear_bit(kvmppc_book3s_vec2irqprio(vec),
179 &vcpu->arch.pending_exceptions);
180
181 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
182 old_pending);
183 }
184
kvmppc_book3s_queue_irqprio(struct kvm_vcpu * vcpu,unsigned int vec)185 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
186 {
187 vcpu->stat.queue_intr++;
188
189 set_bit(kvmppc_book3s_vec2irqprio(vec),
190 &vcpu->arch.pending_exceptions);
191 #ifdef EXIT_DEBUG
192 printk(KERN_INFO "Queueing interrupt %x\n", vec);
193 #endif
194 }
195 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
196
kvmppc_core_queue_program(struct kvm_vcpu * vcpu,ulong flags)197 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
198 {
199 /* might as well deliver this straight away */
200 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
201 }
202 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
203
kvmppc_core_queue_fpunavail(struct kvm_vcpu * vcpu)204 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
205 {
206 /* might as well deliver this straight away */
207 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
208 }
209
kvmppc_core_queue_vec_unavail(struct kvm_vcpu * vcpu)210 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
211 {
212 /* might as well deliver this straight away */
213 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
214 }
215
kvmppc_core_queue_vsx_unavail(struct kvm_vcpu * vcpu)216 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
217 {
218 /* might as well deliver this straight away */
219 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
220 }
221
kvmppc_core_queue_dec(struct kvm_vcpu * vcpu)222 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
223 {
224 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
225 }
226 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
227
kvmppc_core_pending_dec(struct kvm_vcpu * vcpu)228 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
229 {
230 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
231 }
232 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
233
kvmppc_core_dequeue_dec(struct kvm_vcpu * vcpu)234 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
235 {
236 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
237 }
238 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
239
kvmppc_core_queue_external(struct kvm_vcpu * vcpu,struct kvm_interrupt * irq)240 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
241 struct kvm_interrupt *irq)
242 {
243 unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL;
244
245 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
246 vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL;
247
248 kvmppc_book3s_queue_irqprio(vcpu, vec);
249 }
250
kvmppc_core_dequeue_external(struct kvm_vcpu * vcpu)251 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
252 {
253 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
254 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
255 }
256
kvmppc_core_queue_data_storage(struct kvm_vcpu * vcpu,ulong dar,ulong flags)257 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
258 ulong flags)
259 {
260 kvmppc_set_dar(vcpu, dar);
261 kvmppc_set_dsisr(vcpu, flags);
262 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
263 }
264 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage); /* used by kvm_hv */
265
kvmppc_core_queue_inst_storage(struct kvm_vcpu * vcpu,ulong flags)266 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
267 {
268 u64 msr = kvmppc_get_msr(vcpu);
269 msr &= ~(SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
270 msr |= flags & (SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
271 kvmppc_set_msr_fast(vcpu, msr);
272 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
273 }
274
kvmppc_book3s_irqprio_deliver(struct kvm_vcpu * vcpu,unsigned int priority)275 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
276 unsigned int priority)
277 {
278 int deliver = 1;
279 int vec = 0;
280 bool crit = kvmppc_critical_section(vcpu);
281
282 switch (priority) {
283 case BOOK3S_IRQPRIO_DECREMENTER:
284 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
285 vec = BOOK3S_INTERRUPT_DECREMENTER;
286 break;
287 case BOOK3S_IRQPRIO_EXTERNAL:
288 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
289 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
290 vec = BOOK3S_INTERRUPT_EXTERNAL;
291 break;
292 case BOOK3S_IRQPRIO_SYSTEM_RESET:
293 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
294 break;
295 case BOOK3S_IRQPRIO_MACHINE_CHECK:
296 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
297 break;
298 case BOOK3S_IRQPRIO_DATA_STORAGE:
299 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
300 break;
301 case BOOK3S_IRQPRIO_INST_STORAGE:
302 vec = BOOK3S_INTERRUPT_INST_STORAGE;
303 break;
304 case BOOK3S_IRQPRIO_DATA_SEGMENT:
305 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
306 break;
307 case BOOK3S_IRQPRIO_INST_SEGMENT:
308 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
309 break;
310 case BOOK3S_IRQPRIO_ALIGNMENT:
311 vec = BOOK3S_INTERRUPT_ALIGNMENT;
312 break;
313 case BOOK3S_IRQPRIO_PROGRAM:
314 vec = BOOK3S_INTERRUPT_PROGRAM;
315 break;
316 case BOOK3S_IRQPRIO_VSX:
317 vec = BOOK3S_INTERRUPT_VSX;
318 break;
319 case BOOK3S_IRQPRIO_ALTIVEC:
320 vec = BOOK3S_INTERRUPT_ALTIVEC;
321 break;
322 case BOOK3S_IRQPRIO_FP_UNAVAIL:
323 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
324 break;
325 case BOOK3S_IRQPRIO_SYSCALL:
326 vec = BOOK3S_INTERRUPT_SYSCALL;
327 break;
328 case BOOK3S_IRQPRIO_DEBUG:
329 vec = BOOK3S_INTERRUPT_TRACE;
330 break;
331 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
332 vec = BOOK3S_INTERRUPT_PERFMON;
333 break;
334 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
335 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
336 break;
337 default:
338 deliver = 0;
339 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
340 break;
341 }
342
343 #if 0
344 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
345 #endif
346
347 if (deliver)
348 kvmppc_inject_interrupt(vcpu, vec, 0);
349
350 return deliver;
351 }
352
353 /*
354 * This function determines if an irqprio should be cleared once issued.
355 */
clear_irqprio(struct kvm_vcpu * vcpu,unsigned int priority)356 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
357 {
358 switch (priority) {
359 case BOOK3S_IRQPRIO_DECREMENTER:
360 /* DEC interrupts get cleared by mtdec */
361 return false;
362 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
363 /* External interrupts get cleared by userspace */
364 return false;
365 }
366
367 return true;
368 }
369
kvmppc_core_prepare_to_enter(struct kvm_vcpu * vcpu)370 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
371 {
372 unsigned long *pending = &vcpu->arch.pending_exceptions;
373 unsigned long old_pending = vcpu->arch.pending_exceptions;
374 unsigned int priority;
375
376 #ifdef EXIT_DEBUG
377 if (vcpu->arch.pending_exceptions)
378 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
379 #endif
380 priority = __ffs(*pending);
381 while (priority < BOOK3S_IRQPRIO_MAX) {
382 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
383 clear_irqprio(vcpu, priority)) {
384 clear_bit(priority, &vcpu->arch.pending_exceptions);
385 break;
386 }
387
388 priority = find_next_bit(pending,
389 BITS_PER_BYTE * sizeof(*pending),
390 priority + 1);
391 }
392
393 /* Tell the guest about our interrupt status */
394 kvmppc_update_int_pending(vcpu, *pending, old_pending);
395
396 return 0;
397 }
398 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
399
kvmppc_gpa_to_pfn(struct kvm_vcpu * vcpu,gpa_t gpa,bool writing,bool * writable)400 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
401 bool *writable)
402 {
403 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
404 gfn_t gfn = gpa >> PAGE_SHIFT;
405
406 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
407 mp_pa = (uint32_t)mp_pa;
408
409 /* Magic page override */
410 gpa &= ~0xFFFULL;
411 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
412 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
413 kvm_pfn_t pfn;
414
415 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
416 get_page(pfn_to_page(pfn));
417 if (writable)
418 *writable = true;
419 return pfn;
420 }
421
422 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
423 }
424 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
425
kvmppc_xlate(struct kvm_vcpu * vcpu,ulong eaddr,enum xlate_instdata xlid,enum xlate_readwrite xlrw,struct kvmppc_pte * pte)426 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
427 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
428 {
429 bool data = (xlid == XLATE_DATA);
430 bool iswrite = (xlrw == XLATE_WRITE);
431 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
432 int r;
433
434 if (relocated) {
435 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
436 } else {
437 pte->eaddr = eaddr;
438 pte->raddr = eaddr & KVM_PAM;
439 pte->vpage = VSID_REAL | eaddr >> 12;
440 pte->may_read = true;
441 pte->may_write = true;
442 pte->may_execute = true;
443 r = 0;
444
445 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
446 !data) {
447 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
448 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
449 pte->raddr &= ~SPLIT_HACK_MASK;
450 }
451 }
452
453 return r;
454 }
455
kvmppc_load_last_inst(struct kvm_vcpu * vcpu,enum instruction_type type,u32 * inst)456 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, enum instruction_type type,
457 u32 *inst)
458 {
459 ulong pc = kvmppc_get_pc(vcpu);
460 int r;
461
462 if (type == INST_SC)
463 pc -= 4;
464
465 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
466 if (r == EMULATE_DONE)
467 return r;
468 else
469 return EMULATE_AGAIN;
470 }
471 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
472
kvm_arch_vcpu_setup(struct kvm_vcpu * vcpu)473 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
474 {
475 return 0;
476 }
477
kvmppc_subarch_vcpu_init(struct kvm_vcpu * vcpu)478 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
479 {
480 return 0;
481 }
482
kvmppc_subarch_vcpu_uninit(struct kvm_vcpu * vcpu)483 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
484 {
485 }
486
kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)487 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
488 struct kvm_sregs *sregs)
489 {
490 return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
491 }
492
kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)493 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
494 struct kvm_sregs *sregs)
495 {
496 return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
497 }
498
kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu * vcpu,struct kvm_regs * regs)499 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
500 {
501 int i;
502
503 regs->pc = kvmppc_get_pc(vcpu);
504 regs->cr = kvmppc_get_cr(vcpu);
505 regs->ctr = kvmppc_get_ctr(vcpu);
506 regs->lr = kvmppc_get_lr(vcpu);
507 regs->xer = kvmppc_get_xer(vcpu);
508 regs->msr = kvmppc_get_msr(vcpu);
509 regs->srr0 = kvmppc_get_srr0(vcpu);
510 regs->srr1 = kvmppc_get_srr1(vcpu);
511 regs->pid = vcpu->arch.pid;
512 regs->sprg0 = kvmppc_get_sprg0(vcpu);
513 regs->sprg1 = kvmppc_get_sprg1(vcpu);
514 regs->sprg2 = kvmppc_get_sprg2(vcpu);
515 regs->sprg3 = kvmppc_get_sprg3(vcpu);
516 regs->sprg4 = kvmppc_get_sprg4(vcpu);
517 regs->sprg5 = kvmppc_get_sprg5(vcpu);
518 regs->sprg6 = kvmppc_get_sprg6(vcpu);
519 regs->sprg7 = kvmppc_get_sprg7(vcpu);
520
521 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
522 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
523
524 return 0;
525 }
526
kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu * vcpu,struct kvm_regs * regs)527 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
528 {
529 int i;
530
531 kvmppc_set_pc(vcpu, regs->pc);
532 kvmppc_set_cr(vcpu, regs->cr);
533 kvmppc_set_ctr(vcpu, regs->ctr);
534 kvmppc_set_lr(vcpu, regs->lr);
535 kvmppc_set_xer(vcpu, regs->xer);
536 kvmppc_set_msr(vcpu, regs->msr);
537 kvmppc_set_srr0(vcpu, regs->srr0);
538 kvmppc_set_srr1(vcpu, regs->srr1);
539 kvmppc_set_sprg0(vcpu, regs->sprg0);
540 kvmppc_set_sprg1(vcpu, regs->sprg1);
541 kvmppc_set_sprg2(vcpu, regs->sprg2);
542 kvmppc_set_sprg3(vcpu, regs->sprg3);
543 kvmppc_set_sprg4(vcpu, regs->sprg4);
544 kvmppc_set_sprg5(vcpu, regs->sprg5);
545 kvmppc_set_sprg6(vcpu, regs->sprg6);
546 kvmppc_set_sprg7(vcpu, regs->sprg7);
547
548 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
549 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
550
551 return 0;
552 }
553
kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu * vcpu,struct kvm_fpu * fpu)554 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
555 {
556 return -ENOTSUPP;
557 }
558
kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu * vcpu,struct kvm_fpu * fpu)559 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
560 {
561 return -ENOTSUPP;
562 }
563
kvmppc_get_one_reg(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)564 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
565 union kvmppc_one_reg *val)
566 {
567 int r = 0;
568 long int i;
569
570 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
571 if (r == -EINVAL) {
572 r = 0;
573 switch (id) {
574 case KVM_REG_PPC_DAR:
575 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
576 break;
577 case KVM_REG_PPC_DSISR:
578 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
579 break;
580 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
581 i = id - KVM_REG_PPC_FPR0;
582 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
583 break;
584 case KVM_REG_PPC_FPSCR:
585 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
586 break;
587 #ifdef CONFIG_VSX
588 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
589 if (cpu_has_feature(CPU_FTR_VSX)) {
590 i = id - KVM_REG_PPC_VSR0;
591 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
592 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
593 } else {
594 r = -ENXIO;
595 }
596 break;
597 #endif /* CONFIG_VSX */
598 case KVM_REG_PPC_DEBUG_INST:
599 *val = get_reg_val(id, INS_TW);
600 break;
601 #ifdef CONFIG_KVM_XICS
602 case KVM_REG_PPC_ICP_STATE:
603 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
604 r = -ENXIO;
605 break;
606 }
607 if (xive_enabled())
608 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
609 else
610 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
611 break;
612 #endif /* CONFIG_KVM_XICS */
613 case KVM_REG_PPC_FSCR:
614 *val = get_reg_val(id, vcpu->arch.fscr);
615 break;
616 case KVM_REG_PPC_TAR:
617 *val = get_reg_val(id, vcpu->arch.tar);
618 break;
619 case KVM_REG_PPC_EBBHR:
620 *val = get_reg_val(id, vcpu->arch.ebbhr);
621 break;
622 case KVM_REG_PPC_EBBRR:
623 *val = get_reg_val(id, vcpu->arch.ebbrr);
624 break;
625 case KVM_REG_PPC_BESCR:
626 *val = get_reg_val(id, vcpu->arch.bescr);
627 break;
628 case KVM_REG_PPC_IC:
629 *val = get_reg_val(id, vcpu->arch.ic);
630 break;
631 default:
632 r = -EINVAL;
633 break;
634 }
635 }
636
637 return r;
638 }
639
kvmppc_set_one_reg(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)640 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
641 union kvmppc_one_reg *val)
642 {
643 int r = 0;
644 long int i;
645
646 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
647 if (r == -EINVAL) {
648 r = 0;
649 switch (id) {
650 case KVM_REG_PPC_DAR:
651 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
652 break;
653 case KVM_REG_PPC_DSISR:
654 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
655 break;
656 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
657 i = id - KVM_REG_PPC_FPR0;
658 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
659 break;
660 case KVM_REG_PPC_FPSCR:
661 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
662 break;
663 #ifdef CONFIG_VSX
664 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
665 if (cpu_has_feature(CPU_FTR_VSX)) {
666 i = id - KVM_REG_PPC_VSR0;
667 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
668 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
669 } else {
670 r = -ENXIO;
671 }
672 break;
673 #endif /* CONFIG_VSX */
674 #ifdef CONFIG_KVM_XICS
675 case KVM_REG_PPC_ICP_STATE:
676 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
677 r = -ENXIO;
678 break;
679 }
680 if (xive_enabled())
681 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
682 else
683 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
684 break;
685 #endif /* CONFIG_KVM_XICS */
686 case KVM_REG_PPC_FSCR:
687 vcpu->arch.fscr = set_reg_val(id, *val);
688 break;
689 case KVM_REG_PPC_TAR:
690 vcpu->arch.tar = set_reg_val(id, *val);
691 break;
692 case KVM_REG_PPC_EBBHR:
693 vcpu->arch.ebbhr = set_reg_val(id, *val);
694 break;
695 case KVM_REG_PPC_EBBRR:
696 vcpu->arch.ebbrr = set_reg_val(id, *val);
697 break;
698 case KVM_REG_PPC_BESCR:
699 vcpu->arch.bescr = set_reg_val(id, *val);
700 break;
701 case KVM_REG_PPC_IC:
702 vcpu->arch.ic = set_reg_val(id, *val);
703 break;
704 default:
705 r = -EINVAL;
706 break;
707 }
708 }
709
710 return r;
711 }
712
kvmppc_core_vcpu_load(struct kvm_vcpu * vcpu,int cpu)713 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
714 {
715 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
716 }
717
kvmppc_core_vcpu_put(struct kvm_vcpu * vcpu)718 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
719 {
720 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
721 }
722
kvmppc_set_msr(struct kvm_vcpu * vcpu,u64 msr)723 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
724 {
725 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
726 }
727 EXPORT_SYMBOL_GPL(kvmppc_set_msr);
728
kvmppc_vcpu_run(struct kvm_run * kvm_run,struct kvm_vcpu * vcpu)729 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
730 {
731 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
732 }
733
kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu * vcpu,struct kvm_translation * tr)734 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
735 struct kvm_translation *tr)
736 {
737 return 0;
738 }
739
kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu * vcpu,struct kvm_guest_debug * dbg)740 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
741 struct kvm_guest_debug *dbg)
742 {
743 vcpu->guest_debug = dbg->control;
744 return 0;
745 }
746
kvmppc_decrementer_func(struct kvm_vcpu * vcpu)747 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
748 {
749 kvmppc_core_queue_dec(vcpu);
750 kvm_vcpu_kick(vcpu);
751 }
752
kvmppc_core_vcpu_create(struct kvm * kvm,unsigned int id)753 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
754 {
755 return kvm->arch.kvm_ops->vcpu_create(kvm, id);
756 }
757
kvmppc_core_vcpu_free(struct kvm_vcpu * vcpu)758 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
759 {
760 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
761 }
762
kvmppc_core_check_requests(struct kvm_vcpu * vcpu)763 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
764 {
765 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
766 }
767
kvm_vm_ioctl_get_dirty_log(struct kvm * kvm,struct kvm_dirty_log * log)768 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
769 {
770 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
771 }
772
kvmppc_core_free_memslot(struct kvm * kvm,struct kvm_memory_slot * free,struct kvm_memory_slot * dont)773 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
774 struct kvm_memory_slot *dont)
775 {
776 kvm->arch.kvm_ops->free_memslot(free, dont);
777 }
778
kvmppc_core_create_memslot(struct kvm * kvm,struct kvm_memory_slot * slot,unsigned long npages)779 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
780 unsigned long npages)
781 {
782 return kvm->arch.kvm_ops->create_memslot(slot, npages);
783 }
784
kvmppc_core_flush_memslot(struct kvm * kvm,struct kvm_memory_slot * memslot)785 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
786 {
787 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
788 }
789
kvmppc_core_prepare_memory_region(struct kvm * kvm,struct kvm_memory_slot * memslot,const struct kvm_userspace_memory_region * mem)790 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
791 struct kvm_memory_slot *memslot,
792 const struct kvm_userspace_memory_region *mem)
793 {
794 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
795 }
796
kvmppc_core_commit_memory_region(struct kvm * kvm,const struct kvm_userspace_memory_region * mem,const struct kvm_memory_slot * old,const struct kvm_memory_slot * new)797 void kvmppc_core_commit_memory_region(struct kvm *kvm,
798 const struct kvm_userspace_memory_region *mem,
799 const struct kvm_memory_slot *old,
800 const struct kvm_memory_slot *new)
801 {
802 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new);
803 }
804
kvm_unmap_hva(struct kvm * kvm,unsigned long hva)805 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
806 {
807 return kvm->arch.kvm_ops->unmap_hva(kvm, hva);
808 }
809 EXPORT_SYMBOL_GPL(kvm_unmap_hva);
810
kvm_unmap_hva_range(struct kvm * kvm,unsigned long start,unsigned long end)811 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
812 {
813 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
814 }
815
kvm_age_hva(struct kvm * kvm,unsigned long start,unsigned long end)816 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
817 {
818 return kvm->arch.kvm_ops->age_hva(kvm, start, end);
819 }
820
kvm_test_age_hva(struct kvm * kvm,unsigned long hva)821 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
822 {
823 return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
824 }
825
kvm_set_spte_hva(struct kvm * kvm,unsigned long hva,pte_t pte)826 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
827 {
828 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
829 }
830
kvmppc_mmu_destroy(struct kvm_vcpu * vcpu)831 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
832 {
833 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
834 }
835
kvmppc_core_init_vm(struct kvm * kvm)836 int kvmppc_core_init_vm(struct kvm *kvm)
837 {
838
839 #ifdef CONFIG_PPC64
840 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
841 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
842 mutex_init(&kvm->arch.rtas_token_lock);
843 #endif
844
845 return kvm->arch.kvm_ops->init_vm(kvm);
846 }
847
kvmppc_core_destroy_vm(struct kvm * kvm)848 void kvmppc_core_destroy_vm(struct kvm *kvm)
849 {
850 kvm->arch.kvm_ops->destroy_vm(kvm);
851
852 #ifdef CONFIG_PPC64
853 kvmppc_rtas_tokens_free(kvm);
854 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
855 #endif
856 }
857
kvmppc_h_logical_ci_load(struct kvm_vcpu * vcpu)858 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
859 {
860 unsigned long size = kvmppc_get_gpr(vcpu, 4);
861 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
862 u64 buf;
863 int srcu_idx;
864 int ret;
865
866 if (!is_power_of_2(size) || (size > sizeof(buf)))
867 return H_TOO_HARD;
868
869 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
870 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
871 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
872 if (ret != 0)
873 return H_TOO_HARD;
874
875 switch (size) {
876 case 1:
877 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
878 break;
879
880 case 2:
881 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
882 break;
883
884 case 4:
885 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
886 break;
887
888 case 8:
889 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
890 break;
891
892 default:
893 BUG();
894 }
895
896 return H_SUCCESS;
897 }
898 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
899
kvmppc_h_logical_ci_store(struct kvm_vcpu * vcpu)900 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
901 {
902 unsigned long size = kvmppc_get_gpr(vcpu, 4);
903 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
904 unsigned long val = kvmppc_get_gpr(vcpu, 6);
905 u64 buf;
906 int srcu_idx;
907 int ret;
908
909 switch (size) {
910 case 1:
911 *(u8 *)&buf = val;
912 break;
913
914 case 2:
915 *(__be16 *)&buf = cpu_to_be16(val);
916 break;
917
918 case 4:
919 *(__be32 *)&buf = cpu_to_be32(val);
920 break;
921
922 case 8:
923 *(__be64 *)&buf = cpu_to_be64(val);
924 break;
925
926 default:
927 return H_TOO_HARD;
928 }
929
930 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
931 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
932 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
933 if (ret != 0)
934 return H_TOO_HARD;
935
936 return H_SUCCESS;
937 }
938 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
939
kvmppc_core_check_processor_compat(void)940 int kvmppc_core_check_processor_compat(void)
941 {
942 /*
943 * We always return 0 for book3s. We check
944 * for compatibility while loading the HV
945 * or PR module
946 */
947 return 0;
948 }
949
kvmppc_book3s_hcall_implemented(struct kvm * kvm,unsigned long hcall)950 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
951 {
952 return kvm->arch.kvm_ops->hcall_implemented(hcall);
953 }
954
955 #ifdef CONFIG_KVM_XICS
kvm_set_irq(struct kvm * kvm,int irq_source_id,u32 irq,int level,bool line_status)956 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
957 bool line_status)
958 {
959 if (xive_enabled())
960 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
961 line_status);
962 else
963 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
964 line_status);
965 }
966
kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry * irq_entry,struct kvm * kvm,int irq_source_id,int level,bool line_status)967 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
968 struct kvm *kvm, int irq_source_id,
969 int level, bool line_status)
970 {
971 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
972 level, line_status);
973 }
kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry * e,struct kvm * kvm,int irq_source_id,int level,bool line_status)974 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
975 struct kvm *kvm, int irq_source_id, int level,
976 bool line_status)
977 {
978 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
979 }
980
kvm_irq_map_gsi(struct kvm * kvm,struct kvm_kernel_irq_routing_entry * entries,int gsi)981 int kvm_irq_map_gsi(struct kvm *kvm,
982 struct kvm_kernel_irq_routing_entry *entries, int gsi)
983 {
984 entries->gsi = gsi;
985 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
986 entries->set = kvmppc_book3s_set_irq;
987 entries->irqchip.irqchip = 0;
988 entries->irqchip.pin = gsi;
989 return 1;
990 }
991
kvm_irq_map_chip_pin(struct kvm * kvm,unsigned irqchip,unsigned pin)992 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
993 {
994 return pin;
995 }
996
997 #endif /* CONFIG_KVM_XICS */
998
kvmppc_book3s_init(void)999 static int kvmppc_book3s_init(void)
1000 {
1001 int r;
1002
1003 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1004 if (r)
1005 return r;
1006 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1007 r = kvmppc_book3s_init_pr();
1008 #endif
1009
1010 #ifdef CONFIG_KVM_XICS
1011 #ifdef CONFIG_KVM_XIVE
1012 if (xive_enabled()) {
1013 kvmppc_xive_init_module();
1014 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1015 } else
1016 #endif
1017 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1018 #endif
1019 return r;
1020 }
1021
kvmppc_book3s_exit(void)1022 static void kvmppc_book3s_exit(void)
1023 {
1024 #ifdef CONFIG_KVM_XICS
1025 if (xive_enabled())
1026 kvmppc_xive_exit_module();
1027 #endif
1028 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1029 kvmppc_book3s_exit_pr();
1030 #endif
1031 kvm_exit();
1032 }
1033
1034 module_init(kvmppc_book3s_init);
1035 module_exit(kvmppc_book3s_exit);
1036
1037 /* On 32bit this is our one and only kernel module */
1038 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1039 MODULE_ALIAS_MISCDEV(KVM_MINOR);
1040 MODULE_ALIAS("devname:kvm");
1041 #endif
1042