1 /*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 * Paul Mackerras <paulus@samba.org>
8 *
9 * Description:
10 * Functions relating to running KVM on Book 3S processors where
11 * we don't have access to hypervisor mode, and we run the guest
12 * in problem state (user mode).
13 *
14 * This file is derived from arch/powerpc/kvm/44x.c,
15 * by Hollis Blanchard <hollisb@us.ibm.com>.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License, version 2, as
19 * published by the Free Software Foundation.
20 */
21
22 #include <linux/kvm_host.h>
23 #include <linux/export.h>
24 #include <linux/err.h>
25 #include <linux/slab.h>
26
27 #include <asm/reg.h>
28 #include <asm/cputable.h>
29 #include <asm/cacheflush.h>
30 #include <asm/tlbflush.h>
31 #include <linux/uaccess.h>
32 #include <asm/io.h>
33 #include <asm/kvm_ppc.h>
34 #include <asm/kvm_book3s.h>
35 #include <asm/mmu_context.h>
36 #include <asm/switch_to.h>
37 #include <asm/firmware.h>
38 #include <asm/setup.h>
39 #include <linux/gfp.h>
40 #include <linux/sched.h>
41 #include <linux/vmalloc.h>
42 #include <linux/highmem.h>
43 #include <linux/module.h>
44 #include <linux/miscdevice.h>
45
46 #include "book3s.h"
47
48 #define CREATE_TRACE_POINTS
49 #include "trace_pr.h"
50
51 /* #define EXIT_DEBUG */
52 /* #define DEBUG_EXT */
53
54 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
55 ulong msr);
56 static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac);
57
58 /* Some compatibility defines */
59 #ifdef CONFIG_PPC_BOOK3S_32
60 #define MSR_USER32 MSR_USER
61 #define MSR_USER64 MSR_USER
62 #define HW_PAGE_SIZE PAGE_SIZE
63 #define HPTE_R_M _PAGE_COHERENT
64 #endif
65
kvmppc_is_split_real(struct kvm_vcpu * vcpu)66 static bool kvmppc_is_split_real(struct kvm_vcpu *vcpu)
67 {
68 ulong msr = kvmppc_get_msr(vcpu);
69 return (msr & (MSR_IR|MSR_DR)) == MSR_DR;
70 }
71
kvmppc_fixup_split_real(struct kvm_vcpu * vcpu)72 static void kvmppc_fixup_split_real(struct kvm_vcpu *vcpu)
73 {
74 ulong msr = kvmppc_get_msr(vcpu);
75 ulong pc = kvmppc_get_pc(vcpu);
76
77 /* We are in DR only split real mode */
78 if ((msr & (MSR_IR|MSR_DR)) != MSR_DR)
79 return;
80
81 /* We have not fixed up the guest already */
82 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK)
83 return;
84
85 /* The code is in fixupable address space */
86 if (pc & SPLIT_HACK_MASK)
87 return;
88
89 vcpu->arch.hflags |= BOOK3S_HFLAG_SPLIT_HACK;
90 kvmppc_set_pc(vcpu, pc | SPLIT_HACK_OFFS);
91 }
92
93 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu);
94
kvmppc_core_vcpu_load_pr(struct kvm_vcpu * vcpu,int cpu)95 static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu)
96 {
97 #ifdef CONFIG_PPC_BOOK3S_64
98 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
99 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
100 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
101 svcpu->in_use = 0;
102 svcpu_put(svcpu);
103 #endif
104
105 /* Disable AIL if supported */
106 if (cpu_has_feature(CPU_FTR_HVMODE) &&
107 cpu_has_feature(CPU_FTR_ARCH_207S))
108 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_AIL);
109
110 vcpu->cpu = smp_processor_id();
111 #ifdef CONFIG_PPC_BOOK3S_32
112 current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu;
113 #endif
114
115 if (kvmppc_is_split_real(vcpu))
116 kvmppc_fixup_split_real(vcpu);
117 }
118
kvmppc_core_vcpu_put_pr(struct kvm_vcpu * vcpu)119 static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu)
120 {
121 #ifdef CONFIG_PPC_BOOK3S_64
122 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
123 if (svcpu->in_use) {
124 kvmppc_copy_from_svcpu(vcpu, svcpu);
125 }
126 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
127 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
128 svcpu_put(svcpu);
129 #endif
130
131 if (kvmppc_is_split_real(vcpu))
132 kvmppc_unfixup_split_real(vcpu);
133
134 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
135 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
136
137 /* Enable AIL if supported */
138 if (cpu_has_feature(CPU_FTR_HVMODE) &&
139 cpu_has_feature(CPU_FTR_ARCH_207S))
140 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_AIL_3);
141
142 vcpu->cpu = -1;
143 }
144
145 /* Copy data needed by real-mode code from vcpu to shadow vcpu */
kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu * svcpu,struct kvm_vcpu * vcpu)146 void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
147 struct kvm_vcpu *vcpu)
148 {
149 svcpu->gpr[0] = vcpu->arch.gpr[0];
150 svcpu->gpr[1] = vcpu->arch.gpr[1];
151 svcpu->gpr[2] = vcpu->arch.gpr[2];
152 svcpu->gpr[3] = vcpu->arch.gpr[3];
153 svcpu->gpr[4] = vcpu->arch.gpr[4];
154 svcpu->gpr[5] = vcpu->arch.gpr[5];
155 svcpu->gpr[6] = vcpu->arch.gpr[6];
156 svcpu->gpr[7] = vcpu->arch.gpr[7];
157 svcpu->gpr[8] = vcpu->arch.gpr[8];
158 svcpu->gpr[9] = vcpu->arch.gpr[9];
159 svcpu->gpr[10] = vcpu->arch.gpr[10];
160 svcpu->gpr[11] = vcpu->arch.gpr[11];
161 svcpu->gpr[12] = vcpu->arch.gpr[12];
162 svcpu->gpr[13] = vcpu->arch.gpr[13];
163 svcpu->cr = vcpu->arch.cr;
164 svcpu->xer = vcpu->arch.xer;
165 svcpu->ctr = vcpu->arch.ctr;
166 svcpu->lr = vcpu->arch.lr;
167 svcpu->pc = vcpu->arch.pc;
168 #ifdef CONFIG_PPC_BOOK3S_64
169 svcpu->shadow_fscr = vcpu->arch.shadow_fscr;
170 #endif
171 /*
172 * Now also save the current time base value. We use this
173 * to find the guest purr and spurr value.
174 */
175 vcpu->arch.entry_tb = get_tb();
176 vcpu->arch.entry_vtb = get_vtb();
177 if (cpu_has_feature(CPU_FTR_ARCH_207S))
178 vcpu->arch.entry_ic = mfspr(SPRN_IC);
179 svcpu->in_use = true;
180 }
181
182 /* Copy data touched by real-mode code from shadow vcpu back to vcpu */
kvmppc_copy_from_svcpu(struct kvm_vcpu * vcpu,struct kvmppc_book3s_shadow_vcpu * svcpu)183 void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu,
184 struct kvmppc_book3s_shadow_vcpu *svcpu)
185 {
186 /*
187 * vcpu_put would just call us again because in_use hasn't
188 * been updated yet.
189 */
190 preempt_disable();
191
192 /*
193 * Maybe we were already preempted and synced the svcpu from
194 * our preempt notifiers. Don't bother touching this svcpu then.
195 */
196 if (!svcpu->in_use)
197 goto out;
198
199 vcpu->arch.gpr[0] = svcpu->gpr[0];
200 vcpu->arch.gpr[1] = svcpu->gpr[1];
201 vcpu->arch.gpr[2] = svcpu->gpr[2];
202 vcpu->arch.gpr[3] = svcpu->gpr[3];
203 vcpu->arch.gpr[4] = svcpu->gpr[4];
204 vcpu->arch.gpr[5] = svcpu->gpr[5];
205 vcpu->arch.gpr[6] = svcpu->gpr[6];
206 vcpu->arch.gpr[7] = svcpu->gpr[7];
207 vcpu->arch.gpr[8] = svcpu->gpr[8];
208 vcpu->arch.gpr[9] = svcpu->gpr[9];
209 vcpu->arch.gpr[10] = svcpu->gpr[10];
210 vcpu->arch.gpr[11] = svcpu->gpr[11];
211 vcpu->arch.gpr[12] = svcpu->gpr[12];
212 vcpu->arch.gpr[13] = svcpu->gpr[13];
213 vcpu->arch.cr = svcpu->cr;
214 vcpu->arch.xer = svcpu->xer;
215 vcpu->arch.ctr = svcpu->ctr;
216 vcpu->arch.lr = svcpu->lr;
217 vcpu->arch.pc = svcpu->pc;
218 vcpu->arch.shadow_srr1 = svcpu->shadow_srr1;
219 vcpu->arch.fault_dar = svcpu->fault_dar;
220 vcpu->arch.fault_dsisr = svcpu->fault_dsisr;
221 vcpu->arch.last_inst = svcpu->last_inst;
222 #ifdef CONFIG_PPC_BOOK3S_64
223 vcpu->arch.shadow_fscr = svcpu->shadow_fscr;
224 #endif
225 /*
226 * Update purr and spurr using time base on exit.
227 */
228 vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
229 vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
230 to_book3s(vcpu)->vtb += get_vtb() - vcpu->arch.entry_vtb;
231 if (cpu_has_feature(CPU_FTR_ARCH_207S))
232 vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
233 svcpu->in_use = false;
234
235 out:
236 preempt_enable();
237 }
238
kvmppc_core_check_requests_pr(struct kvm_vcpu * vcpu)239 static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
240 {
241 int r = 1; /* Indicate we want to get back into the guest */
242
243 /* We misuse TLB_FLUSH to indicate that we want to clear
244 all shadow cache entries */
245 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
246 kvmppc_mmu_pte_flush(vcpu, 0, 0);
247
248 return r;
249 }
250
251 /************* MMU Notifiers *************/
do_kvm_unmap_hva(struct kvm * kvm,unsigned long start,unsigned long end)252 static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start,
253 unsigned long end)
254 {
255 long i;
256 struct kvm_vcpu *vcpu;
257 struct kvm_memslots *slots;
258 struct kvm_memory_slot *memslot;
259
260 slots = kvm_memslots(kvm);
261 kvm_for_each_memslot(memslot, slots) {
262 unsigned long hva_start, hva_end;
263 gfn_t gfn, gfn_end;
264
265 hva_start = max(start, memslot->userspace_addr);
266 hva_end = min(end, memslot->userspace_addr +
267 (memslot->npages << PAGE_SHIFT));
268 if (hva_start >= hva_end)
269 continue;
270 /*
271 * {gfn(page) | page intersects with [hva_start, hva_end)} =
272 * {gfn, gfn+1, ..., gfn_end-1}.
273 */
274 gfn = hva_to_gfn_memslot(hva_start, memslot);
275 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
276 kvm_for_each_vcpu(i, vcpu, kvm)
277 kvmppc_mmu_pte_pflush(vcpu, gfn << PAGE_SHIFT,
278 gfn_end << PAGE_SHIFT);
279 }
280 }
281
kvm_unmap_hva_pr(struct kvm * kvm,unsigned long hva)282 static int kvm_unmap_hva_pr(struct kvm *kvm, unsigned long hva)
283 {
284 trace_kvm_unmap_hva(hva);
285
286 do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
287
288 return 0;
289 }
290
kvm_unmap_hva_range_pr(struct kvm * kvm,unsigned long start,unsigned long end)291 static int kvm_unmap_hva_range_pr(struct kvm *kvm, unsigned long start,
292 unsigned long end)
293 {
294 do_kvm_unmap_hva(kvm, start, end);
295
296 return 0;
297 }
298
kvm_age_hva_pr(struct kvm * kvm,unsigned long start,unsigned long end)299 static int kvm_age_hva_pr(struct kvm *kvm, unsigned long start,
300 unsigned long end)
301 {
302 /* XXX could be more clever ;) */
303 return 0;
304 }
305
kvm_test_age_hva_pr(struct kvm * kvm,unsigned long hva)306 static int kvm_test_age_hva_pr(struct kvm *kvm, unsigned long hva)
307 {
308 /* XXX could be more clever ;) */
309 return 0;
310 }
311
kvm_set_spte_hva_pr(struct kvm * kvm,unsigned long hva,pte_t pte)312 static void kvm_set_spte_hva_pr(struct kvm *kvm, unsigned long hva, pte_t pte)
313 {
314 /* The page will get remapped properly on its next fault */
315 do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
316 }
317
318 /*****************************************/
319
kvmppc_recalc_shadow_msr(struct kvm_vcpu * vcpu)320 static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
321 {
322 ulong guest_msr = kvmppc_get_msr(vcpu);
323 ulong smsr = guest_msr;
324
325 /* Guest MSR values */
326 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;
327 /* Process MSR values */
328 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
329 /* External providers the guest reserved */
330 smsr |= (guest_msr & vcpu->arch.guest_owned_ext);
331 /* 64-bit Process MSR values */
332 #ifdef CONFIG_PPC_BOOK3S_64
333 smsr |= MSR_ISF | MSR_HV;
334 #endif
335 vcpu->arch.shadow_msr = smsr;
336 }
337
kvmppc_set_msr_pr(struct kvm_vcpu * vcpu,u64 msr)338 static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr)
339 {
340 ulong old_msr = kvmppc_get_msr(vcpu);
341
342 #ifdef EXIT_DEBUG
343 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
344 #endif
345
346 msr &= to_book3s(vcpu)->msr_mask;
347 kvmppc_set_msr_fast(vcpu, msr);
348 kvmppc_recalc_shadow_msr(vcpu);
349
350 if (msr & MSR_POW) {
351 if (!vcpu->arch.pending_exceptions) {
352 kvm_vcpu_block(vcpu);
353 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
354 vcpu->stat.halt_wakeup++;
355
356 /* Unset POW bit after we woke up */
357 msr &= ~MSR_POW;
358 kvmppc_set_msr_fast(vcpu, msr);
359 }
360 }
361
362 if (kvmppc_is_split_real(vcpu))
363 kvmppc_fixup_split_real(vcpu);
364 else
365 kvmppc_unfixup_split_real(vcpu);
366
367 if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) !=
368 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
369 kvmppc_mmu_flush_segments(vcpu);
370 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
371
372 /* Preload magic page segment when in kernel mode */
373 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
374 struct kvm_vcpu_arch *a = &vcpu->arch;
375
376 if (msr & MSR_DR)
377 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
378 else
379 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
380 }
381 }
382
383 /*
384 * When switching from 32 to 64-bit, we may have a stale 32-bit
385 * magic page around, we need to flush it. Typically 32-bit magic
386 * page will be instanciated when calling into RTAS. Note: We
387 * assume that such transition only happens while in kernel mode,
388 * ie, we never transition from user 32-bit to kernel 64-bit with
389 * a 32-bit magic page around.
390 */
391 if (vcpu->arch.magic_page_pa &&
392 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
393 /* going from RTAS to normal kernel code */
394 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
395 ~0xFFFUL);
396 }
397
398 /* Preload FPU if it's enabled */
399 if (kvmppc_get_msr(vcpu) & MSR_FP)
400 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
401 }
402
kvmppc_set_pvr_pr(struct kvm_vcpu * vcpu,u32 pvr)403 void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)
404 {
405 u32 host_pvr;
406
407 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
408 vcpu->arch.pvr = pvr;
409 #ifdef CONFIG_PPC_BOOK3S_64
410 if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
411 kvmppc_mmu_book3s_64_init(vcpu);
412 if (!to_book3s(vcpu)->hior_explicit)
413 to_book3s(vcpu)->hior = 0xfff00000;
414 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
415 vcpu->arch.cpu_type = KVM_CPU_3S_64;
416 } else
417 #endif
418 {
419 kvmppc_mmu_book3s_32_init(vcpu);
420 if (!to_book3s(vcpu)->hior_explicit)
421 to_book3s(vcpu)->hior = 0;
422 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
423 vcpu->arch.cpu_type = KVM_CPU_3S_32;
424 }
425
426 kvmppc_sanity_check(vcpu);
427
428 /* If we are in hypervisor level on 970, we can tell the CPU to
429 * treat DCBZ as 32 bytes store */
430 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
431 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
432 !strcmp(cur_cpu_spec->platform, "ppc970"))
433 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
434
435 /* Cell performs badly if MSR_FEx are set. So let's hope nobody
436 really needs them in a VM on Cell and force disable them. */
437 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
438 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);
439
440 /*
441 * If they're asking for POWER6 or later, set the flag
442 * indicating that we can do multiple large page sizes
443 * and 1TB segments.
444 * Also set the flag that indicates that tlbie has the large
445 * page bit in the RB operand instead of the instruction.
446 */
447 switch (PVR_VER(pvr)) {
448 case PVR_POWER6:
449 case PVR_POWER7:
450 case PVR_POWER7p:
451 case PVR_POWER8:
452 case PVR_POWER8E:
453 case PVR_POWER8NVL:
454 vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE |
455 BOOK3S_HFLAG_NEW_TLBIE;
456 break;
457 }
458
459 #ifdef CONFIG_PPC_BOOK3S_32
460 /* 32 bit Book3S always has 32 byte dcbz */
461 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
462 #endif
463
464 /* On some CPUs we can execute paired single operations natively */
465 asm ( "mfpvr %0" : "=r"(host_pvr));
466 switch (host_pvr) {
467 case 0x00080200: /* lonestar 2.0 */
468 case 0x00088202: /* lonestar 2.2 */
469 case 0x70000100: /* gekko 1.0 */
470 case 0x00080100: /* gekko 2.0 */
471 case 0x00083203: /* gekko 2.3a */
472 case 0x00083213: /* gekko 2.3b */
473 case 0x00083204: /* gekko 2.4 */
474 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
475 case 0x00087200: /* broadway */
476 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
477 /* Enable HID2.PSE - in case we need it later */
478 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
479 }
480 }
481
482 /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
483 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
484 * emulate 32 bytes dcbz length.
485 *
486 * The Book3s_64 inventors also realized this case and implemented a special bit
487 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
488 *
489 * My approach here is to patch the dcbz instruction on executing pages.
490 */
kvmppc_patch_dcbz(struct kvm_vcpu * vcpu,struct kvmppc_pte * pte)491 static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
492 {
493 struct page *hpage;
494 u64 hpage_offset;
495 u32 *page;
496 int i;
497
498 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
499 if (is_error_page(hpage))
500 return;
501
502 hpage_offset = pte->raddr & ~PAGE_MASK;
503 hpage_offset &= ~0xFFFULL;
504 hpage_offset /= 4;
505
506 get_page(hpage);
507 page = kmap_atomic(hpage);
508
509 /* patch dcbz into reserved instruction, so we trap */
510 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
511 if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ)
512 page[i] &= cpu_to_be32(0xfffffff7);
513
514 kunmap_atomic(page);
515 put_page(hpage);
516 }
517
kvmppc_visible_gpa(struct kvm_vcpu * vcpu,gpa_t gpa)518 static bool kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
519 {
520 ulong mp_pa = vcpu->arch.magic_page_pa;
521
522 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
523 mp_pa = (uint32_t)mp_pa;
524
525 gpa &= ~0xFFFULL;
526 if (unlikely(mp_pa) && unlikely((mp_pa & KVM_PAM) == (gpa & KVM_PAM))) {
527 return true;
528 }
529
530 return kvm_is_visible_gfn(vcpu->kvm, gpa >> PAGE_SHIFT);
531 }
532
kvmppc_handle_pagefault(struct kvm_run * run,struct kvm_vcpu * vcpu,ulong eaddr,int vec)533 int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
534 ulong eaddr, int vec)
535 {
536 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
537 bool iswrite = false;
538 int r = RESUME_GUEST;
539 int relocated;
540 int page_found = 0;
541 struct kvmppc_pte pte = { 0 };
542 bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false;
543 bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false;
544 u64 vsid;
545
546 relocated = data ? dr : ir;
547 if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE))
548 iswrite = true;
549
550 /* Resolve real address if translation turned on */
551 if (relocated) {
552 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite);
553 } else {
554 pte.may_execute = true;
555 pte.may_read = true;
556 pte.may_write = true;
557 pte.raddr = eaddr & KVM_PAM;
558 pte.eaddr = eaddr;
559 pte.vpage = eaddr >> 12;
560 pte.page_size = MMU_PAGE_64K;
561 pte.wimg = HPTE_R_M;
562 }
563
564 switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) {
565 case 0:
566 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
567 break;
568 case MSR_DR:
569 if (!data &&
570 (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
571 ((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
572 pte.raddr &= ~SPLIT_HACK_MASK;
573 /* fall through */
574 case MSR_IR:
575 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
576
577 if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR)
578 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
579 else
580 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
581 pte.vpage |= vsid;
582
583 if (vsid == -1)
584 page_found = -EINVAL;
585 break;
586 }
587
588 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
589 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
590 /*
591 * If we do the dcbz hack, we have to NX on every execution,
592 * so we can patch the executing code. This renders our guest
593 * NX-less.
594 */
595 pte.may_execute = !data;
596 }
597
598 if (page_found == -ENOENT) {
599 /* Page not found in guest PTE entries */
600 u64 ssrr1 = vcpu->arch.shadow_srr1;
601 u64 msr = kvmppc_get_msr(vcpu);
602 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
603 kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr);
604 kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
605 kvmppc_book3s_queue_irqprio(vcpu, vec);
606 } else if (page_found == -EPERM) {
607 /* Storage protection */
608 u32 dsisr = vcpu->arch.fault_dsisr;
609 u64 ssrr1 = vcpu->arch.shadow_srr1;
610 u64 msr = kvmppc_get_msr(vcpu);
611 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
612 dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT;
613 kvmppc_set_dsisr(vcpu, dsisr);
614 kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
615 kvmppc_book3s_queue_irqprio(vcpu, vec);
616 } else if (page_found == -EINVAL) {
617 /* Page not found in guest SLB */
618 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
619 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
620 } else if (kvmppc_visible_gpa(vcpu, pte.raddr)) {
621 if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) {
622 /*
623 * There is already a host HPTE there, presumably
624 * a read-only one for a page the guest thinks
625 * is writable, so get rid of it first.
626 */
627 kvmppc_mmu_unmap_page(vcpu, &pte);
628 }
629 /* The guest's PTE is not mapped yet. Map on the host */
630 if (kvmppc_mmu_map_page(vcpu, &pte, iswrite) == -EIO) {
631 /* Exit KVM if mapping failed */
632 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
633 return RESUME_HOST;
634 }
635 if (data)
636 vcpu->stat.sp_storage++;
637 else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
638 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
639 kvmppc_patch_dcbz(vcpu, &pte);
640 } else {
641 /* MMIO */
642 vcpu->stat.mmio_exits++;
643 vcpu->arch.paddr_accessed = pte.raddr;
644 vcpu->arch.vaddr_accessed = pte.eaddr;
645 r = kvmppc_emulate_mmio(run, vcpu);
646 if ( r == RESUME_HOST_NV )
647 r = RESUME_HOST;
648 }
649
650 return r;
651 }
652
653 /* Give up external provider (FPU, Altivec, VSX) */
kvmppc_giveup_ext(struct kvm_vcpu * vcpu,ulong msr)654 void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
655 {
656 struct thread_struct *t = ¤t->thread;
657
658 /*
659 * VSX instructions can access FP and vector registers, so if
660 * we are giving up VSX, make sure we give up FP and VMX as well.
661 */
662 if (msr & MSR_VSX)
663 msr |= MSR_FP | MSR_VEC;
664
665 msr &= vcpu->arch.guest_owned_ext;
666 if (!msr)
667 return;
668
669 #ifdef DEBUG_EXT
670 printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
671 #endif
672
673 if (msr & MSR_FP) {
674 /*
675 * Note that on CPUs with VSX, giveup_fpu stores
676 * both the traditional FP registers and the added VSX
677 * registers into thread.fp_state.fpr[].
678 */
679 if (t->regs->msr & MSR_FP)
680 giveup_fpu(current);
681 t->fp_save_area = NULL;
682 }
683
684 #ifdef CONFIG_ALTIVEC
685 if (msr & MSR_VEC) {
686 if (current->thread.regs->msr & MSR_VEC)
687 giveup_altivec(current);
688 t->vr_save_area = NULL;
689 }
690 #endif
691
692 vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);
693 kvmppc_recalc_shadow_msr(vcpu);
694 }
695
696 /* Give up facility (TAR / EBB / DSCR) */
kvmppc_giveup_fac(struct kvm_vcpu * vcpu,ulong fac)697 static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac)
698 {
699 #ifdef CONFIG_PPC_BOOK3S_64
700 if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) {
701 /* Facility not available to the guest, ignore giveup request*/
702 return;
703 }
704
705 switch (fac) {
706 case FSCR_TAR_LG:
707 vcpu->arch.tar = mfspr(SPRN_TAR);
708 mtspr(SPRN_TAR, current->thread.tar);
709 vcpu->arch.shadow_fscr &= ~FSCR_TAR;
710 break;
711 }
712 #endif
713 }
714
715 /* Handle external providers (FPU, Altivec, VSX) */
kvmppc_handle_ext(struct kvm_vcpu * vcpu,unsigned int exit_nr,ulong msr)716 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
717 ulong msr)
718 {
719 struct thread_struct *t = ¤t->thread;
720
721 /* When we have paired singles, we emulate in software */
722 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
723 return RESUME_GUEST;
724
725 if (!(kvmppc_get_msr(vcpu) & msr)) {
726 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
727 return RESUME_GUEST;
728 }
729
730 if (msr == MSR_VSX) {
731 /* No VSX? Give an illegal instruction interrupt */
732 #ifdef CONFIG_VSX
733 if (!cpu_has_feature(CPU_FTR_VSX))
734 #endif
735 {
736 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
737 return RESUME_GUEST;
738 }
739
740 /*
741 * We have to load up all the FP and VMX registers before
742 * we can let the guest use VSX instructions.
743 */
744 msr = MSR_FP | MSR_VEC | MSR_VSX;
745 }
746
747 /* See if we already own all the ext(s) needed */
748 msr &= ~vcpu->arch.guest_owned_ext;
749 if (!msr)
750 return RESUME_GUEST;
751
752 #ifdef DEBUG_EXT
753 printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
754 #endif
755
756 if (msr & MSR_FP) {
757 preempt_disable();
758 enable_kernel_fp();
759 load_fp_state(&vcpu->arch.fp);
760 disable_kernel_fp();
761 t->fp_save_area = &vcpu->arch.fp;
762 preempt_enable();
763 }
764
765 if (msr & MSR_VEC) {
766 #ifdef CONFIG_ALTIVEC
767 preempt_disable();
768 enable_kernel_altivec();
769 load_vr_state(&vcpu->arch.vr);
770 disable_kernel_altivec();
771 t->vr_save_area = &vcpu->arch.vr;
772 preempt_enable();
773 #endif
774 }
775
776 t->regs->msr |= msr;
777 vcpu->arch.guest_owned_ext |= msr;
778 kvmppc_recalc_shadow_msr(vcpu);
779
780 return RESUME_GUEST;
781 }
782
783 /*
784 * Kernel code using FP or VMX could have flushed guest state to
785 * the thread_struct; if so, get it back now.
786 */
kvmppc_handle_lost_ext(struct kvm_vcpu * vcpu)787 static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
788 {
789 unsigned long lost_ext;
790
791 lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;
792 if (!lost_ext)
793 return;
794
795 if (lost_ext & MSR_FP) {
796 preempt_disable();
797 enable_kernel_fp();
798 load_fp_state(&vcpu->arch.fp);
799 disable_kernel_fp();
800 preempt_enable();
801 }
802 #ifdef CONFIG_ALTIVEC
803 if (lost_ext & MSR_VEC) {
804 preempt_disable();
805 enable_kernel_altivec();
806 load_vr_state(&vcpu->arch.vr);
807 disable_kernel_altivec();
808 preempt_enable();
809 }
810 #endif
811 current->thread.regs->msr |= lost_ext;
812 }
813
814 #ifdef CONFIG_PPC_BOOK3S_64
815
kvmppc_trigger_fac_interrupt(struct kvm_vcpu * vcpu,ulong fac)816 static void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac)
817 {
818 /* Inject the Interrupt Cause field and trigger a guest interrupt */
819 vcpu->arch.fscr &= ~(0xffULL << 56);
820 vcpu->arch.fscr |= (fac << 56);
821 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL);
822 }
823
kvmppc_emulate_fac(struct kvm_vcpu * vcpu,ulong fac)824 static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
825 {
826 enum emulation_result er = EMULATE_FAIL;
827
828 if (!(kvmppc_get_msr(vcpu) & MSR_PR))
829 er = kvmppc_emulate_instruction(vcpu->run, vcpu);
830
831 if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) {
832 /* Couldn't emulate, trigger interrupt in guest */
833 kvmppc_trigger_fac_interrupt(vcpu, fac);
834 }
835 }
836
837 /* Enable facilities (TAR, EBB, DSCR) for the guest */
kvmppc_handle_fac(struct kvm_vcpu * vcpu,ulong fac)838 static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
839 {
840 bool guest_fac_enabled;
841 BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));
842
843 /*
844 * Not every facility is enabled by FSCR bits, check whether the
845 * guest has this facility enabled at all.
846 */
847 switch (fac) {
848 case FSCR_TAR_LG:
849 case FSCR_EBB_LG:
850 guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
851 break;
852 case FSCR_TM_LG:
853 guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
854 break;
855 default:
856 guest_fac_enabled = false;
857 break;
858 }
859
860 if (!guest_fac_enabled) {
861 /* Facility not enabled by the guest */
862 kvmppc_trigger_fac_interrupt(vcpu, fac);
863 return RESUME_GUEST;
864 }
865
866 switch (fac) {
867 case FSCR_TAR_LG:
868 /* TAR switching isn't lazy in Linux yet */
869 current->thread.tar = mfspr(SPRN_TAR);
870 mtspr(SPRN_TAR, vcpu->arch.tar);
871 vcpu->arch.shadow_fscr |= FSCR_TAR;
872 break;
873 default:
874 kvmppc_emulate_fac(vcpu, fac);
875 break;
876 }
877
878 return RESUME_GUEST;
879 }
880
kvmppc_set_fscr(struct kvm_vcpu * vcpu,u64 fscr)881 void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
882 {
883 if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
884 /* TAR got dropped, drop it in shadow too */
885 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
886 }
887 vcpu->arch.fscr = fscr;
888 }
889 #endif
890
kvmppc_setup_debug(struct kvm_vcpu * vcpu)891 static void kvmppc_setup_debug(struct kvm_vcpu *vcpu)
892 {
893 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
894 u64 msr = kvmppc_get_msr(vcpu);
895
896 kvmppc_set_msr(vcpu, msr | MSR_SE);
897 }
898 }
899
kvmppc_clear_debug(struct kvm_vcpu * vcpu)900 static void kvmppc_clear_debug(struct kvm_vcpu *vcpu)
901 {
902 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
903 u64 msr = kvmppc_get_msr(vcpu);
904
905 kvmppc_set_msr(vcpu, msr & ~MSR_SE);
906 }
907 }
908
kvmppc_exit_pr_progint(struct kvm_run * run,struct kvm_vcpu * vcpu,unsigned int exit_nr)909 static int kvmppc_exit_pr_progint(struct kvm_run *run, struct kvm_vcpu *vcpu,
910 unsigned int exit_nr)
911 {
912 enum emulation_result er;
913 ulong flags;
914 u32 last_inst;
915 int emul, r;
916
917 /*
918 * shadow_srr1 only contains valid flags if we came here via a program
919 * exception. The other exceptions (emulation assist, FP unavailable,
920 * etc.) do not provide flags in SRR1, so use an illegal-instruction
921 * exception when injecting a program interrupt into the guest.
922 */
923 if (exit_nr == BOOK3S_INTERRUPT_PROGRAM)
924 flags = vcpu->arch.shadow_srr1 & 0x1f0000ull;
925 else
926 flags = SRR1_PROGILL;
927
928 emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
929 if (emul != EMULATE_DONE)
930 return RESUME_GUEST;
931
932 if (kvmppc_get_msr(vcpu) & MSR_PR) {
933 #ifdef EXIT_DEBUG
934 pr_info("Userspace triggered 0x700 exception at\n 0x%lx (0x%x)\n",
935 kvmppc_get_pc(vcpu), last_inst);
936 #endif
937 if ((last_inst & 0xff0007ff) != (INS_DCBZ & 0xfffffff7)) {
938 kvmppc_core_queue_program(vcpu, flags);
939 return RESUME_GUEST;
940 }
941 }
942
943 vcpu->stat.emulated_inst_exits++;
944 er = kvmppc_emulate_instruction(run, vcpu);
945 switch (er) {
946 case EMULATE_DONE:
947 r = RESUME_GUEST_NV;
948 break;
949 case EMULATE_AGAIN:
950 r = RESUME_GUEST;
951 break;
952 case EMULATE_FAIL:
953 pr_crit("%s: emulation at %lx failed (%08x)\n",
954 __func__, kvmppc_get_pc(vcpu), last_inst);
955 kvmppc_core_queue_program(vcpu, flags);
956 r = RESUME_GUEST;
957 break;
958 case EMULATE_DO_MMIO:
959 run->exit_reason = KVM_EXIT_MMIO;
960 r = RESUME_HOST_NV;
961 break;
962 case EMULATE_EXIT_USER:
963 r = RESUME_HOST_NV;
964 break;
965 default:
966 BUG();
967 }
968
969 return r;
970 }
971
kvmppc_handle_exit_pr(struct kvm_run * run,struct kvm_vcpu * vcpu,unsigned int exit_nr)972 int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
973 unsigned int exit_nr)
974 {
975 int r = RESUME_HOST;
976 int s;
977
978 vcpu->stat.sum_exits++;
979
980 run->exit_reason = KVM_EXIT_UNKNOWN;
981 run->ready_for_interrupt_injection = 1;
982
983 /* We get here with MSR.EE=1 */
984
985 trace_kvm_exit(exit_nr, vcpu);
986 guest_exit();
987
988 switch (exit_nr) {
989 case BOOK3S_INTERRUPT_INST_STORAGE:
990 {
991 ulong shadow_srr1 = vcpu->arch.shadow_srr1;
992 vcpu->stat.pf_instruc++;
993
994 if (kvmppc_is_split_real(vcpu))
995 kvmppc_fixup_split_real(vcpu);
996
997 #ifdef CONFIG_PPC_BOOK3S_32
998 /* We set segments as unused segments when invalidating them. So
999 * treat the respective fault as segment fault. */
1000 {
1001 struct kvmppc_book3s_shadow_vcpu *svcpu;
1002 u32 sr;
1003
1004 svcpu = svcpu_get(vcpu);
1005 sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT];
1006 svcpu_put(svcpu);
1007 if (sr == SR_INVALID) {
1008 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
1009 r = RESUME_GUEST;
1010 break;
1011 }
1012 }
1013 #endif
1014
1015 /* only care about PTEG not found errors, but leave NX alone */
1016 if (shadow_srr1 & 0x40000000) {
1017 int idx = srcu_read_lock(&vcpu->kvm->srcu);
1018 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
1019 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1020 vcpu->stat.sp_instruc++;
1021 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
1022 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
1023 /*
1024 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
1025 * so we can't use the NX bit inside the guest. Let's cross our fingers,
1026 * that no guest that needs the dcbz hack does NX.
1027 */
1028 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
1029 r = RESUME_GUEST;
1030 } else {
1031 u64 msr = kvmppc_get_msr(vcpu);
1032 msr |= shadow_srr1 & 0x58000000;
1033 kvmppc_set_msr_fast(vcpu, msr);
1034 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1035 r = RESUME_GUEST;
1036 }
1037 break;
1038 }
1039 case BOOK3S_INTERRUPT_DATA_STORAGE:
1040 {
1041 ulong dar = kvmppc_get_fault_dar(vcpu);
1042 u32 fault_dsisr = vcpu->arch.fault_dsisr;
1043 vcpu->stat.pf_storage++;
1044
1045 #ifdef CONFIG_PPC_BOOK3S_32
1046 /* We set segments as unused segments when invalidating them. So
1047 * treat the respective fault as segment fault. */
1048 {
1049 struct kvmppc_book3s_shadow_vcpu *svcpu;
1050 u32 sr;
1051
1052 svcpu = svcpu_get(vcpu);
1053 sr = svcpu->sr[dar >> SID_SHIFT];
1054 svcpu_put(svcpu);
1055 if (sr == SR_INVALID) {
1056 kvmppc_mmu_map_segment(vcpu, dar);
1057 r = RESUME_GUEST;
1058 break;
1059 }
1060 }
1061 #endif
1062
1063 /*
1064 * We need to handle missing shadow PTEs, and
1065 * protection faults due to us mapping a page read-only
1066 * when the guest thinks it is writable.
1067 */
1068 if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) {
1069 int idx = srcu_read_lock(&vcpu->kvm->srcu);
1070 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
1071 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1072 } else {
1073 kvmppc_set_dar(vcpu, dar);
1074 kvmppc_set_dsisr(vcpu, fault_dsisr);
1075 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1076 r = RESUME_GUEST;
1077 }
1078 break;
1079 }
1080 case BOOK3S_INTERRUPT_DATA_SEGMENT:
1081 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
1082 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
1083 kvmppc_book3s_queue_irqprio(vcpu,
1084 BOOK3S_INTERRUPT_DATA_SEGMENT);
1085 }
1086 r = RESUME_GUEST;
1087 break;
1088 case BOOK3S_INTERRUPT_INST_SEGMENT:
1089 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
1090 kvmppc_book3s_queue_irqprio(vcpu,
1091 BOOK3S_INTERRUPT_INST_SEGMENT);
1092 }
1093 r = RESUME_GUEST;
1094 break;
1095 /* We're good on these - the host merely wanted to get our attention */
1096 case BOOK3S_INTERRUPT_DECREMENTER:
1097 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1098 case BOOK3S_INTERRUPT_DOORBELL:
1099 case BOOK3S_INTERRUPT_H_DOORBELL:
1100 vcpu->stat.dec_exits++;
1101 r = RESUME_GUEST;
1102 break;
1103 case BOOK3S_INTERRUPT_EXTERNAL:
1104 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
1105 case BOOK3S_INTERRUPT_EXTERNAL_HV:
1106 vcpu->stat.ext_intr_exits++;
1107 r = RESUME_GUEST;
1108 break;
1109 case BOOK3S_INTERRUPT_PERFMON:
1110 r = RESUME_GUEST;
1111 break;
1112 case BOOK3S_INTERRUPT_PROGRAM:
1113 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1114 r = kvmppc_exit_pr_progint(run, vcpu, exit_nr);
1115 break;
1116 case BOOK3S_INTERRUPT_SYSCALL:
1117 {
1118 u32 last_sc;
1119 int emul;
1120
1121 /* Get last sc for papr */
1122 if (vcpu->arch.papr_enabled) {
1123 /* The sc instuction points SRR0 to the next inst */
1124 emul = kvmppc_get_last_inst(vcpu, INST_SC, &last_sc);
1125 if (emul != EMULATE_DONE) {
1126 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) - 4);
1127 r = RESUME_GUEST;
1128 break;
1129 }
1130 }
1131
1132 if (vcpu->arch.papr_enabled &&
1133 (last_sc == 0x44000022) &&
1134 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
1135 /* SC 1 papr hypercalls */
1136 ulong cmd = kvmppc_get_gpr(vcpu, 3);
1137 int i;
1138
1139 #ifdef CONFIG_PPC_BOOK3S_64
1140 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
1141 r = RESUME_GUEST;
1142 break;
1143 }
1144 #endif
1145
1146 run->papr_hcall.nr = cmd;
1147 for (i = 0; i < 9; ++i) {
1148 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
1149 run->papr_hcall.args[i] = gpr;
1150 }
1151 run->exit_reason = KVM_EXIT_PAPR_HCALL;
1152 vcpu->arch.hcall_needed = 1;
1153 r = RESUME_HOST;
1154 } else if (vcpu->arch.osi_enabled &&
1155 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
1156 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
1157 /* MOL hypercalls */
1158 u64 *gprs = run->osi.gprs;
1159 int i;
1160
1161 run->exit_reason = KVM_EXIT_OSI;
1162 for (i = 0; i < 32; i++)
1163 gprs[i] = kvmppc_get_gpr(vcpu, i);
1164 vcpu->arch.osi_needed = 1;
1165 r = RESUME_HOST_NV;
1166 } else if (!(kvmppc_get_msr(vcpu) & MSR_PR) &&
1167 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1168 /* KVM PV hypercalls */
1169 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1170 r = RESUME_GUEST;
1171 } else {
1172 /* Guest syscalls */
1173 vcpu->stat.syscall_exits++;
1174 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1175 r = RESUME_GUEST;
1176 }
1177 break;
1178 }
1179 case BOOK3S_INTERRUPT_FP_UNAVAIL:
1180 case BOOK3S_INTERRUPT_ALTIVEC:
1181 case BOOK3S_INTERRUPT_VSX:
1182 {
1183 int ext_msr = 0;
1184 int emul;
1185 u32 last_inst;
1186
1187 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) {
1188 /* Do paired single instruction emulation */
1189 emul = kvmppc_get_last_inst(vcpu, INST_GENERIC,
1190 &last_inst);
1191 if (emul == EMULATE_DONE)
1192 r = kvmppc_exit_pr_progint(run, vcpu, exit_nr);
1193 else
1194 r = RESUME_GUEST;
1195
1196 break;
1197 }
1198
1199 /* Enable external provider */
1200 switch (exit_nr) {
1201 case BOOK3S_INTERRUPT_FP_UNAVAIL:
1202 ext_msr = MSR_FP;
1203 break;
1204
1205 case BOOK3S_INTERRUPT_ALTIVEC:
1206 ext_msr = MSR_VEC;
1207 break;
1208
1209 case BOOK3S_INTERRUPT_VSX:
1210 ext_msr = MSR_VSX;
1211 break;
1212 }
1213
1214 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
1215 break;
1216 }
1217 case BOOK3S_INTERRUPT_ALIGNMENT:
1218 {
1219 u32 last_inst;
1220 int emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1221
1222 if (emul == EMULATE_DONE) {
1223 u32 dsisr;
1224 u64 dar;
1225
1226 dsisr = kvmppc_alignment_dsisr(vcpu, last_inst);
1227 dar = kvmppc_alignment_dar(vcpu, last_inst);
1228
1229 kvmppc_set_dsisr(vcpu, dsisr);
1230 kvmppc_set_dar(vcpu, dar);
1231
1232 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1233 }
1234 r = RESUME_GUEST;
1235 break;
1236 }
1237 #ifdef CONFIG_PPC_BOOK3S_64
1238 case BOOK3S_INTERRUPT_FAC_UNAVAIL:
1239 kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56);
1240 r = RESUME_GUEST;
1241 break;
1242 #endif
1243 case BOOK3S_INTERRUPT_MACHINE_CHECK:
1244 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1245 r = RESUME_GUEST;
1246 break;
1247 case BOOK3S_INTERRUPT_TRACE:
1248 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
1249 run->exit_reason = KVM_EXIT_DEBUG;
1250 r = RESUME_HOST;
1251 } else {
1252 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1253 r = RESUME_GUEST;
1254 }
1255 break;
1256 default:
1257 {
1258 ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1259 /* Ugh - bork here! What did we get? */
1260 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
1261 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
1262 r = RESUME_HOST;
1263 BUG();
1264 break;
1265 }
1266 }
1267
1268 if (!(r & RESUME_HOST)) {
1269 /* To avoid clobbering exit_reason, only check for signals if
1270 * we aren't already exiting to userspace for some other
1271 * reason. */
1272
1273 /*
1274 * Interrupts could be timers for the guest which we have to
1275 * inject again, so let's postpone them until we're in the guest
1276 * and if we really did time things so badly, then we just exit
1277 * again due to a host external interrupt.
1278 */
1279 s = kvmppc_prepare_to_enter(vcpu);
1280 if (s <= 0)
1281 r = s;
1282 else {
1283 /* interrupts now hard-disabled */
1284 kvmppc_fix_ee_before_entry();
1285 }
1286
1287 kvmppc_handle_lost_ext(vcpu);
1288 }
1289
1290 trace_kvm_book3s_reenter(r, vcpu);
1291
1292 return r;
1293 }
1294
kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1295 static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu,
1296 struct kvm_sregs *sregs)
1297 {
1298 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
1299 int i;
1300
1301 sregs->pvr = vcpu->arch.pvr;
1302
1303 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
1304 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1305 for (i = 0; i < 64; i++) {
1306 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
1307 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1308 }
1309 } else {
1310 for (i = 0; i < 16; i++)
1311 sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i);
1312
1313 for (i = 0; i < 8; i++) {
1314 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
1315 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
1316 }
1317 }
1318
1319 return 0;
1320 }
1321
kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1322 static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu,
1323 struct kvm_sregs *sregs)
1324 {
1325 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
1326 int i;
1327
1328 kvmppc_set_pvr_pr(vcpu, sregs->pvr);
1329
1330 vcpu3s->sdr1 = sregs->u.s.sdr1;
1331 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1332 for (i = 0; i < 64; i++) {
1333 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
1334 sregs->u.s.ppc64.slb[i].slbe);
1335 }
1336 } else {
1337 for (i = 0; i < 16; i++) {
1338 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
1339 }
1340 for (i = 0; i < 8; i++) {
1341 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
1342 (u32)sregs->u.s.ppc32.ibat[i]);
1343 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
1344 (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
1345 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
1346 (u32)sregs->u.s.ppc32.dbat[i]);
1347 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
1348 (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
1349 }
1350 }
1351
1352 /* Flush the MMU after messing with the segments */
1353 kvmppc_mmu_pte_flush(vcpu, 0, 0);
1354
1355 return 0;
1356 }
1357
kvmppc_get_one_reg_pr(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)1358 static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
1359 union kvmppc_one_reg *val)
1360 {
1361 int r = 0;
1362
1363 switch (id) {
1364 case KVM_REG_PPC_DEBUG_INST:
1365 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1366 break;
1367 case KVM_REG_PPC_HIOR:
1368 *val = get_reg_val(id, to_book3s(vcpu)->hior);
1369 break;
1370 case KVM_REG_PPC_VTB:
1371 *val = get_reg_val(id, to_book3s(vcpu)->vtb);
1372 break;
1373 case KVM_REG_PPC_LPCR:
1374 case KVM_REG_PPC_LPCR_64:
1375 /*
1376 * We are only interested in the LPCR_ILE bit
1377 */
1378 if (vcpu->arch.intr_msr & MSR_LE)
1379 *val = get_reg_val(id, LPCR_ILE);
1380 else
1381 *val = get_reg_val(id, 0);
1382 break;
1383 default:
1384 r = -EINVAL;
1385 break;
1386 }
1387
1388 return r;
1389 }
1390
kvmppc_set_lpcr_pr(struct kvm_vcpu * vcpu,u64 new_lpcr)1391 static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
1392 {
1393 if (new_lpcr & LPCR_ILE)
1394 vcpu->arch.intr_msr |= MSR_LE;
1395 else
1396 vcpu->arch.intr_msr &= ~MSR_LE;
1397 }
1398
kvmppc_set_one_reg_pr(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)1399 static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
1400 union kvmppc_one_reg *val)
1401 {
1402 int r = 0;
1403
1404 switch (id) {
1405 case KVM_REG_PPC_HIOR:
1406 to_book3s(vcpu)->hior = set_reg_val(id, *val);
1407 to_book3s(vcpu)->hior_explicit = true;
1408 break;
1409 case KVM_REG_PPC_VTB:
1410 to_book3s(vcpu)->vtb = set_reg_val(id, *val);
1411 break;
1412 case KVM_REG_PPC_LPCR:
1413 case KVM_REG_PPC_LPCR_64:
1414 kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val));
1415 break;
1416 default:
1417 r = -EINVAL;
1418 break;
1419 }
1420
1421 return r;
1422 }
1423
kvmppc_core_vcpu_create_pr(struct kvm * kvm,unsigned int id)1424 static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
1425 unsigned int id)
1426 {
1427 struct kvmppc_vcpu_book3s *vcpu_book3s;
1428 struct kvm_vcpu *vcpu;
1429 int err = -ENOMEM;
1430 unsigned long p;
1431
1432 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
1433 if (!vcpu)
1434 goto out;
1435
1436 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
1437 if (!vcpu_book3s)
1438 goto free_vcpu;
1439 vcpu->arch.book3s = vcpu_book3s;
1440
1441 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1442 vcpu->arch.shadow_vcpu =
1443 kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL);
1444 if (!vcpu->arch.shadow_vcpu)
1445 goto free_vcpu3s;
1446 #endif
1447
1448 err = kvm_vcpu_init(vcpu, kvm, id);
1449 if (err)
1450 goto free_shadow_vcpu;
1451
1452 err = -ENOMEM;
1453 p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
1454 if (!p)
1455 goto uninit_vcpu;
1456 vcpu->arch.shared = (void *)p;
1457 #ifdef CONFIG_PPC_BOOK3S_64
1458 /* Always start the shared struct in native endian mode */
1459 #ifdef __BIG_ENDIAN__
1460 vcpu->arch.shared_big_endian = true;
1461 #else
1462 vcpu->arch.shared_big_endian = false;
1463 #endif
1464
1465 /*
1466 * Default to the same as the host if we're on sufficiently
1467 * recent machine that we have 1TB segments;
1468 * otherwise default to PPC970FX.
1469 */
1470 vcpu->arch.pvr = 0x3C0301;
1471 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
1472 vcpu->arch.pvr = mfspr(SPRN_PVR);
1473 vcpu->arch.intr_msr = MSR_SF;
1474 #else
1475 /* default to book3s_32 (750) */
1476 vcpu->arch.pvr = 0x84202;
1477 #endif
1478 kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr);
1479 vcpu->arch.slb_nr = 64;
1480
1481 vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE;
1482
1483 err = kvmppc_mmu_init(vcpu);
1484 if (err < 0)
1485 goto free_shared_page;
1486
1487 return vcpu;
1488
1489 free_shared_page:
1490 free_page((unsigned long)vcpu->arch.shared);
1491 uninit_vcpu:
1492 kvm_vcpu_uninit(vcpu);
1493 free_shadow_vcpu:
1494 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1495 kfree(vcpu->arch.shadow_vcpu);
1496 free_vcpu3s:
1497 #endif
1498 vfree(vcpu_book3s);
1499 free_vcpu:
1500 kmem_cache_free(kvm_vcpu_cache, vcpu);
1501 out:
1502 return ERR_PTR(err);
1503 }
1504
kvmppc_core_vcpu_free_pr(struct kvm_vcpu * vcpu)1505 static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
1506 {
1507 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
1508
1509 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
1510 kvm_vcpu_uninit(vcpu);
1511 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1512 kfree(vcpu->arch.shadow_vcpu);
1513 #endif
1514 vfree(vcpu_book3s);
1515 kmem_cache_free(kvm_vcpu_cache, vcpu);
1516 }
1517
kvmppc_vcpu_run_pr(struct kvm_run * kvm_run,struct kvm_vcpu * vcpu)1518 static int kvmppc_vcpu_run_pr(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1519 {
1520 int ret;
1521 #ifdef CONFIG_ALTIVEC
1522 unsigned long uninitialized_var(vrsave);
1523 #endif
1524
1525 /* Check if we can run the vcpu at all */
1526 if (!vcpu->arch.sane) {
1527 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1528 ret = -EINVAL;
1529 goto out;
1530 }
1531
1532 kvmppc_setup_debug(vcpu);
1533
1534 /*
1535 * Interrupts could be timers for the guest which we have to inject
1536 * again, so let's postpone them until we're in the guest and if we
1537 * really did time things so badly, then we just exit again due to
1538 * a host external interrupt.
1539 */
1540 ret = kvmppc_prepare_to_enter(vcpu);
1541 if (ret <= 0)
1542 goto out;
1543 /* interrupts now hard-disabled */
1544
1545 /* Save FPU, Altivec and VSX state */
1546 giveup_all(current);
1547
1548 /* Preload FPU if it's enabled */
1549 if (kvmppc_get_msr(vcpu) & MSR_FP)
1550 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
1551
1552 kvmppc_fix_ee_before_entry();
1553
1554 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
1555
1556 kvmppc_clear_debug(vcpu);
1557
1558 /* No need for guest_exit. It's done in handle_exit.
1559 We also get here with interrupts enabled. */
1560
1561 /* Make sure we save the guest FPU/Altivec/VSX state */
1562 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
1563
1564 /* Make sure we save the guest TAR/EBB/DSCR state */
1565 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
1566
1567 out:
1568 vcpu->mode = OUTSIDE_GUEST_MODE;
1569 return ret;
1570 }
1571
1572 /*
1573 * Get (and clear) the dirty memory log for a memory slot.
1574 */
kvm_vm_ioctl_get_dirty_log_pr(struct kvm * kvm,struct kvm_dirty_log * log)1575 static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,
1576 struct kvm_dirty_log *log)
1577 {
1578 struct kvm_memslots *slots;
1579 struct kvm_memory_slot *memslot;
1580 struct kvm_vcpu *vcpu;
1581 ulong ga, ga_end;
1582 int is_dirty = 0;
1583 int r;
1584 unsigned long n;
1585
1586 mutex_lock(&kvm->slots_lock);
1587
1588 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1589 if (r)
1590 goto out;
1591
1592 /* If nothing is dirty, don't bother messing with page tables. */
1593 if (is_dirty) {
1594 slots = kvm_memslots(kvm);
1595 memslot = id_to_memslot(slots, log->slot);
1596
1597 ga = memslot->base_gfn << PAGE_SHIFT;
1598 ga_end = ga + (memslot->npages << PAGE_SHIFT);
1599
1600 kvm_for_each_vcpu(n, vcpu, kvm)
1601 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
1602
1603 n = kvm_dirty_bitmap_bytes(memslot);
1604 memset(memslot->dirty_bitmap, 0, n);
1605 }
1606
1607 r = 0;
1608 out:
1609 mutex_unlock(&kvm->slots_lock);
1610 return r;
1611 }
1612
kvmppc_core_flush_memslot_pr(struct kvm * kvm,struct kvm_memory_slot * memslot)1613 static void kvmppc_core_flush_memslot_pr(struct kvm *kvm,
1614 struct kvm_memory_slot *memslot)
1615 {
1616 return;
1617 }
1618
kvmppc_core_prepare_memory_region_pr(struct kvm * kvm,struct kvm_memory_slot * memslot,const struct kvm_userspace_memory_region * mem)1619 static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm,
1620 struct kvm_memory_slot *memslot,
1621 const struct kvm_userspace_memory_region *mem)
1622 {
1623 return 0;
1624 }
1625
kvmppc_core_commit_memory_region_pr(struct kvm * kvm,const struct kvm_userspace_memory_region * mem,const struct kvm_memory_slot * old,const struct kvm_memory_slot * new)1626 static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm,
1627 const struct kvm_userspace_memory_region *mem,
1628 const struct kvm_memory_slot *old,
1629 const struct kvm_memory_slot *new)
1630 {
1631 return;
1632 }
1633
kvmppc_core_free_memslot_pr(struct kvm_memory_slot * free,struct kvm_memory_slot * dont)1634 static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *free,
1635 struct kvm_memory_slot *dont)
1636 {
1637 return;
1638 }
1639
kvmppc_core_create_memslot_pr(struct kvm_memory_slot * slot,unsigned long npages)1640 static int kvmppc_core_create_memslot_pr(struct kvm_memory_slot *slot,
1641 unsigned long npages)
1642 {
1643 return 0;
1644 }
1645
1646
1647 #ifdef CONFIG_PPC64
kvm_vm_ioctl_get_smmu_info_pr(struct kvm * kvm,struct kvm_ppc_smmu_info * info)1648 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
1649 struct kvm_ppc_smmu_info *info)
1650 {
1651 long int i;
1652 struct kvm_vcpu *vcpu;
1653
1654 info->flags = 0;
1655
1656 /* SLB is always 64 entries */
1657 info->slb_size = 64;
1658
1659 /* Standard 4k base page size segment */
1660 info->sps[0].page_shift = 12;
1661 info->sps[0].slb_enc = 0;
1662 info->sps[0].enc[0].page_shift = 12;
1663 info->sps[0].enc[0].pte_enc = 0;
1664
1665 /*
1666 * 64k large page size.
1667 * We only want to put this in if the CPUs we're emulating
1668 * support it, but unfortunately we don't have a vcpu easily
1669 * to hand here to test. Just pick the first vcpu, and if
1670 * that doesn't exist yet, report the minimum capability,
1671 * i.e., no 64k pages.
1672 * 1T segment support goes along with 64k pages.
1673 */
1674 i = 1;
1675 vcpu = kvm_get_vcpu(kvm, 0);
1676 if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
1677 info->flags = KVM_PPC_1T_SEGMENTS;
1678 info->sps[i].page_shift = 16;
1679 info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01;
1680 info->sps[i].enc[0].page_shift = 16;
1681 info->sps[i].enc[0].pte_enc = 1;
1682 ++i;
1683 }
1684
1685 /* Standard 16M large page size segment */
1686 info->sps[i].page_shift = 24;
1687 info->sps[i].slb_enc = SLB_VSID_L;
1688 info->sps[i].enc[0].page_shift = 24;
1689 info->sps[i].enc[0].pte_enc = 0;
1690
1691 return 0;
1692 }
1693 #else
kvm_vm_ioctl_get_smmu_info_pr(struct kvm * kvm,struct kvm_ppc_smmu_info * info)1694 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
1695 struct kvm_ppc_smmu_info *info)
1696 {
1697 /* We should not get called */
1698 BUG();
1699 }
1700 #endif /* CONFIG_PPC64 */
1701
1702 static unsigned int kvm_global_user_count = 0;
1703 static DEFINE_SPINLOCK(kvm_global_user_count_lock);
1704
kvmppc_core_init_vm_pr(struct kvm * kvm)1705 static int kvmppc_core_init_vm_pr(struct kvm *kvm)
1706 {
1707 mutex_init(&kvm->arch.hpt_mutex);
1708
1709 #ifdef CONFIG_PPC_BOOK3S_64
1710 /* Start out with the default set of hcalls enabled */
1711 kvmppc_pr_init_default_hcalls(kvm);
1712 #endif
1713
1714 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1715 spin_lock(&kvm_global_user_count_lock);
1716 if (++kvm_global_user_count == 1)
1717 pseries_disable_reloc_on_exc();
1718 spin_unlock(&kvm_global_user_count_lock);
1719 }
1720 return 0;
1721 }
1722
kvmppc_core_destroy_vm_pr(struct kvm * kvm)1723 static void kvmppc_core_destroy_vm_pr(struct kvm *kvm)
1724 {
1725 #ifdef CONFIG_PPC64
1726 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
1727 #endif
1728
1729 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1730 spin_lock(&kvm_global_user_count_lock);
1731 BUG_ON(kvm_global_user_count == 0);
1732 if (--kvm_global_user_count == 0)
1733 pseries_enable_reloc_on_exc();
1734 spin_unlock(&kvm_global_user_count_lock);
1735 }
1736 }
1737
kvmppc_core_check_processor_compat_pr(void)1738 static int kvmppc_core_check_processor_compat_pr(void)
1739 {
1740 /*
1741 * Disable KVM for Power9 untill the required bits merged.
1742 */
1743 if (cpu_has_feature(CPU_FTR_ARCH_300))
1744 return -EIO;
1745 return 0;
1746 }
1747
kvm_arch_vm_ioctl_pr(struct file * filp,unsigned int ioctl,unsigned long arg)1748 static long kvm_arch_vm_ioctl_pr(struct file *filp,
1749 unsigned int ioctl, unsigned long arg)
1750 {
1751 return -ENOTTY;
1752 }
1753
1754 static struct kvmppc_ops kvm_ops_pr = {
1755 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
1756 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
1757 .get_one_reg = kvmppc_get_one_reg_pr,
1758 .set_one_reg = kvmppc_set_one_reg_pr,
1759 .vcpu_load = kvmppc_core_vcpu_load_pr,
1760 .vcpu_put = kvmppc_core_vcpu_put_pr,
1761 .set_msr = kvmppc_set_msr_pr,
1762 .vcpu_run = kvmppc_vcpu_run_pr,
1763 .vcpu_create = kvmppc_core_vcpu_create_pr,
1764 .vcpu_free = kvmppc_core_vcpu_free_pr,
1765 .check_requests = kvmppc_core_check_requests_pr,
1766 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr,
1767 .flush_memslot = kvmppc_core_flush_memslot_pr,
1768 .prepare_memory_region = kvmppc_core_prepare_memory_region_pr,
1769 .commit_memory_region = kvmppc_core_commit_memory_region_pr,
1770 .unmap_hva = kvm_unmap_hva_pr,
1771 .unmap_hva_range = kvm_unmap_hva_range_pr,
1772 .age_hva = kvm_age_hva_pr,
1773 .test_age_hva = kvm_test_age_hva_pr,
1774 .set_spte_hva = kvm_set_spte_hva_pr,
1775 .mmu_destroy = kvmppc_mmu_destroy_pr,
1776 .free_memslot = kvmppc_core_free_memslot_pr,
1777 .create_memslot = kvmppc_core_create_memslot_pr,
1778 .init_vm = kvmppc_core_init_vm_pr,
1779 .destroy_vm = kvmppc_core_destroy_vm_pr,
1780 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr,
1781 .emulate_op = kvmppc_core_emulate_op_pr,
1782 .emulate_mtspr = kvmppc_core_emulate_mtspr_pr,
1783 .emulate_mfspr = kvmppc_core_emulate_mfspr_pr,
1784 .fast_vcpu_kick = kvm_vcpu_kick,
1785 .arch_vm_ioctl = kvm_arch_vm_ioctl_pr,
1786 #ifdef CONFIG_PPC_BOOK3S_64
1787 .hcall_implemented = kvmppc_hcall_impl_pr,
1788 #endif
1789 };
1790
1791
kvmppc_book3s_init_pr(void)1792 int kvmppc_book3s_init_pr(void)
1793 {
1794 int r;
1795
1796 r = kvmppc_core_check_processor_compat_pr();
1797 if (r < 0)
1798 return r;
1799
1800 kvm_ops_pr.owner = THIS_MODULE;
1801 kvmppc_pr_ops = &kvm_ops_pr;
1802
1803 r = kvmppc_mmu_hpte_sysinit();
1804 return r;
1805 }
1806
kvmppc_book3s_exit_pr(void)1807 void kvmppc_book3s_exit_pr(void)
1808 {
1809 kvmppc_pr_ops = NULL;
1810 kvmppc_mmu_hpte_sysexit();
1811 }
1812
1813 /*
1814 * We only support separate modules for book3s 64
1815 */
1816 #ifdef CONFIG_PPC_BOOK3S_64
1817
1818 module_init(kvmppc_book3s_init_pr);
1819 module_exit(kvmppc_book3s_exit_pr);
1820
1821 MODULE_LICENSE("GPL");
1822 MODULE_ALIAS_MISCDEV(KVM_MINOR);
1823 MODULE_ALIAS("devname:kvm");
1824 #endif
1825