1 /*
2 * Copyright 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, version 2, as
6 * published by the Free Software Foundation (the "GPL").
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License version 2 (GPLv2) for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * version 2 (GPLv2) along with this source code.
15 */
16
17 #include <linux/err.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/errno.h>
21 #include <linux/kernel.h>
22 #include <linux/interrupt.h>
23 #include <linux/platform_device.h>
24 #include <linux/scatterlist.h>
25 #include <linux/crypto.h>
26 #include <linux/kthread.h>
27 #include <linux/rtnetlink.h>
28 #include <linux/sched.h>
29 #include <linux/of_address.h>
30 #include <linux/of_device.h>
31 #include <linux/io.h>
32 #include <linux/bitops.h>
33
34 #include <crypto/algapi.h>
35 #include <crypto/aead.h>
36 #include <crypto/internal/aead.h>
37 #include <crypto/aes.h>
38 #include <crypto/des.h>
39 #include <crypto/hmac.h>
40 #include <crypto/sha.h>
41 #include <crypto/md5.h>
42 #include <crypto/authenc.h>
43 #include <crypto/skcipher.h>
44 #include <crypto/hash.h>
45 #include <crypto/aes.h>
46 #include <crypto/sha3.h>
47
48 #include "util.h"
49 #include "cipher.h"
50 #include "spu.h"
51 #include "spum.h"
52 #include "spu2.h"
53
54 /* ================= Device Structure ================== */
55
56 struct device_private iproc_priv;
57
58 /* ==================== Parameters ===================== */
59
60 int flow_debug_logging;
61 module_param(flow_debug_logging, int, 0644);
62 MODULE_PARM_DESC(flow_debug_logging, "Enable Flow Debug Logging");
63
64 int packet_debug_logging;
65 module_param(packet_debug_logging, int, 0644);
66 MODULE_PARM_DESC(packet_debug_logging, "Enable Packet Debug Logging");
67
68 int debug_logging_sleep;
69 module_param(debug_logging_sleep, int, 0644);
70 MODULE_PARM_DESC(debug_logging_sleep, "Packet Debug Logging Sleep");
71
72 /*
73 * The value of these module parameters is used to set the priority for each
74 * algo type when this driver registers algos with the kernel crypto API.
75 * To use a priority other than the default, set the priority in the insmod or
76 * modprobe. Changing the module priority after init time has no effect.
77 *
78 * The default priorities are chosen to be lower (less preferred) than ARMv8 CE
79 * algos, but more preferred than generic software algos.
80 */
81 static int cipher_pri = 150;
82 module_param(cipher_pri, int, 0644);
83 MODULE_PARM_DESC(cipher_pri, "Priority for cipher algos");
84
85 static int hash_pri = 100;
86 module_param(hash_pri, int, 0644);
87 MODULE_PARM_DESC(hash_pri, "Priority for hash algos");
88
89 static int aead_pri = 150;
90 module_param(aead_pri, int, 0644);
91 MODULE_PARM_DESC(aead_pri, "Priority for AEAD algos");
92
93 /* A type 3 BCM header, expected to precede the SPU header for SPU-M.
94 * Bits 3 and 4 in the first byte encode the channel number (the dma ringset).
95 * 0x60 - ring 0
96 * 0x68 - ring 1
97 * 0x70 - ring 2
98 * 0x78 - ring 3
99 */
100 char BCMHEADER[] = { 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28 };
101 /*
102 * Some SPU hw does not use BCM header on SPU messages. So BCM_HDR_LEN
103 * is set dynamically after reading SPU type from device tree.
104 */
105 #define BCM_HDR_LEN iproc_priv.bcm_hdr_len
106
107 /* min and max time to sleep before retrying when mbox queue is full. usec */
108 #define MBOX_SLEEP_MIN 800
109 #define MBOX_SLEEP_MAX 1000
110
111 /**
112 * select_channel() - Select a SPU channel to handle a crypto request. Selects
113 * channel in round robin order.
114 *
115 * Return: channel index
116 */
select_channel(void)117 static u8 select_channel(void)
118 {
119 u8 chan_idx = atomic_inc_return(&iproc_priv.next_chan);
120
121 return chan_idx % iproc_priv.spu.num_chan;
122 }
123
124 /**
125 * spu_ablkcipher_rx_sg_create() - Build up the scatterlist of buffers used to
126 * receive a SPU response message for an ablkcipher request. Includes buffers to
127 * catch SPU message headers and the response data.
128 * @mssg: mailbox message containing the receive sg
129 * @rctx: crypto request context
130 * @rx_frag_num: number of scatterlist elements required to hold the
131 * SPU response message
132 * @chunksize: Number of bytes of response data expected
133 * @stat_pad_len: Number of bytes required to pad the STAT field to
134 * a 4-byte boundary
135 *
136 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
137 * when the request completes, whether the request is handled successfully or
138 * there is an error.
139 *
140 * Returns:
141 * 0 if successful
142 * < 0 if an error
143 */
144 static int
spu_ablkcipher_rx_sg_create(struct brcm_message * mssg,struct iproc_reqctx_s * rctx,u8 rx_frag_num,unsigned int chunksize,u32 stat_pad_len)145 spu_ablkcipher_rx_sg_create(struct brcm_message *mssg,
146 struct iproc_reqctx_s *rctx,
147 u8 rx_frag_num,
148 unsigned int chunksize, u32 stat_pad_len)
149 {
150 struct spu_hw *spu = &iproc_priv.spu;
151 struct scatterlist *sg; /* used to build sgs in mbox message */
152 struct iproc_ctx_s *ctx = rctx->ctx;
153 u32 datalen; /* Number of bytes of response data expected */
154
155 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
156 rctx->gfp);
157 if (!mssg->spu.dst)
158 return -ENOMEM;
159
160 sg = mssg->spu.dst;
161 sg_init_table(sg, rx_frag_num);
162 /* Space for SPU message header */
163 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
164
165 /* If XTS tweak in payload, add buffer to receive encrypted tweak */
166 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
167 spu->spu_xts_tweak_in_payload())
168 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak,
169 SPU_XTS_TWEAK_SIZE);
170
171 /* Copy in each dst sg entry from request, up to chunksize */
172 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
173 rctx->dst_nents, chunksize);
174 if (datalen < chunksize) {
175 pr_err("%s(): failed to copy dst sg to mbox msg. chunksize %u, datalen %u",
176 __func__, chunksize, datalen);
177 return -EFAULT;
178 }
179
180 if (ctx->cipher.alg == CIPHER_ALG_RC4)
181 /* Add buffer to catch 260-byte SUPDT field for RC4 */
182 sg_set_buf(sg++, rctx->msg_buf.c.supdt_tweak, SPU_SUPDT_LEN);
183
184 if (stat_pad_len)
185 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
186
187 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
188 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
189
190 return 0;
191 }
192
193 /**
194 * spu_ablkcipher_tx_sg_create() - Build up the scatterlist of buffers used to
195 * send a SPU request message for an ablkcipher request. Includes SPU message
196 * headers and the request data.
197 * @mssg: mailbox message containing the transmit sg
198 * @rctx: crypto request context
199 * @tx_frag_num: number of scatterlist elements required to construct the
200 * SPU request message
201 * @chunksize: Number of bytes of request data
202 * @pad_len: Number of pad bytes
203 *
204 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
205 * when the request completes, whether the request is handled successfully or
206 * there is an error.
207 *
208 * Returns:
209 * 0 if successful
210 * < 0 if an error
211 */
212 static int
spu_ablkcipher_tx_sg_create(struct brcm_message * mssg,struct iproc_reqctx_s * rctx,u8 tx_frag_num,unsigned int chunksize,u32 pad_len)213 spu_ablkcipher_tx_sg_create(struct brcm_message *mssg,
214 struct iproc_reqctx_s *rctx,
215 u8 tx_frag_num, unsigned int chunksize, u32 pad_len)
216 {
217 struct spu_hw *spu = &iproc_priv.spu;
218 struct scatterlist *sg; /* used to build sgs in mbox message */
219 struct iproc_ctx_s *ctx = rctx->ctx;
220 u32 datalen; /* Number of bytes of response data expected */
221 u32 stat_len;
222
223 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
224 rctx->gfp);
225 if (unlikely(!mssg->spu.src))
226 return -ENOMEM;
227
228 sg = mssg->spu.src;
229 sg_init_table(sg, tx_frag_num);
230
231 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
232 BCM_HDR_LEN + ctx->spu_req_hdr_len);
233
234 /* if XTS tweak in payload, copy from IV (where crypto API puts it) */
235 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
236 spu->spu_xts_tweak_in_payload())
237 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, SPU_XTS_TWEAK_SIZE);
238
239 /* Copy in each src sg entry from request, up to chunksize */
240 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
241 rctx->src_nents, chunksize);
242 if (unlikely(datalen < chunksize)) {
243 pr_err("%s(): failed to copy src sg to mbox msg",
244 __func__);
245 return -EFAULT;
246 }
247
248 if (pad_len)
249 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
250
251 stat_len = spu->spu_tx_status_len();
252 if (stat_len) {
253 memset(rctx->msg_buf.tx_stat, 0, stat_len);
254 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
255 }
256 return 0;
257 }
258
mailbox_send_message(struct brcm_message * mssg,u32 flags,u8 chan_idx)259 static int mailbox_send_message(struct brcm_message *mssg, u32 flags,
260 u8 chan_idx)
261 {
262 int err;
263 int retry_cnt = 0;
264 struct device *dev = &(iproc_priv.pdev->dev);
265
266 err = mbox_send_message(iproc_priv.mbox[chan_idx], mssg);
267 if (flags & CRYPTO_TFM_REQ_MAY_SLEEP) {
268 while ((err == -ENOBUFS) && (retry_cnt < SPU_MB_RETRY_MAX)) {
269 /*
270 * Mailbox queue is full. Since MAY_SLEEP is set, assume
271 * not in atomic context and we can wait and try again.
272 */
273 retry_cnt++;
274 usleep_range(MBOX_SLEEP_MIN, MBOX_SLEEP_MAX);
275 err = mbox_send_message(iproc_priv.mbox[chan_idx],
276 mssg);
277 atomic_inc(&iproc_priv.mb_no_spc);
278 }
279 }
280 if (err < 0) {
281 atomic_inc(&iproc_priv.mb_send_fail);
282 return err;
283 }
284
285 /* Check error returned by mailbox controller */
286 err = mssg->error;
287 if (unlikely(err < 0)) {
288 dev_err(dev, "message error %d", err);
289 /* Signal txdone for mailbox channel */
290 }
291
292 /* Signal txdone for mailbox channel */
293 mbox_client_txdone(iproc_priv.mbox[chan_idx], err);
294 return err;
295 }
296
297 /**
298 * handle_ablkcipher_req() - Submit as much of a block cipher request as fits in
299 * a single SPU request message, starting at the current position in the request
300 * data.
301 * @rctx: Crypto request context
302 *
303 * This may be called on the crypto API thread, or, when a request is so large
304 * it must be broken into multiple SPU messages, on the thread used to invoke
305 * the response callback. When requests are broken into multiple SPU
306 * messages, we assume subsequent messages depend on previous results, and
307 * thus always wait for previous results before submitting the next message.
308 * Because requests are submitted in lock step like this, there is no need
309 * to synchronize access to request data structures.
310 *
311 * Return: -EINPROGRESS: request has been accepted and result will be returned
312 * asynchronously
313 * Any other value indicates an error
314 */
handle_ablkcipher_req(struct iproc_reqctx_s * rctx)315 static int handle_ablkcipher_req(struct iproc_reqctx_s *rctx)
316 {
317 struct spu_hw *spu = &iproc_priv.spu;
318 struct crypto_async_request *areq = rctx->parent;
319 struct ablkcipher_request *req =
320 container_of(areq, struct ablkcipher_request, base);
321 struct iproc_ctx_s *ctx = rctx->ctx;
322 struct spu_cipher_parms cipher_parms;
323 int err = 0;
324 unsigned int chunksize = 0; /* Num bytes of request to submit */
325 int remaining = 0; /* Bytes of request still to process */
326 int chunk_start; /* Beginning of data for current SPU msg */
327
328 /* IV or ctr value to use in this SPU msg */
329 u8 local_iv_ctr[MAX_IV_SIZE];
330 u32 stat_pad_len; /* num bytes to align status field */
331 u32 pad_len; /* total length of all padding */
332 bool update_key = false;
333 struct brcm_message *mssg; /* mailbox message */
334
335 /* number of entries in src and dst sg in mailbox message. */
336 u8 rx_frag_num = 2; /* response header and STATUS */
337 u8 tx_frag_num = 1; /* request header */
338
339 flow_log("%s\n", __func__);
340
341 cipher_parms.alg = ctx->cipher.alg;
342 cipher_parms.mode = ctx->cipher.mode;
343 cipher_parms.type = ctx->cipher_type;
344 cipher_parms.key_len = ctx->enckeylen;
345 cipher_parms.key_buf = ctx->enckey;
346 cipher_parms.iv_buf = local_iv_ctr;
347 cipher_parms.iv_len = rctx->iv_ctr_len;
348
349 mssg = &rctx->mb_mssg;
350 chunk_start = rctx->src_sent;
351 remaining = rctx->total_todo - chunk_start;
352
353 /* determine the chunk we are breaking off and update the indexes */
354 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
355 (remaining > ctx->max_payload))
356 chunksize = ctx->max_payload;
357 else
358 chunksize = remaining;
359
360 rctx->src_sent += chunksize;
361 rctx->total_sent = rctx->src_sent;
362
363 /* Count number of sg entries to be included in this request */
364 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
365 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
366
367 if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
368 rctx->is_encrypt && chunk_start)
369 /*
370 * Encrypting non-first first chunk. Copy last block of
371 * previous result to IV for this chunk.
372 */
373 sg_copy_part_to_buf(req->dst, rctx->msg_buf.iv_ctr,
374 rctx->iv_ctr_len,
375 chunk_start - rctx->iv_ctr_len);
376
377 if (rctx->iv_ctr_len) {
378 /* get our local copy of the iv */
379 __builtin_memcpy(local_iv_ctr, rctx->msg_buf.iv_ctr,
380 rctx->iv_ctr_len);
381
382 /* generate the next IV if possible */
383 if ((ctx->cipher.mode == CIPHER_MODE_CBC) &&
384 !rctx->is_encrypt) {
385 /*
386 * CBC Decrypt: next IV is the last ciphertext block in
387 * this chunk
388 */
389 sg_copy_part_to_buf(req->src, rctx->msg_buf.iv_ctr,
390 rctx->iv_ctr_len,
391 rctx->src_sent - rctx->iv_ctr_len);
392 } else if (ctx->cipher.mode == CIPHER_MODE_CTR) {
393 /*
394 * The SPU hardware increments the counter once for
395 * each AES block of 16 bytes. So update the counter
396 * for the next chunk, if there is one. Note that for
397 * this chunk, the counter has already been copied to
398 * local_iv_ctr. We can assume a block size of 16,
399 * because we only support CTR mode for AES, not for
400 * any other cipher alg.
401 */
402 add_to_ctr(rctx->msg_buf.iv_ctr, chunksize >> 4);
403 }
404 }
405
406 if (ctx->cipher.alg == CIPHER_ALG_RC4) {
407 rx_frag_num++;
408 if (chunk_start) {
409 /*
410 * for non-first RC4 chunks, use SUPDT from previous
411 * response as key for this chunk.
412 */
413 cipher_parms.key_buf = rctx->msg_buf.c.supdt_tweak;
414 update_key = true;
415 cipher_parms.type = CIPHER_TYPE_UPDT;
416 } else if (!rctx->is_encrypt) {
417 /*
418 * First RC4 chunk. For decrypt, key in pre-built msg
419 * header may have been changed if encrypt required
420 * multiple chunks. So revert the key to the
421 * ctx->enckey value.
422 */
423 update_key = true;
424 cipher_parms.type = CIPHER_TYPE_INIT;
425 }
426 }
427
428 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
429 flow_log("max_payload infinite\n");
430 else
431 flow_log("max_payload %u\n", ctx->max_payload);
432
433 flow_log("sent:%u start:%u remains:%u size:%u\n",
434 rctx->src_sent, chunk_start, remaining, chunksize);
435
436 /* Copy SPU header template created at setkey time */
437 memcpy(rctx->msg_buf.bcm_spu_req_hdr, ctx->bcm_spu_req_hdr,
438 sizeof(rctx->msg_buf.bcm_spu_req_hdr));
439
440 /*
441 * Pass SUPDT field as key. Key field in finish() call is only used
442 * when update_key has been set above for RC4. Will be ignored in
443 * all other cases.
444 */
445 spu->spu_cipher_req_finish(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
446 ctx->spu_req_hdr_len, !(rctx->is_encrypt),
447 &cipher_parms, update_key, chunksize);
448
449 atomic64_add(chunksize, &iproc_priv.bytes_out);
450
451 stat_pad_len = spu->spu_wordalign_padlen(chunksize);
452 if (stat_pad_len)
453 rx_frag_num++;
454 pad_len = stat_pad_len;
455 if (pad_len) {
456 tx_frag_num++;
457 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, 0,
458 0, ctx->auth.alg, ctx->auth.mode,
459 rctx->total_sent, stat_pad_len);
460 }
461
462 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
463 ctx->spu_req_hdr_len);
464 packet_log("payload:\n");
465 dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
466 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
467
468 /*
469 * Build mailbox message containing SPU request msg and rx buffers
470 * to catch response message
471 */
472 memset(mssg, 0, sizeof(*mssg));
473 mssg->type = BRCM_MESSAGE_SPU;
474 mssg->ctx = rctx; /* Will be returned in response */
475
476 /* Create rx scatterlist to catch result */
477 rx_frag_num += rctx->dst_nents;
478
479 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
480 spu->spu_xts_tweak_in_payload())
481 rx_frag_num++; /* extra sg to insert tweak */
482
483 err = spu_ablkcipher_rx_sg_create(mssg, rctx, rx_frag_num, chunksize,
484 stat_pad_len);
485 if (err)
486 return err;
487
488 /* Create tx scatterlist containing SPU request message */
489 tx_frag_num += rctx->src_nents;
490 if (spu->spu_tx_status_len())
491 tx_frag_num++;
492
493 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
494 spu->spu_xts_tweak_in_payload())
495 tx_frag_num++; /* extra sg to insert tweak */
496
497 err = spu_ablkcipher_tx_sg_create(mssg, rctx, tx_frag_num, chunksize,
498 pad_len);
499 if (err)
500 return err;
501
502 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
503 if (unlikely(err < 0))
504 return err;
505
506 return -EINPROGRESS;
507 }
508
509 /**
510 * handle_ablkcipher_resp() - Process a block cipher SPU response. Updates the
511 * total received count for the request and updates global stats.
512 * @rctx: Crypto request context
513 */
handle_ablkcipher_resp(struct iproc_reqctx_s * rctx)514 static void handle_ablkcipher_resp(struct iproc_reqctx_s *rctx)
515 {
516 struct spu_hw *spu = &iproc_priv.spu;
517 #ifdef DEBUG
518 struct crypto_async_request *areq = rctx->parent;
519 struct ablkcipher_request *req = ablkcipher_request_cast(areq);
520 #endif
521 struct iproc_ctx_s *ctx = rctx->ctx;
522 u32 payload_len;
523
524 /* See how much data was returned */
525 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
526
527 /*
528 * In XTS mode, the first SPU_XTS_TWEAK_SIZE bytes may be the
529 * encrypted tweak ("i") value; we don't count those.
530 */
531 if ((ctx->cipher.mode == CIPHER_MODE_XTS) &&
532 spu->spu_xts_tweak_in_payload() &&
533 (payload_len >= SPU_XTS_TWEAK_SIZE))
534 payload_len -= SPU_XTS_TWEAK_SIZE;
535
536 atomic64_add(payload_len, &iproc_priv.bytes_in);
537
538 flow_log("%s() offset: %u, bd_len: %u BD:\n",
539 __func__, rctx->total_received, payload_len);
540
541 dump_sg(req->dst, rctx->total_received, payload_len);
542 if (ctx->cipher.alg == CIPHER_ALG_RC4)
543 packet_dump(" supdt ", rctx->msg_buf.c.supdt_tweak,
544 SPU_SUPDT_LEN);
545
546 rctx->total_received += payload_len;
547 if (rctx->total_received == rctx->total_todo) {
548 atomic_inc(&iproc_priv.op_counts[SPU_OP_CIPHER]);
549 atomic_inc(
550 &iproc_priv.cipher_cnt[ctx->cipher.alg][ctx->cipher.mode]);
551 }
552 }
553
554 /**
555 * spu_ahash_rx_sg_create() - Build up the scatterlist of buffers used to
556 * receive a SPU response message for an ahash request.
557 * @mssg: mailbox message containing the receive sg
558 * @rctx: crypto request context
559 * @rx_frag_num: number of scatterlist elements required to hold the
560 * SPU response message
561 * @digestsize: length of hash digest, in bytes
562 * @stat_pad_len: Number of bytes required to pad the STAT field to
563 * a 4-byte boundary
564 *
565 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
566 * when the request completes, whether the request is handled successfully or
567 * there is an error.
568 *
569 * Return:
570 * 0 if successful
571 * < 0 if an error
572 */
573 static int
spu_ahash_rx_sg_create(struct brcm_message * mssg,struct iproc_reqctx_s * rctx,u8 rx_frag_num,unsigned int digestsize,u32 stat_pad_len)574 spu_ahash_rx_sg_create(struct brcm_message *mssg,
575 struct iproc_reqctx_s *rctx,
576 u8 rx_frag_num, unsigned int digestsize,
577 u32 stat_pad_len)
578 {
579 struct spu_hw *spu = &iproc_priv.spu;
580 struct scatterlist *sg; /* used to build sgs in mbox message */
581 struct iproc_ctx_s *ctx = rctx->ctx;
582
583 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
584 rctx->gfp);
585 if (!mssg->spu.dst)
586 return -ENOMEM;
587
588 sg = mssg->spu.dst;
589 sg_init_table(sg, rx_frag_num);
590 /* Space for SPU message header */
591 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
592
593 /* Space for digest */
594 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
595
596 if (stat_pad_len)
597 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
598
599 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
600 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
601 return 0;
602 }
603
604 /**
605 * spu_ahash_tx_sg_create() - Build up the scatterlist of buffers used to send
606 * a SPU request message for an ahash request. Includes SPU message headers and
607 * the request data.
608 * @mssg: mailbox message containing the transmit sg
609 * @rctx: crypto request context
610 * @tx_frag_num: number of scatterlist elements required to construct the
611 * SPU request message
612 * @spu_hdr_len: length in bytes of SPU message header
613 * @hash_carry_len: Number of bytes of data carried over from previous req
614 * @new_data_len: Number of bytes of new request data
615 * @pad_len: Number of pad bytes
616 *
617 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
618 * when the request completes, whether the request is handled successfully or
619 * there is an error.
620 *
621 * Return:
622 * 0 if successful
623 * < 0 if an error
624 */
625 static int
spu_ahash_tx_sg_create(struct brcm_message * mssg,struct iproc_reqctx_s * rctx,u8 tx_frag_num,u32 spu_hdr_len,unsigned int hash_carry_len,unsigned int new_data_len,u32 pad_len)626 spu_ahash_tx_sg_create(struct brcm_message *mssg,
627 struct iproc_reqctx_s *rctx,
628 u8 tx_frag_num,
629 u32 spu_hdr_len,
630 unsigned int hash_carry_len,
631 unsigned int new_data_len, u32 pad_len)
632 {
633 struct spu_hw *spu = &iproc_priv.spu;
634 struct scatterlist *sg; /* used to build sgs in mbox message */
635 u32 datalen; /* Number of bytes of response data expected */
636 u32 stat_len;
637
638 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
639 rctx->gfp);
640 if (!mssg->spu.src)
641 return -ENOMEM;
642
643 sg = mssg->spu.src;
644 sg_init_table(sg, tx_frag_num);
645
646 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
647 BCM_HDR_LEN + spu_hdr_len);
648
649 if (hash_carry_len)
650 sg_set_buf(sg++, rctx->hash_carry, hash_carry_len);
651
652 if (new_data_len) {
653 /* Copy in each src sg entry from request, up to chunksize */
654 datalen = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
655 rctx->src_nents, new_data_len);
656 if (datalen < new_data_len) {
657 pr_err("%s(): failed to copy src sg to mbox msg",
658 __func__);
659 return -EFAULT;
660 }
661 }
662
663 if (pad_len)
664 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
665
666 stat_len = spu->spu_tx_status_len();
667 if (stat_len) {
668 memset(rctx->msg_buf.tx_stat, 0, stat_len);
669 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
670 }
671
672 return 0;
673 }
674
675 /**
676 * handle_ahash_req() - Process an asynchronous hash request from the crypto
677 * API.
678 * @rctx: Crypto request context
679 *
680 * Builds a SPU request message embedded in a mailbox message and submits the
681 * mailbox message on a selected mailbox channel. The SPU request message is
682 * constructed as a scatterlist, including entries from the crypto API's
683 * src scatterlist to avoid copying the data to be hashed. This function is
684 * called either on the thread from the crypto API, or, in the case that the
685 * crypto API request is too large to fit in a single SPU request message,
686 * on the thread that invokes the receive callback with a response message.
687 * Because some operations require the response from one chunk before the next
688 * chunk can be submitted, we always wait for the response for the previous
689 * chunk before submitting the next chunk. Because requests are submitted in
690 * lock step like this, there is no need to synchronize access to request data
691 * structures.
692 *
693 * Return:
694 * -EINPROGRESS: request has been submitted to SPU and response will be
695 * returned asynchronously
696 * -EAGAIN: non-final request included a small amount of data, which for
697 * efficiency we did not submit to the SPU, but instead stored
698 * to be submitted to the SPU with the next part of the request
699 * other: an error code
700 */
handle_ahash_req(struct iproc_reqctx_s * rctx)701 static int handle_ahash_req(struct iproc_reqctx_s *rctx)
702 {
703 struct spu_hw *spu = &iproc_priv.spu;
704 struct crypto_async_request *areq = rctx->parent;
705 struct ahash_request *req = ahash_request_cast(areq);
706 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
707 struct crypto_tfm *tfm = crypto_ahash_tfm(ahash);
708 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
709 struct iproc_ctx_s *ctx = rctx->ctx;
710
711 /* number of bytes still to be hashed in this req */
712 unsigned int nbytes_to_hash = 0;
713 int err = 0;
714 unsigned int chunksize = 0; /* length of hash carry + new data */
715 /*
716 * length of new data, not from hash carry, to be submitted in
717 * this hw request
718 */
719 unsigned int new_data_len;
720
721 unsigned int __maybe_unused chunk_start = 0;
722 u32 db_size; /* Length of data field, incl gcm and hash padding */
723 int pad_len = 0; /* total pad len, including gcm, hash, stat padding */
724 u32 data_pad_len = 0; /* length of GCM/CCM padding */
725 u32 stat_pad_len = 0; /* length of padding to align STATUS word */
726 struct brcm_message *mssg; /* mailbox message */
727 struct spu_request_opts req_opts;
728 struct spu_cipher_parms cipher_parms;
729 struct spu_hash_parms hash_parms;
730 struct spu_aead_parms aead_parms;
731 unsigned int local_nbuf;
732 u32 spu_hdr_len;
733 unsigned int digestsize;
734 u16 rem = 0;
735
736 /*
737 * number of entries in src and dst sg. Always includes SPU msg header.
738 * rx always includes a buffer to catch digest and STATUS.
739 */
740 u8 rx_frag_num = 3;
741 u8 tx_frag_num = 1;
742
743 flow_log("total_todo %u, total_sent %u\n",
744 rctx->total_todo, rctx->total_sent);
745
746 memset(&req_opts, 0, sizeof(req_opts));
747 memset(&cipher_parms, 0, sizeof(cipher_parms));
748 memset(&hash_parms, 0, sizeof(hash_parms));
749 memset(&aead_parms, 0, sizeof(aead_parms));
750
751 req_opts.bd_suppress = true;
752 hash_parms.alg = ctx->auth.alg;
753 hash_parms.mode = ctx->auth.mode;
754 hash_parms.type = HASH_TYPE_NONE;
755 hash_parms.key_buf = (u8 *)ctx->authkey;
756 hash_parms.key_len = ctx->authkeylen;
757
758 /*
759 * For hash algorithms below assignment looks bit odd but
760 * it's needed for AES-XCBC and AES-CMAC hash algorithms
761 * to differentiate between 128, 192, 256 bit key values.
762 * Based on the key values, hash algorithm is selected.
763 * For example for 128 bit key, hash algorithm is AES-128.
764 */
765 cipher_parms.type = ctx->cipher_type;
766
767 mssg = &rctx->mb_mssg;
768 chunk_start = rctx->src_sent;
769
770 /*
771 * Compute the amount remaining to hash. This may include data
772 * carried over from previous requests.
773 */
774 nbytes_to_hash = rctx->total_todo - rctx->total_sent;
775 chunksize = nbytes_to_hash;
776 if ((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
777 (chunksize > ctx->max_payload))
778 chunksize = ctx->max_payload;
779
780 /*
781 * If this is not a final request and the request data is not a multiple
782 * of a full block, then simply park the extra data and prefix it to the
783 * data for the next request.
784 */
785 if (!rctx->is_final) {
786 u8 *dest = rctx->hash_carry + rctx->hash_carry_len;
787 u16 new_len; /* len of data to add to hash carry */
788
789 rem = chunksize % blocksize; /* remainder */
790 if (rem) {
791 /* chunksize not a multiple of blocksize */
792 chunksize -= rem;
793 if (chunksize == 0) {
794 /* Don't have a full block to submit to hw */
795 new_len = rem - rctx->hash_carry_len;
796 sg_copy_part_to_buf(req->src, dest, new_len,
797 rctx->src_sent);
798 rctx->hash_carry_len = rem;
799 flow_log("Exiting with hash carry len: %u\n",
800 rctx->hash_carry_len);
801 packet_dump(" buf: ",
802 rctx->hash_carry,
803 rctx->hash_carry_len);
804 return -EAGAIN;
805 }
806 }
807 }
808
809 /* if we have hash carry, then prefix it to the data in this request */
810 local_nbuf = rctx->hash_carry_len;
811 rctx->hash_carry_len = 0;
812 if (local_nbuf)
813 tx_frag_num++;
814 new_data_len = chunksize - local_nbuf;
815
816 /* Count number of sg entries to be used in this request */
817 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip,
818 new_data_len);
819
820 /* AES hashing keeps key size in type field, so need to copy it here */
821 if (hash_parms.alg == HASH_ALG_AES)
822 hash_parms.type = cipher_parms.type;
823 else
824 hash_parms.type = spu->spu_hash_type(rctx->total_sent);
825
826 digestsize = spu->spu_digest_size(ctx->digestsize, ctx->auth.alg,
827 hash_parms.type);
828 hash_parms.digestsize = digestsize;
829
830 /* update the indexes */
831 rctx->total_sent += chunksize;
832 /* if you sent a prebuf then that wasn't from this req->src */
833 rctx->src_sent += new_data_len;
834
835 if ((rctx->total_sent == rctx->total_todo) && rctx->is_final)
836 hash_parms.pad_len = spu->spu_hash_pad_len(hash_parms.alg,
837 hash_parms.mode,
838 chunksize,
839 blocksize);
840
841 /*
842 * If a non-first chunk, then include the digest returned from the
843 * previous chunk so that hw can add to it (except for AES types).
844 */
845 if ((hash_parms.type == HASH_TYPE_UPDT) &&
846 (hash_parms.alg != HASH_ALG_AES)) {
847 hash_parms.key_buf = rctx->incr_hash;
848 hash_parms.key_len = digestsize;
849 }
850
851 atomic64_add(chunksize, &iproc_priv.bytes_out);
852
853 flow_log("%s() final: %u nbuf: %u ",
854 __func__, rctx->is_final, local_nbuf);
855
856 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
857 flow_log("max_payload infinite\n");
858 else
859 flow_log("max_payload %u\n", ctx->max_payload);
860
861 flow_log("chunk_start: %u chunk_size: %u\n", chunk_start, chunksize);
862
863 /* Prepend SPU header with type 3 BCM header */
864 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
865
866 hash_parms.prebuf_len = local_nbuf;
867 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
868 BCM_HDR_LEN,
869 &req_opts, &cipher_parms,
870 &hash_parms, &aead_parms,
871 new_data_len);
872
873 if (spu_hdr_len == 0) {
874 pr_err("Failed to create SPU request header\n");
875 return -EFAULT;
876 }
877
878 /*
879 * Determine total length of padding required. Put all padding in one
880 * buffer.
881 */
882 data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode, chunksize);
883 db_size = spu_real_db_size(0, 0, local_nbuf, new_data_len,
884 0, 0, hash_parms.pad_len);
885 if (spu->spu_tx_status_len())
886 stat_pad_len = spu->spu_wordalign_padlen(db_size);
887 if (stat_pad_len)
888 rx_frag_num++;
889 pad_len = hash_parms.pad_len + data_pad_len + stat_pad_len;
890 if (pad_len) {
891 tx_frag_num++;
892 spu->spu_request_pad(rctx->msg_buf.spu_req_pad, data_pad_len,
893 hash_parms.pad_len, ctx->auth.alg,
894 ctx->auth.mode, rctx->total_sent,
895 stat_pad_len);
896 }
897
898 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
899 spu_hdr_len);
900 packet_dump(" prebuf: ", rctx->hash_carry, local_nbuf);
901 flow_log("Data:\n");
902 dump_sg(rctx->src_sg, rctx->src_skip, new_data_len);
903 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
904
905 /*
906 * Build mailbox message containing SPU request msg and rx buffers
907 * to catch response message
908 */
909 memset(mssg, 0, sizeof(*mssg));
910 mssg->type = BRCM_MESSAGE_SPU;
911 mssg->ctx = rctx; /* Will be returned in response */
912
913 /* Create rx scatterlist to catch result */
914 err = spu_ahash_rx_sg_create(mssg, rctx, rx_frag_num, digestsize,
915 stat_pad_len);
916 if (err)
917 return err;
918
919 /* Create tx scatterlist containing SPU request message */
920 tx_frag_num += rctx->src_nents;
921 if (spu->spu_tx_status_len())
922 tx_frag_num++;
923 err = spu_ahash_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
924 local_nbuf, new_data_len, pad_len);
925 if (err)
926 return err;
927
928 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
929 if (unlikely(err < 0))
930 return err;
931
932 return -EINPROGRESS;
933 }
934
935 /**
936 * spu_hmac_outer_hash() - Request synchonous software compute of the outer hash
937 * for an HMAC request.
938 * @req: The HMAC request from the crypto API
939 * @ctx: The session context
940 *
941 * Return: 0 if synchronous hash operation successful
942 * -EINVAL if the hash algo is unrecognized
943 * any other value indicates an error
944 */
spu_hmac_outer_hash(struct ahash_request * req,struct iproc_ctx_s * ctx)945 static int spu_hmac_outer_hash(struct ahash_request *req,
946 struct iproc_ctx_s *ctx)
947 {
948 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
949 unsigned int blocksize =
950 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
951 int rc;
952
953 switch (ctx->auth.alg) {
954 case HASH_ALG_MD5:
955 rc = do_shash("md5", req->result, ctx->opad, blocksize,
956 req->result, ctx->digestsize, NULL, 0);
957 break;
958 case HASH_ALG_SHA1:
959 rc = do_shash("sha1", req->result, ctx->opad, blocksize,
960 req->result, ctx->digestsize, NULL, 0);
961 break;
962 case HASH_ALG_SHA224:
963 rc = do_shash("sha224", req->result, ctx->opad, blocksize,
964 req->result, ctx->digestsize, NULL, 0);
965 break;
966 case HASH_ALG_SHA256:
967 rc = do_shash("sha256", req->result, ctx->opad, blocksize,
968 req->result, ctx->digestsize, NULL, 0);
969 break;
970 case HASH_ALG_SHA384:
971 rc = do_shash("sha384", req->result, ctx->opad, blocksize,
972 req->result, ctx->digestsize, NULL, 0);
973 break;
974 case HASH_ALG_SHA512:
975 rc = do_shash("sha512", req->result, ctx->opad, blocksize,
976 req->result, ctx->digestsize, NULL, 0);
977 break;
978 default:
979 pr_err("%s() Error : unknown hmac type\n", __func__);
980 rc = -EINVAL;
981 }
982 return rc;
983 }
984
985 /**
986 * ahash_req_done() - Process a hash result from the SPU hardware.
987 * @rctx: Crypto request context
988 *
989 * Return: 0 if successful
990 * < 0 if an error
991 */
ahash_req_done(struct iproc_reqctx_s * rctx)992 static int ahash_req_done(struct iproc_reqctx_s *rctx)
993 {
994 struct spu_hw *spu = &iproc_priv.spu;
995 struct crypto_async_request *areq = rctx->parent;
996 struct ahash_request *req = ahash_request_cast(areq);
997 struct iproc_ctx_s *ctx = rctx->ctx;
998 int err;
999
1000 memcpy(req->result, rctx->msg_buf.digest, ctx->digestsize);
1001
1002 if (spu->spu_type == SPU_TYPE_SPUM) {
1003 /* byte swap the output from the UPDT function to network byte
1004 * order
1005 */
1006 if (ctx->auth.alg == HASH_ALG_MD5) {
1007 __swab32s((u32 *)req->result);
1008 __swab32s(((u32 *)req->result) + 1);
1009 __swab32s(((u32 *)req->result) + 2);
1010 __swab32s(((u32 *)req->result) + 3);
1011 __swab32s(((u32 *)req->result) + 4);
1012 }
1013 }
1014
1015 flow_dump(" digest ", req->result, ctx->digestsize);
1016
1017 /* if this an HMAC then do the outer hash */
1018 if (rctx->is_sw_hmac) {
1019 err = spu_hmac_outer_hash(req, ctx);
1020 if (err < 0)
1021 return err;
1022 flow_dump(" hmac: ", req->result, ctx->digestsize);
1023 }
1024
1025 if (rctx->is_sw_hmac || ctx->auth.mode == HASH_MODE_HMAC) {
1026 atomic_inc(&iproc_priv.op_counts[SPU_OP_HMAC]);
1027 atomic_inc(&iproc_priv.hmac_cnt[ctx->auth.alg]);
1028 } else {
1029 atomic_inc(&iproc_priv.op_counts[SPU_OP_HASH]);
1030 atomic_inc(&iproc_priv.hash_cnt[ctx->auth.alg]);
1031 }
1032
1033 return 0;
1034 }
1035
1036 /**
1037 * handle_ahash_resp() - Process a SPU response message for a hash request.
1038 * Checks if the entire crypto API request has been processed, and if so,
1039 * invokes post processing on the result.
1040 * @rctx: Crypto request context
1041 */
handle_ahash_resp(struct iproc_reqctx_s * rctx)1042 static void handle_ahash_resp(struct iproc_reqctx_s *rctx)
1043 {
1044 struct iproc_ctx_s *ctx = rctx->ctx;
1045 #ifdef DEBUG
1046 struct crypto_async_request *areq = rctx->parent;
1047 struct ahash_request *req = ahash_request_cast(areq);
1048 struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
1049 unsigned int blocksize =
1050 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
1051 #endif
1052 /*
1053 * Save hash to use as input to next op if incremental. Might be copying
1054 * too much, but that's easier than figuring out actual digest size here
1055 */
1056 memcpy(rctx->incr_hash, rctx->msg_buf.digest, MAX_DIGEST_SIZE);
1057
1058 flow_log("%s() blocksize:%u digestsize:%u\n",
1059 __func__, blocksize, ctx->digestsize);
1060
1061 atomic64_add(ctx->digestsize, &iproc_priv.bytes_in);
1062
1063 if (rctx->is_final && (rctx->total_sent == rctx->total_todo))
1064 ahash_req_done(rctx);
1065 }
1066
1067 /**
1068 * spu_aead_rx_sg_create() - Build up the scatterlist of buffers used to receive
1069 * a SPU response message for an AEAD request. Includes buffers to catch SPU
1070 * message headers and the response data.
1071 * @mssg: mailbox message containing the receive sg
1072 * @rctx: crypto request context
1073 * @rx_frag_num: number of scatterlist elements required to hold the
1074 * SPU response message
1075 * @assoc_len: Length of associated data included in the crypto request
1076 * @ret_iv_len: Length of IV returned in response
1077 * @resp_len: Number of bytes of response data expected to be written to
1078 * dst buffer from crypto API
1079 * @digestsize: Length of hash digest, in bytes
1080 * @stat_pad_len: Number of bytes required to pad the STAT field to
1081 * a 4-byte boundary
1082 *
1083 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
1084 * when the request completes, whether the request is handled successfully or
1085 * there is an error.
1086 *
1087 * Returns:
1088 * 0 if successful
1089 * < 0 if an error
1090 */
spu_aead_rx_sg_create(struct brcm_message * mssg,struct aead_request * req,struct iproc_reqctx_s * rctx,u8 rx_frag_num,unsigned int assoc_len,u32 ret_iv_len,unsigned int resp_len,unsigned int digestsize,u32 stat_pad_len)1091 static int spu_aead_rx_sg_create(struct brcm_message *mssg,
1092 struct aead_request *req,
1093 struct iproc_reqctx_s *rctx,
1094 u8 rx_frag_num,
1095 unsigned int assoc_len,
1096 u32 ret_iv_len, unsigned int resp_len,
1097 unsigned int digestsize, u32 stat_pad_len)
1098 {
1099 struct spu_hw *spu = &iproc_priv.spu;
1100 struct scatterlist *sg; /* used to build sgs in mbox message */
1101 struct iproc_ctx_s *ctx = rctx->ctx;
1102 u32 datalen; /* Number of bytes of response data expected */
1103 u32 assoc_buf_len;
1104 u8 data_padlen = 0;
1105
1106 if (ctx->is_rfc4543) {
1107 /* RFC4543: only pad after data, not after AAD */
1108 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1109 assoc_len + resp_len);
1110 assoc_buf_len = assoc_len;
1111 } else {
1112 data_padlen = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1113 resp_len);
1114 assoc_buf_len = spu->spu_assoc_resp_len(ctx->cipher.mode,
1115 assoc_len, ret_iv_len,
1116 rctx->is_encrypt);
1117 }
1118
1119 if (ctx->cipher.mode == CIPHER_MODE_CCM)
1120 /* ICV (after data) must be in the next 32-bit word for CCM */
1121 data_padlen += spu->spu_wordalign_padlen(assoc_buf_len +
1122 resp_len +
1123 data_padlen);
1124
1125 if (data_padlen)
1126 /* have to catch gcm pad in separate buffer */
1127 rx_frag_num++;
1128
1129 mssg->spu.dst = kcalloc(rx_frag_num, sizeof(struct scatterlist),
1130 rctx->gfp);
1131 if (!mssg->spu.dst)
1132 return -ENOMEM;
1133
1134 sg = mssg->spu.dst;
1135 sg_init_table(sg, rx_frag_num);
1136
1137 /* Space for SPU message header */
1138 sg_set_buf(sg++, rctx->msg_buf.spu_resp_hdr, ctx->spu_resp_hdr_len);
1139
1140 if (assoc_buf_len) {
1141 /*
1142 * Don't write directly to req->dst, because SPU may pad the
1143 * assoc data in the response
1144 */
1145 memset(rctx->msg_buf.a.resp_aad, 0, assoc_buf_len);
1146 sg_set_buf(sg++, rctx->msg_buf.a.resp_aad, assoc_buf_len);
1147 }
1148
1149 if (resp_len) {
1150 /*
1151 * Copy in each dst sg entry from request, up to chunksize.
1152 * dst sg catches just the data. digest caught in separate buf.
1153 */
1154 datalen = spu_msg_sg_add(&sg, &rctx->dst_sg, &rctx->dst_skip,
1155 rctx->dst_nents, resp_len);
1156 if (datalen < (resp_len)) {
1157 pr_err("%s(): failed to copy dst sg to mbox msg. expected len %u, datalen %u",
1158 __func__, resp_len, datalen);
1159 return -EFAULT;
1160 }
1161 }
1162
1163 /* If GCM/CCM data is padded, catch padding in separate buffer */
1164 if (data_padlen) {
1165 memset(rctx->msg_buf.a.gcmpad, 0, data_padlen);
1166 sg_set_buf(sg++, rctx->msg_buf.a.gcmpad, data_padlen);
1167 }
1168
1169 /* Always catch ICV in separate buffer */
1170 sg_set_buf(sg++, rctx->msg_buf.digest, digestsize);
1171
1172 flow_log("stat_pad_len %u\n", stat_pad_len);
1173 if (stat_pad_len) {
1174 memset(rctx->msg_buf.rx_stat_pad, 0, stat_pad_len);
1175 sg_set_buf(sg++, rctx->msg_buf.rx_stat_pad, stat_pad_len);
1176 }
1177
1178 memset(rctx->msg_buf.rx_stat, 0, SPU_RX_STATUS_LEN);
1179 sg_set_buf(sg, rctx->msg_buf.rx_stat, spu->spu_rx_status_len());
1180
1181 return 0;
1182 }
1183
1184 /**
1185 * spu_aead_tx_sg_create() - Build up the scatterlist of buffers used to send a
1186 * SPU request message for an AEAD request. Includes SPU message headers and the
1187 * request data.
1188 * @mssg: mailbox message containing the transmit sg
1189 * @rctx: crypto request context
1190 * @tx_frag_num: number of scatterlist elements required to construct the
1191 * SPU request message
1192 * @spu_hdr_len: length of SPU message header in bytes
1193 * @assoc: crypto API associated data scatterlist
1194 * @assoc_len: length of associated data
1195 * @assoc_nents: number of scatterlist entries containing assoc data
1196 * @aead_iv_len: length of AEAD IV, if included
1197 * @chunksize: Number of bytes of request data
1198 * @aad_pad_len: Number of bytes of padding at end of AAD. For GCM/CCM.
1199 * @pad_len: Number of pad bytes
1200 * @incl_icv: If true, write separate ICV buffer after data and
1201 * any padding
1202 *
1203 * The scatterlist that gets allocated here is freed in spu_chunk_cleanup()
1204 * when the request completes, whether the request is handled successfully or
1205 * there is an error.
1206 *
1207 * Return:
1208 * 0 if successful
1209 * < 0 if an error
1210 */
spu_aead_tx_sg_create(struct brcm_message * mssg,struct iproc_reqctx_s * rctx,u8 tx_frag_num,u32 spu_hdr_len,struct scatterlist * assoc,unsigned int assoc_len,int assoc_nents,unsigned int aead_iv_len,unsigned int chunksize,u32 aad_pad_len,u32 pad_len,bool incl_icv)1211 static int spu_aead_tx_sg_create(struct brcm_message *mssg,
1212 struct iproc_reqctx_s *rctx,
1213 u8 tx_frag_num,
1214 u32 spu_hdr_len,
1215 struct scatterlist *assoc,
1216 unsigned int assoc_len,
1217 int assoc_nents,
1218 unsigned int aead_iv_len,
1219 unsigned int chunksize,
1220 u32 aad_pad_len, u32 pad_len, bool incl_icv)
1221 {
1222 struct spu_hw *spu = &iproc_priv.spu;
1223 struct scatterlist *sg; /* used to build sgs in mbox message */
1224 struct scatterlist *assoc_sg = assoc;
1225 struct iproc_ctx_s *ctx = rctx->ctx;
1226 u32 datalen; /* Number of bytes of data to write */
1227 u32 written; /* Number of bytes of data written */
1228 u32 assoc_offset = 0;
1229 u32 stat_len;
1230
1231 mssg->spu.src = kcalloc(tx_frag_num, sizeof(struct scatterlist),
1232 rctx->gfp);
1233 if (!mssg->spu.src)
1234 return -ENOMEM;
1235
1236 sg = mssg->spu.src;
1237 sg_init_table(sg, tx_frag_num);
1238
1239 sg_set_buf(sg++, rctx->msg_buf.bcm_spu_req_hdr,
1240 BCM_HDR_LEN + spu_hdr_len);
1241
1242 if (assoc_len) {
1243 /* Copy in each associated data sg entry from request */
1244 written = spu_msg_sg_add(&sg, &assoc_sg, &assoc_offset,
1245 assoc_nents, assoc_len);
1246 if (written < assoc_len) {
1247 pr_err("%s(): failed to copy assoc sg to mbox msg",
1248 __func__);
1249 return -EFAULT;
1250 }
1251 }
1252
1253 if (aead_iv_len)
1254 sg_set_buf(sg++, rctx->msg_buf.iv_ctr, aead_iv_len);
1255
1256 if (aad_pad_len) {
1257 memset(rctx->msg_buf.a.req_aad_pad, 0, aad_pad_len);
1258 sg_set_buf(sg++, rctx->msg_buf.a.req_aad_pad, aad_pad_len);
1259 }
1260
1261 datalen = chunksize;
1262 if ((chunksize > ctx->digestsize) && incl_icv)
1263 datalen -= ctx->digestsize;
1264 if (datalen) {
1265 /* For aead, a single msg should consume the entire src sg */
1266 written = spu_msg_sg_add(&sg, &rctx->src_sg, &rctx->src_skip,
1267 rctx->src_nents, datalen);
1268 if (written < datalen) {
1269 pr_err("%s(): failed to copy src sg to mbox msg",
1270 __func__);
1271 return -EFAULT;
1272 }
1273 }
1274
1275 if (pad_len) {
1276 memset(rctx->msg_buf.spu_req_pad, 0, pad_len);
1277 sg_set_buf(sg++, rctx->msg_buf.spu_req_pad, pad_len);
1278 }
1279
1280 if (incl_icv)
1281 sg_set_buf(sg++, rctx->msg_buf.digest, ctx->digestsize);
1282
1283 stat_len = spu->spu_tx_status_len();
1284 if (stat_len) {
1285 memset(rctx->msg_buf.tx_stat, 0, stat_len);
1286 sg_set_buf(sg, rctx->msg_buf.tx_stat, stat_len);
1287 }
1288 return 0;
1289 }
1290
1291 /**
1292 * handle_aead_req() - Submit a SPU request message for the next chunk of the
1293 * current AEAD request.
1294 * @rctx: Crypto request context
1295 *
1296 * Unlike other operation types, we assume the length of the request fits in
1297 * a single SPU request message. aead_enqueue() makes sure this is true.
1298 * Comments for other op types regarding threads applies here as well.
1299 *
1300 * Unlike incremental hash ops, where the spu returns the entire hash for
1301 * truncated algs like sha-224, the SPU returns just the truncated hash in
1302 * response to aead requests. So digestsize is always ctx->digestsize here.
1303 *
1304 * Return: -EINPROGRESS: crypto request has been accepted and result will be
1305 * returned asynchronously
1306 * Any other value indicates an error
1307 */
handle_aead_req(struct iproc_reqctx_s * rctx)1308 static int handle_aead_req(struct iproc_reqctx_s *rctx)
1309 {
1310 struct spu_hw *spu = &iproc_priv.spu;
1311 struct crypto_async_request *areq = rctx->parent;
1312 struct aead_request *req = container_of(areq,
1313 struct aead_request, base);
1314 struct iproc_ctx_s *ctx = rctx->ctx;
1315 int err;
1316 unsigned int chunksize;
1317 unsigned int resp_len;
1318 u32 spu_hdr_len;
1319 u32 db_size;
1320 u32 stat_pad_len;
1321 u32 pad_len;
1322 struct brcm_message *mssg; /* mailbox message */
1323 struct spu_request_opts req_opts;
1324 struct spu_cipher_parms cipher_parms;
1325 struct spu_hash_parms hash_parms;
1326 struct spu_aead_parms aead_parms;
1327 int assoc_nents = 0;
1328 bool incl_icv = false;
1329 unsigned int digestsize = ctx->digestsize;
1330
1331 /* number of entries in src and dst sg. Always includes SPU msg header.
1332 */
1333 u8 rx_frag_num = 2; /* and STATUS */
1334 u8 tx_frag_num = 1;
1335
1336 /* doing the whole thing at once */
1337 chunksize = rctx->total_todo;
1338
1339 flow_log("%s: chunksize %u\n", __func__, chunksize);
1340
1341 memset(&req_opts, 0, sizeof(req_opts));
1342 memset(&hash_parms, 0, sizeof(hash_parms));
1343 memset(&aead_parms, 0, sizeof(aead_parms));
1344
1345 req_opts.is_inbound = !(rctx->is_encrypt);
1346 req_opts.auth_first = ctx->auth_first;
1347 req_opts.is_aead = true;
1348 req_opts.is_esp = ctx->is_esp;
1349
1350 cipher_parms.alg = ctx->cipher.alg;
1351 cipher_parms.mode = ctx->cipher.mode;
1352 cipher_parms.type = ctx->cipher_type;
1353 cipher_parms.key_buf = ctx->enckey;
1354 cipher_parms.key_len = ctx->enckeylen;
1355 cipher_parms.iv_buf = rctx->msg_buf.iv_ctr;
1356 cipher_parms.iv_len = rctx->iv_ctr_len;
1357
1358 hash_parms.alg = ctx->auth.alg;
1359 hash_parms.mode = ctx->auth.mode;
1360 hash_parms.type = HASH_TYPE_NONE;
1361 hash_parms.key_buf = (u8 *)ctx->authkey;
1362 hash_parms.key_len = ctx->authkeylen;
1363 hash_parms.digestsize = digestsize;
1364
1365 if ((ctx->auth.alg == HASH_ALG_SHA224) &&
1366 (ctx->authkeylen < SHA224_DIGEST_SIZE))
1367 hash_parms.key_len = SHA224_DIGEST_SIZE;
1368
1369 aead_parms.assoc_size = req->assoclen;
1370 if (ctx->is_esp && !ctx->is_rfc4543) {
1371 /*
1372 * 8-byte IV is included assoc data in request. SPU2
1373 * expects AAD to include just SPI and seqno. So
1374 * subtract off the IV len.
1375 */
1376 aead_parms.assoc_size -= GCM_ESP_IV_SIZE;
1377
1378 if (rctx->is_encrypt) {
1379 aead_parms.return_iv = true;
1380 aead_parms.ret_iv_len = GCM_ESP_IV_SIZE;
1381 aead_parms.ret_iv_off = GCM_ESP_SALT_SIZE;
1382 }
1383 } else {
1384 aead_parms.ret_iv_len = 0;
1385 }
1386
1387 /*
1388 * Count number of sg entries from the crypto API request that are to
1389 * be included in this mailbox message. For dst sg, don't count space
1390 * for digest. Digest gets caught in a separate buffer and copied back
1391 * to dst sg when processing response.
1392 */
1393 rctx->src_nents = spu_sg_count(rctx->src_sg, rctx->src_skip, chunksize);
1394 rctx->dst_nents = spu_sg_count(rctx->dst_sg, rctx->dst_skip, chunksize);
1395 if (aead_parms.assoc_size)
1396 assoc_nents = spu_sg_count(rctx->assoc, 0,
1397 aead_parms.assoc_size);
1398
1399 mssg = &rctx->mb_mssg;
1400
1401 rctx->total_sent = chunksize;
1402 rctx->src_sent = chunksize;
1403 if (spu->spu_assoc_resp_len(ctx->cipher.mode,
1404 aead_parms.assoc_size,
1405 aead_parms.ret_iv_len,
1406 rctx->is_encrypt))
1407 rx_frag_num++;
1408
1409 aead_parms.iv_len = spu->spu_aead_ivlen(ctx->cipher.mode,
1410 rctx->iv_ctr_len);
1411
1412 if (ctx->auth.alg == HASH_ALG_AES)
1413 hash_parms.type = ctx->cipher_type;
1414
1415 /* General case AAD padding (CCM and RFC4543 special cases below) */
1416 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1417 aead_parms.assoc_size);
1418
1419 /* General case data padding (CCM decrypt special case below) */
1420 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1421 chunksize);
1422
1423 if (ctx->cipher.mode == CIPHER_MODE_CCM) {
1424 /*
1425 * for CCM, AAD len + 2 (rather than AAD len) needs to be
1426 * 128-bit aligned
1427 */
1428 aead_parms.aad_pad_len = spu->spu_gcm_ccm_pad_len(
1429 ctx->cipher.mode,
1430 aead_parms.assoc_size + 2);
1431
1432 /*
1433 * And when decrypting CCM, need to pad without including
1434 * size of ICV which is tacked on to end of chunk
1435 */
1436 if (!rctx->is_encrypt)
1437 aead_parms.data_pad_len =
1438 spu->spu_gcm_ccm_pad_len(ctx->cipher.mode,
1439 chunksize - digestsize);
1440
1441 /* CCM also requires software to rewrite portions of IV: */
1442 spu->spu_ccm_update_iv(digestsize, &cipher_parms, req->assoclen,
1443 chunksize, rctx->is_encrypt,
1444 ctx->is_esp);
1445 }
1446
1447 if (ctx->is_rfc4543) {
1448 /*
1449 * RFC4543: data is included in AAD, so don't pad after AAD
1450 * and pad data based on both AAD + data size
1451 */
1452 aead_parms.aad_pad_len = 0;
1453 if (!rctx->is_encrypt)
1454 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
1455 ctx->cipher.mode,
1456 aead_parms.assoc_size + chunksize -
1457 digestsize);
1458 else
1459 aead_parms.data_pad_len = spu->spu_gcm_ccm_pad_len(
1460 ctx->cipher.mode,
1461 aead_parms.assoc_size + chunksize);
1462
1463 req_opts.is_rfc4543 = true;
1464 }
1465
1466 if (spu_req_incl_icv(ctx->cipher.mode, rctx->is_encrypt)) {
1467 incl_icv = true;
1468 tx_frag_num++;
1469 /* Copy ICV from end of src scatterlist to digest buf */
1470 sg_copy_part_to_buf(req->src, rctx->msg_buf.digest, digestsize,
1471 req->assoclen + rctx->total_sent -
1472 digestsize);
1473 }
1474
1475 atomic64_add(chunksize, &iproc_priv.bytes_out);
1476
1477 flow_log("%s()-sent chunksize:%u\n", __func__, chunksize);
1478
1479 /* Prepend SPU header with type 3 BCM header */
1480 memcpy(rctx->msg_buf.bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
1481
1482 spu_hdr_len = spu->spu_create_request(rctx->msg_buf.bcm_spu_req_hdr +
1483 BCM_HDR_LEN, &req_opts,
1484 &cipher_parms, &hash_parms,
1485 &aead_parms, chunksize);
1486
1487 /* Determine total length of padding. Put all padding in one buffer. */
1488 db_size = spu_real_db_size(aead_parms.assoc_size, aead_parms.iv_len, 0,
1489 chunksize, aead_parms.aad_pad_len,
1490 aead_parms.data_pad_len, 0);
1491
1492 stat_pad_len = spu->spu_wordalign_padlen(db_size);
1493
1494 if (stat_pad_len)
1495 rx_frag_num++;
1496 pad_len = aead_parms.data_pad_len + stat_pad_len;
1497 if (pad_len) {
1498 tx_frag_num++;
1499 spu->spu_request_pad(rctx->msg_buf.spu_req_pad,
1500 aead_parms.data_pad_len, 0,
1501 ctx->auth.alg, ctx->auth.mode,
1502 rctx->total_sent, stat_pad_len);
1503 }
1504
1505 spu->spu_dump_msg_hdr(rctx->msg_buf.bcm_spu_req_hdr + BCM_HDR_LEN,
1506 spu_hdr_len);
1507 dump_sg(rctx->assoc, 0, aead_parms.assoc_size);
1508 packet_dump(" aead iv: ", rctx->msg_buf.iv_ctr, aead_parms.iv_len);
1509 packet_log("BD:\n");
1510 dump_sg(rctx->src_sg, rctx->src_skip, chunksize);
1511 packet_dump(" pad: ", rctx->msg_buf.spu_req_pad, pad_len);
1512
1513 /*
1514 * Build mailbox message containing SPU request msg and rx buffers
1515 * to catch response message
1516 */
1517 memset(mssg, 0, sizeof(*mssg));
1518 mssg->type = BRCM_MESSAGE_SPU;
1519 mssg->ctx = rctx; /* Will be returned in response */
1520
1521 /* Create rx scatterlist to catch result */
1522 rx_frag_num += rctx->dst_nents;
1523 resp_len = chunksize;
1524
1525 /*
1526 * Always catch ICV in separate buffer. Have to for GCM/CCM because of
1527 * padding. Have to for SHA-224 and other truncated SHAs because SPU
1528 * sends entire digest back.
1529 */
1530 rx_frag_num++;
1531
1532 if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
1533 (ctx->cipher.mode == CIPHER_MODE_CCM)) && !rctx->is_encrypt) {
1534 /*
1535 * Input is ciphertxt plus ICV, but ICV not incl
1536 * in output.
1537 */
1538 resp_len -= ctx->digestsize;
1539 if (resp_len == 0)
1540 /* no rx frags to catch output data */
1541 rx_frag_num -= rctx->dst_nents;
1542 }
1543
1544 err = spu_aead_rx_sg_create(mssg, req, rctx, rx_frag_num,
1545 aead_parms.assoc_size,
1546 aead_parms.ret_iv_len, resp_len, digestsize,
1547 stat_pad_len);
1548 if (err)
1549 return err;
1550
1551 /* Create tx scatterlist containing SPU request message */
1552 tx_frag_num += rctx->src_nents;
1553 tx_frag_num += assoc_nents;
1554 if (aead_parms.aad_pad_len)
1555 tx_frag_num++;
1556 if (aead_parms.iv_len)
1557 tx_frag_num++;
1558 if (spu->spu_tx_status_len())
1559 tx_frag_num++;
1560 err = spu_aead_tx_sg_create(mssg, rctx, tx_frag_num, spu_hdr_len,
1561 rctx->assoc, aead_parms.assoc_size,
1562 assoc_nents, aead_parms.iv_len, chunksize,
1563 aead_parms.aad_pad_len, pad_len, incl_icv);
1564 if (err)
1565 return err;
1566
1567 err = mailbox_send_message(mssg, req->base.flags, rctx->chan_idx);
1568 if (unlikely(err < 0))
1569 return err;
1570
1571 return -EINPROGRESS;
1572 }
1573
1574 /**
1575 * handle_aead_resp() - Process a SPU response message for an AEAD request.
1576 * @rctx: Crypto request context
1577 */
handle_aead_resp(struct iproc_reqctx_s * rctx)1578 static void handle_aead_resp(struct iproc_reqctx_s *rctx)
1579 {
1580 struct spu_hw *spu = &iproc_priv.spu;
1581 struct crypto_async_request *areq = rctx->parent;
1582 struct aead_request *req = container_of(areq,
1583 struct aead_request, base);
1584 struct iproc_ctx_s *ctx = rctx->ctx;
1585 u32 payload_len;
1586 unsigned int icv_offset;
1587 u32 result_len;
1588
1589 /* See how much data was returned */
1590 payload_len = spu->spu_payload_length(rctx->msg_buf.spu_resp_hdr);
1591 flow_log("payload_len %u\n", payload_len);
1592
1593 /* only count payload */
1594 atomic64_add(payload_len, &iproc_priv.bytes_in);
1595
1596 if (req->assoclen)
1597 packet_dump(" assoc_data ", rctx->msg_buf.a.resp_aad,
1598 req->assoclen);
1599
1600 /*
1601 * Copy the ICV back to the destination
1602 * buffer. In decrypt case, SPU gives us back the digest, but crypto
1603 * API doesn't expect ICV in dst buffer.
1604 */
1605 result_len = req->cryptlen;
1606 if (rctx->is_encrypt) {
1607 icv_offset = req->assoclen + rctx->total_sent;
1608 packet_dump(" ICV: ", rctx->msg_buf.digest, ctx->digestsize);
1609 flow_log("copying ICV to dst sg at offset %u\n", icv_offset);
1610 sg_copy_part_from_buf(req->dst, rctx->msg_buf.digest,
1611 ctx->digestsize, icv_offset);
1612 result_len += ctx->digestsize;
1613 }
1614
1615 packet_log("response data: ");
1616 dump_sg(req->dst, req->assoclen, result_len);
1617
1618 atomic_inc(&iproc_priv.op_counts[SPU_OP_AEAD]);
1619 if (ctx->cipher.alg == CIPHER_ALG_AES) {
1620 if (ctx->cipher.mode == CIPHER_MODE_CCM)
1621 atomic_inc(&iproc_priv.aead_cnt[AES_CCM]);
1622 else if (ctx->cipher.mode == CIPHER_MODE_GCM)
1623 atomic_inc(&iproc_priv.aead_cnt[AES_GCM]);
1624 else
1625 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
1626 } else {
1627 atomic_inc(&iproc_priv.aead_cnt[AUTHENC]);
1628 }
1629 }
1630
1631 /**
1632 * spu_chunk_cleanup() - Do cleanup after processing one chunk of a request
1633 * @rctx: request context
1634 *
1635 * Mailbox scatterlists are allocated for each chunk. So free them after
1636 * processing each chunk.
1637 */
spu_chunk_cleanup(struct iproc_reqctx_s * rctx)1638 static void spu_chunk_cleanup(struct iproc_reqctx_s *rctx)
1639 {
1640 /* mailbox message used to tx request */
1641 struct brcm_message *mssg = &rctx->mb_mssg;
1642
1643 kfree(mssg->spu.src);
1644 kfree(mssg->spu.dst);
1645 memset(mssg, 0, sizeof(struct brcm_message));
1646 }
1647
1648 /**
1649 * finish_req() - Used to invoke the complete callback from the requester when
1650 * a request has been handled asynchronously.
1651 * @rctx: Request context
1652 * @err: Indicates whether the request was successful or not
1653 *
1654 * Ensures that cleanup has been done for request
1655 */
finish_req(struct iproc_reqctx_s * rctx,int err)1656 static void finish_req(struct iproc_reqctx_s *rctx, int err)
1657 {
1658 struct crypto_async_request *areq = rctx->parent;
1659
1660 flow_log("%s() err:%d\n\n", __func__, err);
1661
1662 /* No harm done if already called */
1663 spu_chunk_cleanup(rctx);
1664
1665 if (areq)
1666 areq->complete(areq, err);
1667 }
1668
1669 /**
1670 * spu_rx_callback() - Callback from mailbox framework with a SPU response.
1671 * @cl: mailbox client structure for SPU driver
1672 * @msg: mailbox message containing SPU response
1673 */
spu_rx_callback(struct mbox_client * cl,void * msg)1674 static void spu_rx_callback(struct mbox_client *cl, void *msg)
1675 {
1676 struct spu_hw *spu = &iproc_priv.spu;
1677 struct brcm_message *mssg = msg;
1678 struct iproc_reqctx_s *rctx;
1679 int err = 0;
1680
1681 rctx = mssg->ctx;
1682 if (unlikely(!rctx)) {
1683 /* This is fatal */
1684 pr_err("%s(): no request context", __func__);
1685 err = -EFAULT;
1686 goto cb_finish;
1687 }
1688
1689 /* process the SPU status */
1690 err = spu->spu_status_process(rctx->msg_buf.rx_stat);
1691 if (err != 0) {
1692 if (err == SPU_INVALID_ICV)
1693 atomic_inc(&iproc_priv.bad_icv);
1694 err = -EBADMSG;
1695 goto cb_finish;
1696 }
1697
1698 /* Process the SPU response message */
1699 switch (rctx->ctx->alg->type) {
1700 case CRYPTO_ALG_TYPE_ABLKCIPHER:
1701 handle_ablkcipher_resp(rctx);
1702 break;
1703 case CRYPTO_ALG_TYPE_AHASH:
1704 handle_ahash_resp(rctx);
1705 break;
1706 case CRYPTO_ALG_TYPE_AEAD:
1707 handle_aead_resp(rctx);
1708 break;
1709 default:
1710 err = -EINVAL;
1711 goto cb_finish;
1712 }
1713
1714 /*
1715 * If this response does not complete the request, then send the next
1716 * request chunk.
1717 */
1718 if (rctx->total_sent < rctx->total_todo) {
1719 /* Deallocate anything specific to previous chunk */
1720 spu_chunk_cleanup(rctx);
1721
1722 switch (rctx->ctx->alg->type) {
1723 case CRYPTO_ALG_TYPE_ABLKCIPHER:
1724 err = handle_ablkcipher_req(rctx);
1725 break;
1726 case CRYPTO_ALG_TYPE_AHASH:
1727 err = handle_ahash_req(rctx);
1728 if (err == -EAGAIN)
1729 /*
1730 * we saved data in hash carry, but tell crypto
1731 * API we successfully completed request.
1732 */
1733 err = 0;
1734 break;
1735 case CRYPTO_ALG_TYPE_AEAD:
1736 err = handle_aead_req(rctx);
1737 break;
1738 default:
1739 err = -EINVAL;
1740 }
1741
1742 if (err == -EINPROGRESS)
1743 /* Successfully submitted request for next chunk */
1744 return;
1745 }
1746
1747 cb_finish:
1748 finish_req(rctx, err);
1749 }
1750
1751 /* ==================== Kernel Cryptographic API ==================== */
1752
1753 /**
1754 * ablkcipher_enqueue() - Handle ablkcipher encrypt or decrypt request.
1755 * @req: Crypto API request
1756 * @encrypt: true if encrypting; false if decrypting
1757 *
1758 * Return: -EINPROGRESS if request accepted and result will be returned
1759 * asynchronously
1760 * < 0 if an error
1761 */
ablkcipher_enqueue(struct ablkcipher_request * req,bool encrypt)1762 static int ablkcipher_enqueue(struct ablkcipher_request *req, bool encrypt)
1763 {
1764 struct iproc_reqctx_s *rctx = ablkcipher_request_ctx(req);
1765 struct iproc_ctx_s *ctx =
1766 crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
1767 int err;
1768
1769 flow_log("%s() enc:%u\n", __func__, encrypt);
1770
1771 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
1772 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
1773 rctx->parent = &req->base;
1774 rctx->is_encrypt = encrypt;
1775 rctx->bd_suppress = false;
1776 rctx->total_todo = req->nbytes;
1777 rctx->src_sent = 0;
1778 rctx->total_sent = 0;
1779 rctx->total_received = 0;
1780 rctx->ctx = ctx;
1781
1782 /* Initialize current position in src and dst scatterlists */
1783 rctx->src_sg = req->src;
1784 rctx->src_nents = 0;
1785 rctx->src_skip = 0;
1786 rctx->dst_sg = req->dst;
1787 rctx->dst_nents = 0;
1788 rctx->dst_skip = 0;
1789
1790 if (ctx->cipher.mode == CIPHER_MODE_CBC ||
1791 ctx->cipher.mode == CIPHER_MODE_CTR ||
1792 ctx->cipher.mode == CIPHER_MODE_OFB ||
1793 ctx->cipher.mode == CIPHER_MODE_XTS ||
1794 ctx->cipher.mode == CIPHER_MODE_GCM ||
1795 ctx->cipher.mode == CIPHER_MODE_CCM) {
1796 rctx->iv_ctr_len =
1797 crypto_ablkcipher_ivsize(crypto_ablkcipher_reqtfm(req));
1798 memcpy(rctx->msg_buf.iv_ctr, req->info, rctx->iv_ctr_len);
1799 } else {
1800 rctx->iv_ctr_len = 0;
1801 }
1802
1803 /* Choose a SPU to process this request */
1804 rctx->chan_idx = select_channel();
1805 err = handle_ablkcipher_req(rctx);
1806 if (err != -EINPROGRESS)
1807 /* synchronous result */
1808 spu_chunk_cleanup(rctx);
1809
1810 return err;
1811 }
1812
des_setkey(struct crypto_ablkcipher * cipher,const u8 * key,unsigned int keylen)1813 static int des_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1814 unsigned int keylen)
1815 {
1816 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1817 u32 tmp[DES_EXPKEY_WORDS];
1818
1819 if (keylen == DES_KEY_SIZE) {
1820 if (des_ekey(tmp, key) == 0) {
1821 if (crypto_ablkcipher_get_flags(cipher) &
1822 CRYPTO_TFM_REQ_WEAK_KEY) {
1823 u32 flags = CRYPTO_TFM_RES_WEAK_KEY;
1824
1825 crypto_ablkcipher_set_flags(cipher, flags);
1826 return -EINVAL;
1827 }
1828 }
1829
1830 ctx->cipher_type = CIPHER_TYPE_DES;
1831 } else {
1832 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
1833 return -EINVAL;
1834 }
1835 return 0;
1836 }
1837
threedes_setkey(struct crypto_ablkcipher * cipher,const u8 * key,unsigned int keylen)1838 static int threedes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1839 unsigned int keylen)
1840 {
1841 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1842
1843 if (keylen == (DES_KEY_SIZE * 3)) {
1844 const u32 *K = (const u32 *)key;
1845 u32 flags = CRYPTO_TFM_RES_BAD_KEY_SCHED;
1846
1847 if (!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
1848 !((K[2] ^ K[4]) | (K[3] ^ K[5]))) {
1849 crypto_ablkcipher_set_flags(cipher, flags);
1850 return -EINVAL;
1851 }
1852
1853 ctx->cipher_type = CIPHER_TYPE_3DES;
1854 } else {
1855 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
1856 return -EINVAL;
1857 }
1858 return 0;
1859 }
1860
aes_setkey(struct crypto_ablkcipher * cipher,const u8 * key,unsigned int keylen)1861 static int aes_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1862 unsigned int keylen)
1863 {
1864 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1865
1866 if (ctx->cipher.mode == CIPHER_MODE_XTS)
1867 /* XTS includes two keys of equal length */
1868 keylen = keylen / 2;
1869
1870 switch (keylen) {
1871 case AES_KEYSIZE_128:
1872 ctx->cipher_type = CIPHER_TYPE_AES128;
1873 break;
1874 case AES_KEYSIZE_192:
1875 ctx->cipher_type = CIPHER_TYPE_AES192;
1876 break;
1877 case AES_KEYSIZE_256:
1878 ctx->cipher_type = CIPHER_TYPE_AES256;
1879 break;
1880 default:
1881 crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
1882 return -EINVAL;
1883 }
1884 WARN_ON((ctx->max_payload != SPU_MAX_PAYLOAD_INF) &&
1885 ((ctx->max_payload % AES_BLOCK_SIZE) != 0));
1886 return 0;
1887 }
1888
rc4_setkey(struct crypto_ablkcipher * cipher,const u8 * key,unsigned int keylen)1889 static int rc4_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1890 unsigned int keylen)
1891 {
1892 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1893 int i;
1894
1895 ctx->enckeylen = ARC4_MAX_KEY_SIZE + ARC4_STATE_SIZE;
1896
1897 ctx->enckey[0] = 0x00; /* 0x00 */
1898 ctx->enckey[1] = 0x00; /* i */
1899 ctx->enckey[2] = 0x00; /* 0x00 */
1900 ctx->enckey[3] = 0x00; /* j */
1901 for (i = 0; i < ARC4_MAX_KEY_SIZE; i++)
1902 ctx->enckey[i + ARC4_STATE_SIZE] = key[i % keylen];
1903
1904 ctx->cipher_type = CIPHER_TYPE_INIT;
1905
1906 return 0;
1907 }
1908
ablkcipher_setkey(struct crypto_ablkcipher * cipher,const u8 * key,unsigned int keylen)1909 static int ablkcipher_setkey(struct crypto_ablkcipher *cipher, const u8 *key,
1910 unsigned int keylen)
1911 {
1912 struct spu_hw *spu = &iproc_priv.spu;
1913 struct iproc_ctx_s *ctx = crypto_ablkcipher_ctx(cipher);
1914 struct spu_cipher_parms cipher_parms;
1915 u32 alloc_len = 0;
1916 int err;
1917
1918 flow_log("ablkcipher_setkey() keylen: %d\n", keylen);
1919 flow_dump(" key: ", key, keylen);
1920
1921 switch (ctx->cipher.alg) {
1922 case CIPHER_ALG_DES:
1923 err = des_setkey(cipher, key, keylen);
1924 break;
1925 case CIPHER_ALG_3DES:
1926 err = threedes_setkey(cipher, key, keylen);
1927 break;
1928 case CIPHER_ALG_AES:
1929 err = aes_setkey(cipher, key, keylen);
1930 break;
1931 case CIPHER_ALG_RC4:
1932 err = rc4_setkey(cipher, key, keylen);
1933 break;
1934 default:
1935 pr_err("%s() Error: unknown cipher alg\n", __func__);
1936 err = -EINVAL;
1937 }
1938 if (err)
1939 return err;
1940
1941 /* RC4 already populated ctx->enkey */
1942 if (ctx->cipher.alg != CIPHER_ALG_RC4) {
1943 memcpy(ctx->enckey, key, keylen);
1944 ctx->enckeylen = keylen;
1945 }
1946 /* SPU needs XTS keys in the reverse order the crypto API presents */
1947 if ((ctx->cipher.alg == CIPHER_ALG_AES) &&
1948 (ctx->cipher.mode == CIPHER_MODE_XTS)) {
1949 unsigned int xts_keylen = keylen / 2;
1950
1951 memcpy(ctx->enckey, key + xts_keylen, xts_keylen);
1952 memcpy(ctx->enckey + xts_keylen, key, xts_keylen);
1953 }
1954
1955 if (spu->spu_type == SPU_TYPE_SPUM)
1956 alloc_len = BCM_HDR_LEN + SPU_HEADER_ALLOC_LEN;
1957 else if (spu->spu_type == SPU_TYPE_SPU2)
1958 alloc_len = BCM_HDR_LEN + SPU2_HEADER_ALLOC_LEN;
1959 memset(ctx->bcm_spu_req_hdr, 0, alloc_len);
1960 cipher_parms.iv_buf = NULL;
1961 cipher_parms.iv_len = crypto_ablkcipher_ivsize(cipher);
1962 flow_log("%s: iv_len %u\n", __func__, cipher_parms.iv_len);
1963
1964 cipher_parms.alg = ctx->cipher.alg;
1965 cipher_parms.mode = ctx->cipher.mode;
1966 cipher_parms.type = ctx->cipher_type;
1967 cipher_parms.key_buf = ctx->enckey;
1968 cipher_parms.key_len = ctx->enckeylen;
1969
1970 /* Prepend SPU request message with BCM header */
1971 memcpy(ctx->bcm_spu_req_hdr, BCMHEADER, BCM_HDR_LEN);
1972 ctx->spu_req_hdr_len =
1973 spu->spu_cipher_req_init(ctx->bcm_spu_req_hdr + BCM_HDR_LEN,
1974 &cipher_parms);
1975
1976 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
1977 ctx->enckeylen,
1978 false);
1979
1980 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_CIPHER]);
1981
1982 return 0;
1983 }
1984
ablkcipher_encrypt(struct ablkcipher_request * req)1985 static int ablkcipher_encrypt(struct ablkcipher_request *req)
1986 {
1987 flow_log("ablkcipher_encrypt() nbytes:%u\n", req->nbytes);
1988
1989 return ablkcipher_enqueue(req, true);
1990 }
1991
ablkcipher_decrypt(struct ablkcipher_request * req)1992 static int ablkcipher_decrypt(struct ablkcipher_request *req)
1993 {
1994 flow_log("ablkcipher_decrypt() nbytes:%u\n", req->nbytes);
1995 return ablkcipher_enqueue(req, false);
1996 }
1997
ahash_enqueue(struct ahash_request * req)1998 static int ahash_enqueue(struct ahash_request *req)
1999 {
2000 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2001 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2002 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2003 int err = 0;
2004 const char *alg_name;
2005
2006 flow_log("ahash_enqueue() nbytes:%u\n", req->nbytes);
2007
2008 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2009 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2010 rctx->parent = &req->base;
2011 rctx->ctx = ctx;
2012 rctx->bd_suppress = true;
2013 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
2014
2015 /* Initialize position in src scatterlist */
2016 rctx->src_sg = req->src;
2017 rctx->src_skip = 0;
2018 rctx->src_nents = 0;
2019 rctx->dst_sg = NULL;
2020 rctx->dst_skip = 0;
2021 rctx->dst_nents = 0;
2022
2023 /* SPU2 hardware does not compute hash of zero length data */
2024 if ((rctx->is_final == 1) && (rctx->total_todo == 0) &&
2025 (iproc_priv.spu.spu_type == SPU_TYPE_SPU2)) {
2026 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
2027 flow_log("Doing %sfinal %s zero-len hash request in software\n",
2028 rctx->is_final ? "" : "non-", alg_name);
2029 err = do_shash((unsigned char *)alg_name, req->result,
2030 NULL, 0, NULL, 0, ctx->authkey,
2031 ctx->authkeylen);
2032 if (err < 0)
2033 flow_log("Hash request failed with error %d\n", err);
2034 return err;
2035 }
2036 /* Choose a SPU to process this request */
2037 rctx->chan_idx = select_channel();
2038
2039 err = handle_ahash_req(rctx);
2040 if (err != -EINPROGRESS)
2041 /* synchronous result */
2042 spu_chunk_cleanup(rctx);
2043
2044 if (err == -EAGAIN)
2045 /*
2046 * we saved data in hash carry, but tell crypto API
2047 * we successfully completed request.
2048 */
2049 err = 0;
2050
2051 return err;
2052 }
2053
__ahash_init(struct ahash_request * req)2054 static int __ahash_init(struct ahash_request *req)
2055 {
2056 struct spu_hw *spu = &iproc_priv.spu;
2057 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2058 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2059 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2060
2061 flow_log("%s()\n", __func__);
2062
2063 /* Initialize the context */
2064 rctx->hash_carry_len = 0;
2065 rctx->is_final = 0;
2066
2067 rctx->total_todo = 0;
2068 rctx->src_sent = 0;
2069 rctx->total_sent = 0;
2070 rctx->total_received = 0;
2071
2072 ctx->digestsize = crypto_ahash_digestsize(tfm);
2073 /* If we add a hash whose digest is larger, catch it here. */
2074 WARN_ON(ctx->digestsize > MAX_DIGEST_SIZE);
2075
2076 rctx->is_sw_hmac = false;
2077
2078 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen, 0,
2079 true);
2080
2081 return 0;
2082 }
2083
2084 /**
2085 * spu_no_incr_hash() - Determine whether incremental hashing is supported.
2086 * @ctx: Crypto session context
2087 *
2088 * SPU-2 does not support incremental hashing (we'll have to revisit and
2089 * condition based on chip revision or device tree entry if future versions do
2090 * support incremental hash)
2091 *
2092 * SPU-M also doesn't support incremental hashing of AES-XCBC
2093 *
2094 * Return: true if incremental hashing is not supported
2095 * false otherwise
2096 */
spu_no_incr_hash(struct iproc_ctx_s * ctx)2097 bool spu_no_incr_hash(struct iproc_ctx_s *ctx)
2098 {
2099 struct spu_hw *spu = &iproc_priv.spu;
2100
2101 if (spu->spu_type == SPU_TYPE_SPU2)
2102 return true;
2103
2104 if ((ctx->auth.alg == HASH_ALG_AES) &&
2105 (ctx->auth.mode == HASH_MODE_XCBC))
2106 return true;
2107
2108 /* Otherwise, incremental hashing is supported */
2109 return false;
2110 }
2111
ahash_init(struct ahash_request * req)2112 static int ahash_init(struct ahash_request *req)
2113 {
2114 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2115 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2116 const char *alg_name;
2117 struct crypto_shash *hash;
2118 int ret;
2119 gfp_t gfp;
2120
2121 if (spu_no_incr_hash(ctx)) {
2122 /*
2123 * If we get an incremental hashing request and it's not
2124 * supported by the hardware, we need to handle it in software
2125 * by calling synchronous hash functions.
2126 */
2127 alg_name = crypto_tfm_alg_name(crypto_ahash_tfm(tfm));
2128 hash = crypto_alloc_shash(alg_name, 0, 0);
2129 if (IS_ERR(hash)) {
2130 ret = PTR_ERR(hash);
2131 goto err;
2132 }
2133
2134 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2135 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2136 ctx->shash = kmalloc(sizeof(*ctx->shash) +
2137 crypto_shash_descsize(hash), gfp);
2138 if (!ctx->shash) {
2139 ret = -ENOMEM;
2140 goto err_hash;
2141 }
2142 ctx->shash->tfm = hash;
2143 ctx->shash->flags = 0;
2144
2145 /* Set the key using data we already have from setkey */
2146 if (ctx->authkeylen > 0) {
2147 ret = crypto_shash_setkey(hash, ctx->authkey,
2148 ctx->authkeylen);
2149 if (ret)
2150 goto err_shash;
2151 }
2152
2153 /* Initialize hash w/ this key and other params */
2154 ret = crypto_shash_init(ctx->shash);
2155 if (ret)
2156 goto err_shash;
2157 } else {
2158 /* Otherwise call the internal function which uses SPU hw */
2159 ret = __ahash_init(req);
2160 }
2161
2162 return ret;
2163
2164 err_shash:
2165 kfree(ctx->shash);
2166 err_hash:
2167 crypto_free_shash(hash);
2168 err:
2169 return ret;
2170 }
2171
__ahash_update(struct ahash_request * req)2172 static int __ahash_update(struct ahash_request *req)
2173 {
2174 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2175
2176 flow_log("ahash_update() nbytes:%u\n", req->nbytes);
2177
2178 if (!req->nbytes)
2179 return 0;
2180 rctx->total_todo += req->nbytes;
2181 rctx->src_sent = 0;
2182
2183 return ahash_enqueue(req);
2184 }
2185
ahash_update(struct ahash_request * req)2186 static int ahash_update(struct ahash_request *req)
2187 {
2188 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2189 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2190 u8 *tmpbuf;
2191 int ret;
2192 int nents;
2193 gfp_t gfp;
2194
2195 if (spu_no_incr_hash(ctx)) {
2196 /*
2197 * If we get an incremental hashing request and it's not
2198 * supported by the hardware, we need to handle it in software
2199 * by calling synchronous hash functions.
2200 */
2201 if (req->src)
2202 nents = sg_nents(req->src);
2203 else
2204 return -EINVAL;
2205
2206 /* Copy data from req scatterlist to tmp buffer */
2207 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2208 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2209 tmpbuf = kmalloc(req->nbytes, gfp);
2210 if (!tmpbuf)
2211 return -ENOMEM;
2212
2213 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
2214 req->nbytes) {
2215 kfree(tmpbuf);
2216 return -EINVAL;
2217 }
2218
2219 /* Call synchronous update */
2220 ret = crypto_shash_update(ctx->shash, tmpbuf, req->nbytes);
2221 kfree(tmpbuf);
2222 } else {
2223 /* Otherwise call the internal function which uses SPU hw */
2224 ret = __ahash_update(req);
2225 }
2226
2227 return ret;
2228 }
2229
__ahash_final(struct ahash_request * req)2230 static int __ahash_final(struct ahash_request *req)
2231 {
2232 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2233
2234 flow_log("ahash_final() nbytes:%u\n", req->nbytes);
2235
2236 rctx->is_final = 1;
2237
2238 return ahash_enqueue(req);
2239 }
2240
ahash_final(struct ahash_request * req)2241 static int ahash_final(struct ahash_request *req)
2242 {
2243 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2244 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2245 int ret;
2246
2247 if (spu_no_incr_hash(ctx)) {
2248 /*
2249 * If we get an incremental hashing request and it's not
2250 * supported by the hardware, we need to handle it in software
2251 * by calling synchronous hash functions.
2252 */
2253 ret = crypto_shash_final(ctx->shash, req->result);
2254
2255 /* Done with hash, can deallocate it now */
2256 crypto_free_shash(ctx->shash->tfm);
2257 kfree(ctx->shash);
2258
2259 } else {
2260 /* Otherwise call the internal function which uses SPU hw */
2261 ret = __ahash_final(req);
2262 }
2263
2264 return ret;
2265 }
2266
__ahash_finup(struct ahash_request * req)2267 static int __ahash_finup(struct ahash_request *req)
2268 {
2269 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2270
2271 flow_log("ahash_finup() nbytes:%u\n", req->nbytes);
2272
2273 rctx->total_todo += req->nbytes;
2274 rctx->src_sent = 0;
2275 rctx->is_final = 1;
2276
2277 return ahash_enqueue(req);
2278 }
2279
ahash_finup(struct ahash_request * req)2280 static int ahash_finup(struct ahash_request *req)
2281 {
2282 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2283 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2284 u8 *tmpbuf;
2285 int ret;
2286 int nents;
2287 gfp_t gfp;
2288
2289 if (spu_no_incr_hash(ctx)) {
2290 /*
2291 * If we get an incremental hashing request and it's not
2292 * supported by the hardware, we need to handle it in software
2293 * by calling synchronous hash functions.
2294 */
2295 if (req->src) {
2296 nents = sg_nents(req->src);
2297 } else {
2298 ret = -EINVAL;
2299 goto ahash_finup_exit;
2300 }
2301
2302 /* Copy data from req scatterlist to tmp buffer */
2303 gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2304 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2305 tmpbuf = kmalloc(req->nbytes, gfp);
2306 if (!tmpbuf) {
2307 ret = -ENOMEM;
2308 goto ahash_finup_exit;
2309 }
2310
2311 if (sg_copy_to_buffer(req->src, nents, tmpbuf, req->nbytes) !=
2312 req->nbytes) {
2313 ret = -EINVAL;
2314 goto ahash_finup_free;
2315 }
2316
2317 /* Call synchronous update */
2318 ret = crypto_shash_finup(ctx->shash, tmpbuf, req->nbytes,
2319 req->result);
2320 } else {
2321 /* Otherwise call the internal function which uses SPU hw */
2322 return __ahash_finup(req);
2323 }
2324 ahash_finup_free:
2325 kfree(tmpbuf);
2326
2327 ahash_finup_exit:
2328 /* Done with hash, can deallocate it now */
2329 crypto_free_shash(ctx->shash->tfm);
2330 kfree(ctx->shash);
2331 return ret;
2332 }
2333
ahash_digest(struct ahash_request * req)2334 static int ahash_digest(struct ahash_request *req)
2335 {
2336 int err = 0;
2337
2338 flow_log("ahash_digest() nbytes:%u\n", req->nbytes);
2339
2340 /* whole thing at once */
2341 err = __ahash_init(req);
2342 if (!err)
2343 err = __ahash_finup(req);
2344
2345 return err;
2346 }
2347
ahash_setkey(struct crypto_ahash * ahash,const u8 * key,unsigned int keylen)2348 static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key,
2349 unsigned int keylen)
2350 {
2351 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
2352
2353 flow_log("%s() ahash:%p key:%p keylen:%u\n",
2354 __func__, ahash, key, keylen);
2355 flow_dump(" key: ", key, keylen);
2356
2357 if (ctx->auth.alg == HASH_ALG_AES) {
2358 switch (keylen) {
2359 case AES_KEYSIZE_128:
2360 ctx->cipher_type = CIPHER_TYPE_AES128;
2361 break;
2362 case AES_KEYSIZE_192:
2363 ctx->cipher_type = CIPHER_TYPE_AES192;
2364 break;
2365 case AES_KEYSIZE_256:
2366 ctx->cipher_type = CIPHER_TYPE_AES256;
2367 break;
2368 default:
2369 pr_err("%s() Error: Invalid key length\n", __func__);
2370 return -EINVAL;
2371 }
2372 } else {
2373 pr_err("%s() Error: unknown hash alg\n", __func__);
2374 return -EINVAL;
2375 }
2376 memcpy(ctx->authkey, key, keylen);
2377 ctx->authkeylen = keylen;
2378
2379 return 0;
2380 }
2381
ahash_export(struct ahash_request * req,void * out)2382 static int ahash_export(struct ahash_request *req, void *out)
2383 {
2384 const struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2385 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)out;
2386
2387 spu_exp->total_todo = rctx->total_todo;
2388 spu_exp->total_sent = rctx->total_sent;
2389 spu_exp->is_sw_hmac = rctx->is_sw_hmac;
2390 memcpy(spu_exp->hash_carry, rctx->hash_carry, sizeof(rctx->hash_carry));
2391 spu_exp->hash_carry_len = rctx->hash_carry_len;
2392 memcpy(spu_exp->incr_hash, rctx->incr_hash, sizeof(rctx->incr_hash));
2393
2394 return 0;
2395 }
2396
ahash_import(struct ahash_request * req,const void * in)2397 static int ahash_import(struct ahash_request *req, const void *in)
2398 {
2399 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2400 struct spu_hash_export_s *spu_exp = (struct spu_hash_export_s *)in;
2401
2402 rctx->total_todo = spu_exp->total_todo;
2403 rctx->total_sent = spu_exp->total_sent;
2404 rctx->is_sw_hmac = spu_exp->is_sw_hmac;
2405 memcpy(rctx->hash_carry, spu_exp->hash_carry, sizeof(rctx->hash_carry));
2406 rctx->hash_carry_len = spu_exp->hash_carry_len;
2407 memcpy(rctx->incr_hash, spu_exp->incr_hash, sizeof(rctx->incr_hash));
2408
2409 return 0;
2410 }
2411
ahash_hmac_setkey(struct crypto_ahash * ahash,const u8 * key,unsigned int keylen)2412 static int ahash_hmac_setkey(struct crypto_ahash *ahash, const u8 *key,
2413 unsigned int keylen)
2414 {
2415 struct iproc_ctx_s *ctx = crypto_ahash_ctx(ahash);
2416 unsigned int blocksize =
2417 crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash));
2418 unsigned int digestsize = crypto_ahash_digestsize(ahash);
2419 unsigned int index;
2420 int rc;
2421
2422 flow_log("%s() ahash:%p key:%p keylen:%u blksz:%u digestsz:%u\n",
2423 __func__, ahash, key, keylen, blocksize, digestsize);
2424 flow_dump(" key: ", key, keylen);
2425
2426 if (keylen > blocksize) {
2427 switch (ctx->auth.alg) {
2428 case HASH_ALG_MD5:
2429 rc = do_shash("md5", ctx->authkey, key, keylen, NULL,
2430 0, NULL, 0);
2431 break;
2432 case HASH_ALG_SHA1:
2433 rc = do_shash("sha1", ctx->authkey, key, keylen, NULL,
2434 0, NULL, 0);
2435 break;
2436 case HASH_ALG_SHA224:
2437 rc = do_shash("sha224", ctx->authkey, key, keylen, NULL,
2438 0, NULL, 0);
2439 break;
2440 case HASH_ALG_SHA256:
2441 rc = do_shash("sha256", ctx->authkey, key, keylen, NULL,
2442 0, NULL, 0);
2443 break;
2444 case HASH_ALG_SHA384:
2445 rc = do_shash("sha384", ctx->authkey, key, keylen, NULL,
2446 0, NULL, 0);
2447 break;
2448 case HASH_ALG_SHA512:
2449 rc = do_shash("sha512", ctx->authkey, key, keylen, NULL,
2450 0, NULL, 0);
2451 break;
2452 case HASH_ALG_SHA3_224:
2453 rc = do_shash("sha3-224", ctx->authkey, key, keylen,
2454 NULL, 0, NULL, 0);
2455 break;
2456 case HASH_ALG_SHA3_256:
2457 rc = do_shash("sha3-256", ctx->authkey, key, keylen,
2458 NULL, 0, NULL, 0);
2459 break;
2460 case HASH_ALG_SHA3_384:
2461 rc = do_shash("sha3-384", ctx->authkey, key, keylen,
2462 NULL, 0, NULL, 0);
2463 break;
2464 case HASH_ALG_SHA3_512:
2465 rc = do_shash("sha3-512", ctx->authkey, key, keylen,
2466 NULL, 0, NULL, 0);
2467 break;
2468 default:
2469 pr_err("%s() Error: unknown hash alg\n", __func__);
2470 return -EINVAL;
2471 }
2472 if (rc < 0) {
2473 pr_err("%s() Error %d computing shash for %s\n",
2474 __func__, rc, hash_alg_name[ctx->auth.alg]);
2475 return rc;
2476 }
2477 ctx->authkeylen = digestsize;
2478
2479 flow_log(" keylen > digestsize... hashed\n");
2480 flow_dump(" newkey: ", ctx->authkey, ctx->authkeylen);
2481 } else {
2482 memcpy(ctx->authkey, key, keylen);
2483 ctx->authkeylen = keylen;
2484 }
2485
2486 /*
2487 * Full HMAC operation in SPUM is not verified,
2488 * So keeping the generation of IPAD, OPAD and
2489 * outer hashing in software.
2490 */
2491 if (iproc_priv.spu.spu_type == SPU_TYPE_SPUM) {
2492 memcpy(ctx->ipad, ctx->authkey, ctx->authkeylen);
2493 memset(ctx->ipad + ctx->authkeylen, 0,
2494 blocksize - ctx->authkeylen);
2495 ctx->authkeylen = 0;
2496 memcpy(ctx->opad, ctx->ipad, blocksize);
2497
2498 for (index = 0; index < blocksize; index++) {
2499 ctx->ipad[index] ^= HMAC_IPAD_VALUE;
2500 ctx->opad[index] ^= HMAC_OPAD_VALUE;
2501 }
2502
2503 flow_dump(" ipad: ", ctx->ipad, blocksize);
2504 flow_dump(" opad: ", ctx->opad, blocksize);
2505 }
2506 ctx->digestsize = digestsize;
2507 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_HMAC]);
2508
2509 return 0;
2510 }
2511
ahash_hmac_init(struct ahash_request * req)2512 static int ahash_hmac_init(struct ahash_request *req)
2513 {
2514 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2515 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2516 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2517 unsigned int blocksize =
2518 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
2519
2520 flow_log("ahash_hmac_init()\n");
2521
2522 /* init the context as a hash */
2523 ahash_init(req);
2524
2525 if (!spu_no_incr_hash(ctx)) {
2526 /* SPU-M can do incr hashing but needs sw for outer HMAC */
2527 rctx->is_sw_hmac = true;
2528 ctx->auth.mode = HASH_MODE_HASH;
2529 /* start with a prepended ipad */
2530 memcpy(rctx->hash_carry, ctx->ipad, blocksize);
2531 rctx->hash_carry_len = blocksize;
2532 rctx->total_todo += blocksize;
2533 }
2534
2535 return 0;
2536 }
2537
ahash_hmac_update(struct ahash_request * req)2538 static int ahash_hmac_update(struct ahash_request *req)
2539 {
2540 flow_log("ahash_hmac_update() nbytes:%u\n", req->nbytes);
2541
2542 if (!req->nbytes)
2543 return 0;
2544
2545 return ahash_update(req);
2546 }
2547
ahash_hmac_final(struct ahash_request * req)2548 static int ahash_hmac_final(struct ahash_request *req)
2549 {
2550 flow_log("ahash_hmac_final() nbytes:%u\n", req->nbytes);
2551
2552 return ahash_final(req);
2553 }
2554
ahash_hmac_finup(struct ahash_request * req)2555 static int ahash_hmac_finup(struct ahash_request *req)
2556 {
2557 flow_log("ahash_hmac_finupl() nbytes:%u\n", req->nbytes);
2558
2559 return ahash_finup(req);
2560 }
2561
ahash_hmac_digest(struct ahash_request * req)2562 static int ahash_hmac_digest(struct ahash_request *req)
2563 {
2564 struct iproc_reqctx_s *rctx = ahash_request_ctx(req);
2565 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
2566 struct iproc_ctx_s *ctx = crypto_ahash_ctx(tfm);
2567 unsigned int blocksize =
2568 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
2569
2570 flow_log("ahash_hmac_digest() nbytes:%u\n", req->nbytes);
2571
2572 /* Perform initialization and then call finup */
2573 __ahash_init(req);
2574
2575 if (iproc_priv.spu.spu_type == SPU_TYPE_SPU2) {
2576 /*
2577 * SPU2 supports full HMAC implementation in the
2578 * hardware, need not to generate IPAD, OPAD and
2579 * outer hash in software.
2580 * Only for hash key len > hash block size, SPU2
2581 * expects to perform hashing on the key, shorten
2582 * it to digest size and feed it as hash key.
2583 */
2584 rctx->is_sw_hmac = false;
2585 ctx->auth.mode = HASH_MODE_HMAC;
2586 } else {
2587 rctx->is_sw_hmac = true;
2588 ctx->auth.mode = HASH_MODE_HASH;
2589 /* start with a prepended ipad */
2590 memcpy(rctx->hash_carry, ctx->ipad, blocksize);
2591 rctx->hash_carry_len = blocksize;
2592 rctx->total_todo += blocksize;
2593 }
2594
2595 return __ahash_finup(req);
2596 }
2597
2598 /* aead helpers */
2599
aead_need_fallback(struct aead_request * req)2600 static int aead_need_fallback(struct aead_request *req)
2601 {
2602 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2603 struct spu_hw *spu = &iproc_priv.spu;
2604 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2605 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
2606 u32 payload_len;
2607
2608 /*
2609 * SPU hardware cannot handle the AES-GCM/CCM case where plaintext
2610 * and AAD are both 0 bytes long. So use fallback in this case.
2611 */
2612 if (((ctx->cipher.mode == CIPHER_MODE_GCM) ||
2613 (ctx->cipher.mode == CIPHER_MODE_CCM)) &&
2614 (req->assoclen == 0)) {
2615 if ((rctx->is_encrypt && (req->cryptlen == 0)) ||
2616 (!rctx->is_encrypt && (req->cryptlen == ctx->digestsize))) {
2617 flow_log("AES GCM/CCM needs fallback for 0 len req\n");
2618 return 1;
2619 }
2620 }
2621
2622 /* SPU-M hardware only supports CCM digest size of 8, 12, or 16 bytes */
2623 if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
2624 (spu->spu_type == SPU_TYPE_SPUM) &&
2625 (ctx->digestsize != 8) && (ctx->digestsize != 12) &&
2626 (ctx->digestsize != 16)) {
2627 flow_log("%s() AES CCM needs fallback for digest size %d\n",
2628 __func__, ctx->digestsize);
2629 return 1;
2630 }
2631
2632 /*
2633 * SPU-M on NSP has an issue where AES-CCM hash is not correct
2634 * when AAD size is 0
2635 */
2636 if ((ctx->cipher.mode == CIPHER_MODE_CCM) &&
2637 (spu->spu_subtype == SPU_SUBTYPE_SPUM_NSP) &&
2638 (req->assoclen == 0)) {
2639 flow_log("%s() AES_CCM needs fallback for 0 len AAD on NSP\n",
2640 __func__);
2641 return 1;
2642 }
2643
2644 payload_len = req->cryptlen;
2645 if (spu->spu_type == SPU_TYPE_SPUM)
2646 payload_len += req->assoclen;
2647
2648 flow_log("%s() payload len: %u\n", __func__, payload_len);
2649
2650 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
2651 return 0;
2652 else
2653 return payload_len > ctx->max_payload;
2654 }
2655
aead_complete(struct crypto_async_request * areq,int err)2656 static void aead_complete(struct crypto_async_request *areq, int err)
2657 {
2658 struct aead_request *req =
2659 container_of(areq, struct aead_request, base);
2660 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2661 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2662
2663 flow_log("%s() err:%d\n", __func__, err);
2664
2665 areq->tfm = crypto_aead_tfm(aead);
2666
2667 areq->complete = rctx->old_complete;
2668 areq->data = rctx->old_data;
2669
2670 areq->complete(areq, err);
2671 }
2672
aead_do_fallback(struct aead_request * req,bool is_encrypt)2673 static int aead_do_fallback(struct aead_request *req, bool is_encrypt)
2674 {
2675 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2676 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
2677 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2678 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
2679 int err;
2680 u32 req_flags;
2681
2682 flow_log("%s() enc:%u\n", __func__, is_encrypt);
2683
2684 if (ctx->fallback_cipher) {
2685 /* Store the cipher tfm and then use the fallback tfm */
2686 rctx->old_tfm = tfm;
2687 aead_request_set_tfm(req, ctx->fallback_cipher);
2688 /*
2689 * Save the callback and chain ourselves in, so we can restore
2690 * the tfm
2691 */
2692 rctx->old_complete = req->base.complete;
2693 rctx->old_data = req->base.data;
2694 req_flags = aead_request_flags(req);
2695 aead_request_set_callback(req, req_flags, aead_complete, req);
2696 err = is_encrypt ? crypto_aead_encrypt(req) :
2697 crypto_aead_decrypt(req);
2698
2699 if (err == 0) {
2700 /*
2701 * fallback was synchronous (did not return
2702 * -EINPROGRESS). So restore request state here.
2703 */
2704 aead_request_set_callback(req, req_flags,
2705 rctx->old_complete, req);
2706 req->base.data = rctx->old_data;
2707 aead_request_set_tfm(req, aead);
2708 flow_log("%s() fallback completed successfully\n\n",
2709 __func__);
2710 }
2711 } else {
2712 err = -EINVAL;
2713 }
2714
2715 return err;
2716 }
2717
aead_enqueue(struct aead_request * req,bool is_encrypt)2718 static int aead_enqueue(struct aead_request *req, bool is_encrypt)
2719 {
2720 struct iproc_reqctx_s *rctx = aead_request_ctx(req);
2721 struct crypto_aead *aead = crypto_aead_reqtfm(req);
2722 struct iproc_ctx_s *ctx = crypto_aead_ctx(aead);
2723 int err;
2724
2725 flow_log("%s() enc:%u\n", __func__, is_encrypt);
2726
2727 if (req->assoclen > MAX_ASSOC_SIZE) {
2728 pr_err
2729 ("%s() Error: associated data too long. (%u > %u bytes)\n",
2730 __func__, req->assoclen, MAX_ASSOC_SIZE);
2731 return -EINVAL;
2732 }
2733
2734 rctx->gfp = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
2735 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
2736 rctx->parent = &req->base;
2737 rctx->is_encrypt = is_encrypt;
2738 rctx->bd_suppress = false;
2739 rctx->total_todo = req->cryptlen;
2740 rctx->src_sent = 0;
2741 rctx->total_sent = 0;
2742 rctx->total_received = 0;
2743 rctx->is_sw_hmac = false;
2744 rctx->ctx = ctx;
2745 memset(&rctx->mb_mssg, 0, sizeof(struct brcm_message));
2746
2747 /* assoc data is at start of src sg */
2748 rctx->assoc = req->src;
2749
2750 /*
2751 * Init current position in src scatterlist to be after assoc data.
2752 * src_skip set to buffer offset where data begins. (Assoc data could
2753 * end in the middle of a buffer.)
2754 */
2755 if (spu_sg_at_offset(req->src, req->assoclen, &rctx->src_sg,
2756 &rctx->src_skip) < 0) {
2757 pr_err("%s() Error: Unable to find start of src data\n",
2758 __func__);
2759 return -EINVAL;
2760 }
2761
2762 rctx->src_nents = 0;
2763 rctx->dst_nents = 0;
2764 if (req->dst == req->src) {
2765 rctx->dst_sg = rctx->src_sg;
2766 rctx->dst_skip = rctx->src_skip;
2767 } else {
2768 /*
2769 * Expect req->dst to have room for assoc data followed by
2770 * output data and ICV, if encrypt. So initialize dst_sg
2771 * to point beyond assoc len offset.
2772 */
2773 if (spu_sg_at_offset(req->dst, req->assoclen, &rctx->dst_sg,
2774 &rctx->dst_skip) < 0) {
2775 pr_err("%s() Error: Unable to find start of dst data\n",
2776 __func__);
2777 return -EINVAL;
2778 }
2779 }
2780
2781 if (ctx->cipher.mode == CIPHER_MODE_CBC ||
2782 ctx->cipher.mode == CIPHER_MODE_CTR ||
2783 ctx->cipher.mode == CIPHER_MODE_OFB ||
2784 ctx->cipher.mode == CIPHER_MODE_XTS ||
2785 ctx->cipher.mode == CIPHER_MODE_GCM) {
2786 rctx->iv_ctr_len =
2787 ctx->salt_len +
2788 crypto_aead_ivsize(crypto_aead_reqtfm(req));
2789 } else if (ctx->cipher.mode == CIPHER_MODE_CCM) {
2790 rctx->iv_ctr_len = CCM_AES_IV_SIZE;
2791 } else {
2792 rctx->iv_ctr_len = 0;
2793 }
2794
2795 rctx->hash_carry_len = 0;
2796
2797 flow_log(" src sg: %p\n", req->src);
2798 flow_log(" rctx->src_sg: %p, src_skip %u\n",
2799 rctx->src_sg, rctx->src_skip);
2800 flow_log(" assoc: %p, assoclen %u\n", rctx->assoc, req->assoclen);
2801 flow_log(" dst sg: %p\n", req->dst);
2802 flow_log(" rctx->dst_sg: %p, dst_skip %u\n",
2803 rctx->dst_sg, rctx->dst_skip);
2804 flow_log(" iv_ctr_len:%u\n", rctx->iv_ctr_len);
2805 flow_dump(" iv: ", req->iv, rctx->iv_ctr_len);
2806 flow_log(" authkeylen:%u\n", ctx->authkeylen);
2807 flow_log(" is_esp: %s\n", ctx->is_esp ? "yes" : "no");
2808
2809 if (ctx->max_payload == SPU_MAX_PAYLOAD_INF)
2810 flow_log(" max_payload infinite");
2811 else
2812 flow_log(" max_payload: %u\n", ctx->max_payload);
2813
2814 if (unlikely(aead_need_fallback(req)))
2815 return aead_do_fallback(req, is_encrypt);
2816
2817 /*
2818 * Do memory allocations for request after fallback check, because if we
2819 * do fallback, we won't call finish_req() to dealloc.
2820 */
2821 if (rctx->iv_ctr_len) {
2822 if (ctx->salt_len)
2823 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset,
2824 ctx->salt, ctx->salt_len);
2825 memcpy(rctx->msg_buf.iv_ctr + ctx->salt_offset + ctx->salt_len,
2826 req->iv,
2827 rctx->iv_ctr_len - ctx->salt_len - ctx->salt_offset);
2828 }
2829
2830 rctx->chan_idx = select_channel();
2831 err = handle_aead_req(rctx);
2832 if (err != -EINPROGRESS)
2833 /* synchronous result */
2834 spu_chunk_cleanup(rctx);
2835
2836 return err;
2837 }
2838
aead_authenc_setkey(struct crypto_aead * cipher,const u8 * key,unsigned int keylen)2839 static int aead_authenc_setkey(struct crypto_aead *cipher,
2840 const u8 *key, unsigned int keylen)
2841 {
2842 struct spu_hw *spu = &iproc_priv.spu;
2843 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
2844 struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
2845 struct crypto_authenc_keys keys;
2846 int ret;
2847
2848 flow_log("%s() aead:%p key:%p keylen:%u\n", __func__, cipher, key,
2849 keylen);
2850 flow_dump(" key: ", key, keylen);
2851
2852 ret = crypto_authenc_extractkeys(&keys, key, keylen);
2853 if (ret)
2854 goto badkey;
2855
2856 if (keys.enckeylen > MAX_KEY_SIZE ||
2857 keys.authkeylen > MAX_KEY_SIZE)
2858 goto badkey;
2859
2860 ctx->enckeylen = keys.enckeylen;
2861 ctx->authkeylen = keys.authkeylen;
2862
2863 memcpy(ctx->enckey, keys.enckey, keys.enckeylen);
2864 /* May end up padding auth key. So make sure it's zeroed. */
2865 memset(ctx->authkey, 0, sizeof(ctx->authkey));
2866 memcpy(ctx->authkey, keys.authkey, keys.authkeylen);
2867
2868 switch (ctx->alg->cipher_info.alg) {
2869 case CIPHER_ALG_DES:
2870 if (ctx->enckeylen == DES_KEY_SIZE) {
2871 u32 tmp[DES_EXPKEY_WORDS];
2872 u32 flags = CRYPTO_TFM_RES_WEAK_KEY;
2873
2874 if (des_ekey(tmp, keys.enckey) == 0) {
2875 if (crypto_aead_get_flags(cipher) &
2876 CRYPTO_TFM_REQ_WEAK_KEY) {
2877 crypto_aead_set_flags(cipher, flags);
2878 return -EINVAL;
2879 }
2880 }
2881
2882 ctx->cipher_type = CIPHER_TYPE_DES;
2883 } else {
2884 goto badkey;
2885 }
2886 break;
2887 case CIPHER_ALG_3DES:
2888 if (ctx->enckeylen == (DES_KEY_SIZE * 3)) {
2889 const u32 *K = (const u32 *)keys.enckey;
2890 u32 flags = CRYPTO_TFM_RES_BAD_KEY_SCHED;
2891
2892 if (!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
2893 !((K[2] ^ K[4]) | (K[3] ^ K[5]))) {
2894 crypto_aead_set_flags(cipher, flags);
2895 return -EINVAL;
2896 }
2897
2898 ctx->cipher_type = CIPHER_TYPE_3DES;
2899 } else {
2900 crypto_aead_set_flags(cipher,
2901 CRYPTO_TFM_RES_BAD_KEY_LEN);
2902 return -EINVAL;
2903 }
2904 break;
2905 case CIPHER_ALG_AES:
2906 switch (ctx->enckeylen) {
2907 case AES_KEYSIZE_128:
2908 ctx->cipher_type = CIPHER_TYPE_AES128;
2909 break;
2910 case AES_KEYSIZE_192:
2911 ctx->cipher_type = CIPHER_TYPE_AES192;
2912 break;
2913 case AES_KEYSIZE_256:
2914 ctx->cipher_type = CIPHER_TYPE_AES256;
2915 break;
2916 default:
2917 goto badkey;
2918 }
2919 break;
2920 case CIPHER_ALG_RC4:
2921 ctx->cipher_type = CIPHER_TYPE_INIT;
2922 break;
2923 default:
2924 pr_err("%s() Error: Unknown cipher alg\n", __func__);
2925 return -EINVAL;
2926 }
2927
2928 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
2929 ctx->authkeylen);
2930 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
2931 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
2932
2933 /* setkey the fallback just in case we needto use it */
2934 if (ctx->fallback_cipher) {
2935 flow_log(" running fallback setkey()\n");
2936
2937 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
2938 ctx->fallback_cipher->base.crt_flags |=
2939 tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
2940 ret = crypto_aead_setkey(ctx->fallback_cipher, key, keylen);
2941 if (ret) {
2942 flow_log(" fallback setkey() returned:%d\n", ret);
2943 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
2944 tfm->crt_flags |=
2945 (ctx->fallback_cipher->base.crt_flags &
2946 CRYPTO_TFM_RES_MASK);
2947 }
2948 }
2949
2950 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
2951 ctx->enckeylen,
2952 false);
2953
2954 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
2955
2956 return ret;
2957
2958 badkey:
2959 ctx->enckeylen = 0;
2960 ctx->authkeylen = 0;
2961 ctx->digestsize = 0;
2962
2963 crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
2964 return -EINVAL;
2965 }
2966
aead_gcm_ccm_setkey(struct crypto_aead * cipher,const u8 * key,unsigned int keylen)2967 static int aead_gcm_ccm_setkey(struct crypto_aead *cipher,
2968 const u8 *key, unsigned int keylen)
2969 {
2970 struct spu_hw *spu = &iproc_priv.spu;
2971 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
2972 struct crypto_tfm *tfm = crypto_aead_tfm(cipher);
2973
2974 int ret = 0;
2975
2976 flow_log("%s() keylen:%u\n", __func__, keylen);
2977 flow_dump(" key: ", key, keylen);
2978
2979 if (!ctx->is_esp)
2980 ctx->digestsize = keylen;
2981
2982 ctx->enckeylen = keylen;
2983 ctx->authkeylen = 0;
2984 memcpy(ctx->enckey, key, ctx->enckeylen);
2985
2986 switch (ctx->enckeylen) {
2987 case AES_KEYSIZE_128:
2988 ctx->cipher_type = CIPHER_TYPE_AES128;
2989 break;
2990 case AES_KEYSIZE_192:
2991 ctx->cipher_type = CIPHER_TYPE_AES192;
2992 break;
2993 case AES_KEYSIZE_256:
2994 ctx->cipher_type = CIPHER_TYPE_AES256;
2995 break;
2996 default:
2997 goto badkey;
2998 }
2999
3000 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
3001 ctx->authkeylen);
3002 flow_dump(" enc: ", ctx->enckey, ctx->enckeylen);
3003 flow_dump(" auth: ", ctx->authkey, ctx->authkeylen);
3004
3005 /* setkey the fallback just in case we need to use it */
3006 if (ctx->fallback_cipher) {
3007 flow_log(" running fallback setkey()\n");
3008
3009 ctx->fallback_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
3010 ctx->fallback_cipher->base.crt_flags |=
3011 tfm->crt_flags & CRYPTO_TFM_REQ_MASK;
3012 ret = crypto_aead_setkey(ctx->fallback_cipher, key,
3013 keylen + ctx->salt_len);
3014 if (ret) {
3015 flow_log(" fallback setkey() returned:%d\n", ret);
3016 tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
3017 tfm->crt_flags |=
3018 (ctx->fallback_cipher->base.crt_flags &
3019 CRYPTO_TFM_RES_MASK);
3020 }
3021 }
3022
3023 ctx->spu_resp_hdr_len = spu->spu_response_hdr_len(ctx->authkeylen,
3024 ctx->enckeylen,
3025 false);
3026
3027 atomic_inc(&iproc_priv.setkey_cnt[SPU_OP_AEAD]);
3028
3029 flow_log(" enckeylen:%u authkeylen:%u\n", ctx->enckeylen,
3030 ctx->authkeylen);
3031
3032 return ret;
3033
3034 badkey:
3035 ctx->enckeylen = 0;
3036 ctx->authkeylen = 0;
3037 ctx->digestsize = 0;
3038
3039 crypto_aead_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
3040 return -EINVAL;
3041 }
3042
3043 /**
3044 * aead_gcm_esp_setkey() - setkey() operation for ESP variant of GCM AES.
3045 * @cipher: AEAD structure
3046 * @key: Key followed by 4 bytes of salt
3047 * @keylen: Length of key plus salt, in bytes
3048 *
3049 * Extracts salt from key and stores it to be prepended to IV on each request.
3050 * Digest is always 16 bytes
3051 *
3052 * Return: Value from generic gcm setkey.
3053 */
aead_gcm_esp_setkey(struct crypto_aead * cipher,const u8 * key,unsigned int keylen)3054 static int aead_gcm_esp_setkey(struct crypto_aead *cipher,
3055 const u8 *key, unsigned int keylen)
3056 {
3057 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3058
3059 flow_log("%s\n", __func__);
3060 ctx->salt_len = GCM_ESP_SALT_SIZE;
3061 ctx->salt_offset = GCM_ESP_SALT_OFFSET;
3062 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
3063 keylen -= GCM_ESP_SALT_SIZE;
3064 ctx->digestsize = GCM_ESP_DIGESTSIZE;
3065 ctx->is_esp = true;
3066 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
3067
3068 return aead_gcm_ccm_setkey(cipher, key, keylen);
3069 }
3070
3071 /**
3072 * rfc4543_gcm_esp_setkey() - setkey operation for RFC4543 variant of GCM/GMAC.
3073 * cipher: AEAD structure
3074 * key: Key followed by 4 bytes of salt
3075 * keylen: Length of key plus salt, in bytes
3076 *
3077 * Extracts salt from key and stores it to be prepended to IV on each request.
3078 * Digest is always 16 bytes
3079 *
3080 * Return: Value from generic gcm setkey.
3081 */
rfc4543_gcm_esp_setkey(struct crypto_aead * cipher,const u8 * key,unsigned int keylen)3082 static int rfc4543_gcm_esp_setkey(struct crypto_aead *cipher,
3083 const u8 *key, unsigned int keylen)
3084 {
3085 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3086
3087 flow_log("%s\n", __func__);
3088 ctx->salt_len = GCM_ESP_SALT_SIZE;
3089 ctx->salt_offset = GCM_ESP_SALT_OFFSET;
3090 memcpy(ctx->salt, key + keylen - GCM_ESP_SALT_SIZE, GCM_ESP_SALT_SIZE);
3091 keylen -= GCM_ESP_SALT_SIZE;
3092 ctx->digestsize = GCM_ESP_DIGESTSIZE;
3093 ctx->is_esp = true;
3094 ctx->is_rfc4543 = true;
3095 flow_dump("salt: ", ctx->salt, GCM_ESP_SALT_SIZE);
3096
3097 return aead_gcm_ccm_setkey(cipher, key, keylen);
3098 }
3099
3100 /**
3101 * aead_ccm_esp_setkey() - setkey() operation for ESP variant of CCM AES.
3102 * @cipher: AEAD structure
3103 * @key: Key followed by 4 bytes of salt
3104 * @keylen: Length of key plus salt, in bytes
3105 *
3106 * Extracts salt from key and stores it to be prepended to IV on each request.
3107 * Digest is always 16 bytes
3108 *
3109 * Return: Value from generic ccm setkey.
3110 */
aead_ccm_esp_setkey(struct crypto_aead * cipher,const u8 * key,unsigned int keylen)3111 static int aead_ccm_esp_setkey(struct crypto_aead *cipher,
3112 const u8 *key, unsigned int keylen)
3113 {
3114 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3115
3116 flow_log("%s\n", __func__);
3117 ctx->salt_len = CCM_ESP_SALT_SIZE;
3118 ctx->salt_offset = CCM_ESP_SALT_OFFSET;
3119 memcpy(ctx->salt, key + keylen - CCM_ESP_SALT_SIZE, CCM_ESP_SALT_SIZE);
3120 keylen -= CCM_ESP_SALT_SIZE;
3121 ctx->is_esp = true;
3122 flow_dump("salt: ", ctx->salt, CCM_ESP_SALT_SIZE);
3123
3124 return aead_gcm_ccm_setkey(cipher, key, keylen);
3125 }
3126
aead_setauthsize(struct crypto_aead * cipher,unsigned int authsize)3127 static int aead_setauthsize(struct crypto_aead *cipher, unsigned int authsize)
3128 {
3129 struct iproc_ctx_s *ctx = crypto_aead_ctx(cipher);
3130 int ret = 0;
3131
3132 flow_log("%s() authkeylen:%u authsize:%u\n",
3133 __func__, ctx->authkeylen, authsize);
3134
3135 ctx->digestsize = authsize;
3136
3137 /* setkey the fallback just in case we needto use it */
3138 if (ctx->fallback_cipher) {
3139 flow_log(" running fallback setauth()\n");
3140
3141 ret = crypto_aead_setauthsize(ctx->fallback_cipher, authsize);
3142 if (ret)
3143 flow_log(" fallback setauth() returned:%d\n", ret);
3144 }
3145
3146 return ret;
3147 }
3148
aead_encrypt(struct aead_request * req)3149 static int aead_encrypt(struct aead_request *req)
3150 {
3151 flow_log("%s() cryptlen:%u %08x\n", __func__, req->cryptlen,
3152 req->cryptlen);
3153 dump_sg(req->src, 0, req->cryptlen + req->assoclen);
3154 flow_log(" assoc_len:%u\n", req->assoclen);
3155
3156 return aead_enqueue(req, true);
3157 }
3158
aead_decrypt(struct aead_request * req)3159 static int aead_decrypt(struct aead_request *req)
3160 {
3161 flow_log("%s() cryptlen:%u\n", __func__, req->cryptlen);
3162 dump_sg(req->src, 0, req->cryptlen + req->assoclen);
3163 flow_log(" assoc_len:%u\n", req->assoclen);
3164
3165 return aead_enqueue(req, false);
3166 }
3167
3168 /* ==================== Supported Cipher Algorithms ==================== */
3169
3170 static struct iproc_alg_s driver_algs[] = {
3171 {
3172 .type = CRYPTO_ALG_TYPE_AEAD,
3173 .alg.aead = {
3174 .base = {
3175 .cra_name = "gcm(aes)",
3176 .cra_driver_name = "gcm-aes-iproc",
3177 .cra_blocksize = AES_BLOCK_SIZE,
3178 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3179 },
3180 .setkey = aead_gcm_ccm_setkey,
3181 .ivsize = GCM_AES_IV_SIZE,
3182 .maxauthsize = AES_BLOCK_SIZE,
3183 },
3184 .cipher_info = {
3185 .alg = CIPHER_ALG_AES,
3186 .mode = CIPHER_MODE_GCM,
3187 },
3188 .auth_info = {
3189 .alg = HASH_ALG_AES,
3190 .mode = HASH_MODE_GCM,
3191 },
3192 .auth_first = 0,
3193 },
3194 {
3195 .type = CRYPTO_ALG_TYPE_AEAD,
3196 .alg.aead = {
3197 .base = {
3198 .cra_name = "ccm(aes)",
3199 .cra_driver_name = "ccm-aes-iproc",
3200 .cra_blocksize = AES_BLOCK_SIZE,
3201 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3202 },
3203 .setkey = aead_gcm_ccm_setkey,
3204 .ivsize = CCM_AES_IV_SIZE,
3205 .maxauthsize = AES_BLOCK_SIZE,
3206 },
3207 .cipher_info = {
3208 .alg = CIPHER_ALG_AES,
3209 .mode = CIPHER_MODE_CCM,
3210 },
3211 .auth_info = {
3212 .alg = HASH_ALG_AES,
3213 .mode = HASH_MODE_CCM,
3214 },
3215 .auth_first = 0,
3216 },
3217 {
3218 .type = CRYPTO_ALG_TYPE_AEAD,
3219 .alg.aead = {
3220 .base = {
3221 .cra_name = "rfc4106(gcm(aes))",
3222 .cra_driver_name = "gcm-aes-esp-iproc",
3223 .cra_blocksize = AES_BLOCK_SIZE,
3224 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3225 },
3226 .setkey = aead_gcm_esp_setkey,
3227 .ivsize = GCM_ESP_IV_SIZE,
3228 .maxauthsize = AES_BLOCK_SIZE,
3229 },
3230 .cipher_info = {
3231 .alg = CIPHER_ALG_AES,
3232 .mode = CIPHER_MODE_GCM,
3233 },
3234 .auth_info = {
3235 .alg = HASH_ALG_AES,
3236 .mode = HASH_MODE_GCM,
3237 },
3238 .auth_first = 0,
3239 },
3240 {
3241 .type = CRYPTO_ALG_TYPE_AEAD,
3242 .alg.aead = {
3243 .base = {
3244 .cra_name = "rfc4309(ccm(aes))",
3245 .cra_driver_name = "ccm-aes-esp-iproc",
3246 .cra_blocksize = AES_BLOCK_SIZE,
3247 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3248 },
3249 .setkey = aead_ccm_esp_setkey,
3250 .ivsize = CCM_AES_IV_SIZE,
3251 .maxauthsize = AES_BLOCK_SIZE,
3252 },
3253 .cipher_info = {
3254 .alg = CIPHER_ALG_AES,
3255 .mode = CIPHER_MODE_CCM,
3256 },
3257 .auth_info = {
3258 .alg = HASH_ALG_AES,
3259 .mode = HASH_MODE_CCM,
3260 },
3261 .auth_first = 0,
3262 },
3263 {
3264 .type = CRYPTO_ALG_TYPE_AEAD,
3265 .alg.aead = {
3266 .base = {
3267 .cra_name = "rfc4543(gcm(aes))",
3268 .cra_driver_name = "gmac-aes-esp-iproc",
3269 .cra_blocksize = AES_BLOCK_SIZE,
3270 .cra_flags = CRYPTO_ALG_NEED_FALLBACK
3271 },
3272 .setkey = rfc4543_gcm_esp_setkey,
3273 .ivsize = GCM_ESP_IV_SIZE,
3274 .maxauthsize = AES_BLOCK_SIZE,
3275 },
3276 .cipher_info = {
3277 .alg = CIPHER_ALG_AES,
3278 .mode = CIPHER_MODE_GCM,
3279 },
3280 .auth_info = {
3281 .alg = HASH_ALG_AES,
3282 .mode = HASH_MODE_GCM,
3283 },
3284 .auth_first = 0,
3285 },
3286 {
3287 .type = CRYPTO_ALG_TYPE_AEAD,
3288 .alg.aead = {
3289 .base = {
3290 .cra_name = "authenc(hmac(md5),cbc(aes))",
3291 .cra_driver_name = "authenc-hmac-md5-cbc-aes-iproc",
3292 .cra_blocksize = AES_BLOCK_SIZE,
3293 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3294 },
3295 .setkey = aead_authenc_setkey,
3296 .ivsize = AES_BLOCK_SIZE,
3297 .maxauthsize = MD5_DIGEST_SIZE,
3298 },
3299 .cipher_info = {
3300 .alg = CIPHER_ALG_AES,
3301 .mode = CIPHER_MODE_CBC,
3302 },
3303 .auth_info = {
3304 .alg = HASH_ALG_MD5,
3305 .mode = HASH_MODE_HMAC,
3306 },
3307 .auth_first = 0,
3308 },
3309 {
3310 .type = CRYPTO_ALG_TYPE_AEAD,
3311 .alg.aead = {
3312 .base = {
3313 .cra_name = "authenc(hmac(sha1),cbc(aes))",
3314 .cra_driver_name = "authenc-hmac-sha1-cbc-aes-iproc",
3315 .cra_blocksize = AES_BLOCK_SIZE,
3316 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3317 },
3318 .setkey = aead_authenc_setkey,
3319 .ivsize = AES_BLOCK_SIZE,
3320 .maxauthsize = SHA1_DIGEST_SIZE,
3321 },
3322 .cipher_info = {
3323 .alg = CIPHER_ALG_AES,
3324 .mode = CIPHER_MODE_CBC,
3325 },
3326 .auth_info = {
3327 .alg = HASH_ALG_SHA1,
3328 .mode = HASH_MODE_HMAC,
3329 },
3330 .auth_first = 0,
3331 },
3332 {
3333 .type = CRYPTO_ALG_TYPE_AEAD,
3334 .alg.aead = {
3335 .base = {
3336 .cra_name = "authenc(hmac(sha256),cbc(aes))",
3337 .cra_driver_name = "authenc-hmac-sha256-cbc-aes-iproc",
3338 .cra_blocksize = AES_BLOCK_SIZE,
3339 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3340 },
3341 .setkey = aead_authenc_setkey,
3342 .ivsize = AES_BLOCK_SIZE,
3343 .maxauthsize = SHA256_DIGEST_SIZE,
3344 },
3345 .cipher_info = {
3346 .alg = CIPHER_ALG_AES,
3347 .mode = CIPHER_MODE_CBC,
3348 },
3349 .auth_info = {
3350 .alg = HASH_ALG_SHA256,
3351 .mode = HASH_MODE_HMAC,
3352 },
3353 .auth_first = 0,
3354 },
3355 {
3356 .type = CRYPTO_ALG_TYPE_AEAD,
3357 .alg.aead = {
3358 .base = {
3359 .cra_name = "authenc(hmac(md5),cbc(des))",
3360 .cra_driver_name = "authenc-hmac-md5-cbc-des-iproc",
3361 .cra_blocksize = DES_BLOCK_SIZE,
3362 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3363 },
3364 .setkey = aead_authenc_setkey,
3365 .ivsize = DES_BLOCK_SIZE,
3366 .maxauthsize = MD5_DIGEST_SIZE,
3367 },
3368 .cipher_info = {
3369 .alg = CIPHER_ALG_DES,
3370 .mode = CIPHER_MODE_CBC,
3371 },
3372 .auth_info = {
3373 .alg = HASH_ALG_MD5,
3374 .mode = HASH_MODE_HMAC,
3375 },
3376 .auth_first = 0,
3377 },
3378 {
3379 .type = CRYPTO_ALG_TYPE_AEAD,
3380 .alg.aead = {
3381 .base = {
3382 .cra_name = "authenc(hmac(sha1),cbc(des))",
3383 .cra_driver_name = "authenc-hmac-sha1-cbc-des-iproc",
3384 .cra_blocksize = DES_BLOCK_SIZE,
3385 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3386 },
3387 .setkey = aead_authenc_setkey,
3388 .ivsize = DES_BLOCK_SIZE,
3389 .maxauthsize = SHA1_DIGEST_SIZE,
3390 },
3391 .cipher_info = {
3392 .alg = CIPHER_ALG_DES,
3393 .mode = CIPHER_MODE_CBC,
3394 },
3395 .auth_info = {
3396 .alg = HASH_ALG_SHA1,
3397 .mode = HASH_MODE_HMAC,
3398 },
3399 .auth_first = 0,
3400 },
3401 {
3402 .type = CRYPTO_ALG_TYPE_AEAD,
3403 .alg.aead = {
3404 .base = {
3405 .cra_name = "authenc(hmac(sha224),cbc(des))",
3406 .cra_driver_name = "authenc-hmac-sha224-cbc-des-iproc",
3407 .cra_blocksize = DES_BLOCK_SIZE,
3408 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3409 },
3410 .setkey = aead_authenc_setkey,
3411 .ivsize = DES_BLOCK_SIZE,
3412 .maxauthsize = SHA224_DIGEST_SIZE,
3413 },
3414 .cipher_info = {
3415 .alg = CIPHER_ALG_DES,
3416 .mode = CIPHER_MODE_CBC,
3417 },
3418 .auth_info = {
3419 .alg = HASH_ALG_SHA224,
3420 .mode = HASH_MODE_HMAC,
3421 },
3422 .auth_first = 0,
3423 },
3424 {
3425 .type = CRYPTO_ALG_TYPE_AEAD,
3426 .alg.aead = {
3427 .base = {
3428 .cra_name = "authenc(hmac(sha256),cbc(des))",
3429 .cra_driver_name = "authenc-hmac-sha256-cbc-des-iproc",
3430 .cra_blocksize = DES_BLOCK_SIZE,
3431 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3432 },
3433 .setkey = aead_authenc_setkey,
3434 .ivsize = DES_BLOCK_SIZE,
3435 .maxauthsize = SHA256_DIGEST_SIZE,
3436 },
3437 .cipher_info = {
3438 .alg = CIPHER_ALG_DES,
3439 .mode = CIPHER_MODE_CBC,
3440 },
3441 .auth_info = {
3442 .alg = HASH_ALG_SHA256,
3443 .mode = HASH_MODE_HMAC,
3444 },
3445 .auth_first = 0,
3446 },
3447 {
3448 .type = CRYPTO_ALG_TYPE_AEAD,
3449 .alg.aead = {
3450 .base = {
3451 .cra_name = "authenc(hmac(sha384),cbc(des))",
3452 .cra_driver_name = "authenc-hmac-sha384-cbc-des-iproc",
3453 .cra_blocksize = DES_BLOCK_SIZE,
3454 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3455 },
3456 .setkey = aead_authenc_setkey,
3457 .ivsize = DES_BLOCK_SIZE,
3458 .maxauthsize = SHA384_DIGEST_SIZE,
3459 },
3460 .cipher_info = {
3461 .alg = CIPHER_ALG_DES,
3462 .mode = CIPHER_MODE_CBC,
3463 },
3464 .auth_info = {
3465 .alg = HASH_ALG_SHA384,
3466 .mode = HASH_MODE_HMAC,
3467 },
3468 .auth_first = 0,
3469 },
3470 {
3471 .type = CRYPTO_ALG_TYPE_AEAD,
3472 .alg.aead = {
3473 .base = {
3474 .cra_name = "authenc(hmac(sha512),cbc(des))",
3475 .cra_driver_name = "authenc-hmac-sha512-cbc-des-iproc",
3476 .cra_blocksize = DES_BLOCK_SIZE,
3477 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3478 },
3479 .setkey = aead_authenc_setkey,
3480 .ivsize = DES_BLOCK_SIZE,
3481 .maxauthsize = SHA512_DIGEST_SIZE,
3482 },
3483 .cipher_info = {
3484 .alg = CIPHER_ALG_DES,
3485 .mode = CIPHER_MODE_CBC,
3486 },
3487 .auth_info = {
3488 .alg = HASH_ALG_SHA512,
3489 .mode = HASH_MODE_HMAC,
3490 },
3491 .auth_first = 0,
3492 },
3493 {
3494 .type = CRYPTO_ALG_TYPE_AEAD,
3495 .alg.aead = {
3496 .base = {
3497 .cra_name = "authenc(hmac(md5),cbc(des3_ede))",
3498 .cra_driver_name = "authenc-hmac-md5-cbc-des3-iproc",
3499 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3500 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3501 },
3502 .setkey = aead_authenc_setkey,
3503 .ivsize = DES3_EDE_BLOCK_SIZE,
3504 .maxauthsize = MD5_DIGEST_SIZE,
3505 },
3506 .cipher_info = {
3507 .alg = CIPHER_ALG_3DES,
3508 .mode = CIPHER_MODE_CBC,
3509 },
3510 .auth_info = {
3511 .alg = HASH_ALG_MD5,
3512 .mode = HASH_MODE_HMAC,
3513 },
3514 .auth_first = 0,
3515 },
3516 {
3517 .type = CRYPTO_ALG_TYPE_AEAD,
3518 .alg.aead = {
3519 .base = {
3520 .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
3521 .cra_driver_name = "authenc-hmac-sha1-cbc-des3-iproc",
3522 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3523 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3524 },
3525 .setkey = aead_authenc_setkey,
3526 .ivsize = DES3_EDE_BLOCK_SIZE,
3527 .maxauthsize = SHA1_DIGEST_SIZE,
3528 },
3529 .cipher_info = {
3530 .alg = CIPHER_ALG_3DES,
3531 .mode = CIPHER_MODE_CBC,
3532 },
3533 .auth_info = {
3534 .alg = HASH_ALG_SHA1,
3535 .mode = HASH_MODE_HMAC,
3536 },
3537 .auth_first = 0,
3538 },
3539 {
3540 .type = CRYPTO_ALG_TYPE_AEAD,
3541 .alg.aead = {
3542 .base = {
3543 .cra_name = "authenc(hmac(sha224),cbc(des3_ede))",
3544 .cra_driver_name = "authenc-hmac-sha224-cbc-des3-iproc",
3545 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3546 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3547 },
3548 .setkey = aead_authenc_setkey,
3549 .ivsize = DES3_EDE_BLOCK_SIZE,
3550 .maxauthsize = SHA224_DIGEST_SIZE,
3551 },
3552 .cipher_info = {
3553 .alg = CIPHER_ALG_3DES,
3554 .mode = CIPHER_MODE_CBC,
3555 },
3556 .auth_info = {
3557 .alg = HASH_ALG_SHA224,
3558 .mode = HASH_MODE_HMAC,
3559 },
3560 .auth_first = 0,
3561 },
3562 {
3563 .type = CRYPTO_ALG_TYPE_AEAD,
3564 .alg.aead = {
3565 .base = {
3566 .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
3567 .cra_driver_name = "authenc-hmac-sha256-cbc-des3-iproc",
3568 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3569 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3570 },
3571 .setkey = aead_authenc_setkey,
3572 .ivsize = DES3_EDE_BLOCK_SIZE,
3573 .maxauthsize = SHA256_DIGEST_SIZE,
3574 },
3575 .cipher_info = {
3576 .alg = CIPHER_ALG_3DES,
3577 .mode = CIPHER_MODE_CBC,
3578 },
3579 .auth_info = {
3580 .alg = HASH_ALG_SHA256,
3581 .mode = HASH_MODE_HMAC,
3582 },
3583 .auth_first = 0,
3584 },
3585 {
3586 .type = CRYPTO_ALG_TYPE_AEAD,
3587 .alg.aead = {
3588 .base = {
3589 .cra_name = "authenc(hmac(sha384),cbc(des3_ede))",
3590 .cra_driver_name = "authenc-hmac-sha384-cbc-des3-iproc",
3591 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3592 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3593 },
3594 .setkey = aead_authenc_setkey,
3595 .ivsize = DES3_EDE_BLOCK_SIZE,
3596 .maxauthsize = SHA384_DIGEST_SIZE,
3597 },
3598 .cipher_info = {
3599 .alg = CIPHER_ALG_3DES,
3600 .mode = CIPHER_MODE_CBC,
3601 },
3602 .auth_info = {
3603 .alg = HASH_ALG_SHA384,
3604 .mode = HASH_MODE_HMAC,
3605 },
3606 .auth_first = 0,
3607 },
3608 {
3609 .type = CRYPTO_ALG_TYPE_AEAD,
3610 .alg.aead = {
3611 .base = {
3612 .cra_name = "authenc(hmac(sha512),cbc(des3_ede))",
3613 .cra_driver_name = "authenc-hmac-sha512-cbc-des3-iproc",
3614 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3615 .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC
3616 },
3617 .setkey = aead_authenc_setkey,
3618 .ivsize = DES3_EDE_BLOCK_SIZE,
3619 .maxauthsize = SHA512_DIGEST_SIZE,
3620 },
3621 .cipher_info = {
3622 .alg = CIPHER_ALG_3DES,
3623 .mode = CIPHER_MODE_CBC,
3624 },
3625 .auth_info = {
3626 .alg = HASH_ALG_SHA512,
3627 .mode = HASH_MODE_HMAC,
3628 },
3629 .auth_first = 0,
3630 },
3631
3632 /* ABLKCIPHER algorithms. */
3633 {
3634 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3635 .alg.crypto = {
3636 .cra_name = "ecb(arc4)",
3637 .cra_driver_name = "ecb-arc4-iproc",
3638 .cra_blocksize = ARC4_BLOCK_SIZE,
3639 .cra_ablkcipher = {
3640 .min_keysize = ARC4_MIN_KEY_SIZE,
3641 .max_keysize = ARC4_MAX_KEY_SIZE,
3642 .ivsize = 0,
3643 }
3644 },
3645 .cipher_info = {
3646 .alg = CIPHER_ALG_RC4,
3647 .mode = CIPHER_MODE_NONE,
3648 },
3649 .auth_info = {
3650 .alg = HASH_ALG_NONE,
3651 .mode = HASH_MODE_NONE,
3652 },
3653 },
3654 {
3655 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3656 .alg.crypto = {
3657 .cra_name = "ofb(des)",
3658 .cra_driver_name = "ofb-des-iproc",
3659 .cra_blocksize = DES_BLOCK_SIZE,
3660 .cra_ablkcipher = {
3661 .min_keysize = DES_KEY_SIZE,
3662 .max_keysize = DES_KEY_SIZE,
3663 .ivsize = DES_BLOCK_SIZE,
3664 }
3665 },
3666 .cipher_info = {
3667 .alg = CIPHER_ALG_DES,
3668 .mode = CIPHER_MODE_OFB,
3669 },
3670 .auth_info = {
3671 .alg = HASH_ALG_NONE,
3672 .mode = HASH_MODE_NONE,
3673 },
3674 },
3675 {
3676 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3677 .alg.crypto = {
3678 .cra_name = "cbc(des)",
3679 .cra_driver_name = "cbc-des-iproc",
3680 .cra_blocksize = DES_BLOCK_SIZE,
3681 .cra_ablkcipher = {
3682 .min_keysize = DES_KEY_SIZE,
3683 .max_keysize = DES_KEY_SIZE,
3684 .ivsize = DES_BLOCK_SIZE,
3685 }
3686 },
3687 .cipher_info = {
3688 .alg = CIPHER_ALG_DES,
3689 .mode = CIPHER_MODE_CBC,
3690 },
3691 .auth_info = {
3692 .alg = HASH_ALG_NONE,
3693 .mode = HASH_MODE_NONE,
3694 },
3695 },
3696 {
3697 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3698 .alg.crypto = {
3699 .cra_name = "ecb(des)",
3700 .cra_driver_name = "ecb-des-iproc",
3701 .cra_blocksize = DES_BLOCK_SIZE,
3702 .cra_ablkcipher = {
3703 .min_keysize = DES_KEY_SIZE,
3704 .max_keysize = DES_KEY_SIZE,
3705 .ivsize = 0,
3706 }
3707 },
3708 .cipher_info = {
3709 .alg = CIPHER_ALG_DES,
3710 .mode = CIPHER_MODE_ECB,
3711 },
3712 .auth_info = {
3713 .alg = HASH_ALG_NONE,
3714 .mode = HASH_MODE_NONE,
3715 },
3716 },
3717 {
3718 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3719 .alg.crypto = {
3720 .cra_name = "ofb(des3_ede)",
3721 .cra_driver_name = "ofb-des3-iproc",
3722 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3723 .cra_ablkcipher = {
3724 .min_keysize = DES3_EDE_KEY_SIZE,
3725 .max_keysize = DES3_EDE_KEY_SIZE,
3726 .ivsize = DES3_EDE_BLOCK_SIZE,
3727 }
3728 },
3729 .cipher_info = {
3730 .alg = CIPHER_ALG_3DES,
3731 .mode = CIPHER_MODE_OFB,
3732 },
3733 .auth_info = {
3734 .alg = HASH_ALG_NONE,
3735 .mode = HASH_MODE_NONE,
3736 },
3737 },
3738 {
3739 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3740 .alg.crypto = {
3741 .cra_name = "cbc(des3_ede)",
3742 .cra_driver_name = "cbc-des3-iproc",
3743 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3744 .cra_ablkcipher = {
3745 .min_keysize = DES3_EDE_KEY_SIZE,
3746 .max_keysize = DES3_EDE_KEY_SIZE,
3747 .ivsize = DES3_EDE_BLOCK_SIZE,
3748 }
3749 },
3750 .cipher_info = {
3751 .alg = CIPHER_ALG_3DES,
3752 .mode = CIPHER_MODE_CBC,
3753 },
3754 .auth_info = {
3755 .alg = HASH_ALG_NONE,
3756 .mode = HASH_MODE_NONE,
3757 },
3758 },
3759 {
3760 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3761 .alg.crypto = {
3762 .cra_name = "ecb(des3_ede)",
3763 .cra_driver_name = "ecb-des3-iproc",
3764 .cra_blocksize = DES3_EDE_BLOCK_SIZE,
3765 .cra_ablkcipher = {
3766 .min_keysize = DES3_EDE_KEY_SIZE,
3767 .max_keysize = DES3_EDE_KEY_SIZE,
3768 .ivsize = 0,
3769 }
3770 },
3771 .cipher_info = {
3772 .alg = CIPHER_ALG_3DES,
3773 .mode = CIPHER_MODE_ECB,
3774 },
3775 .auth_info = {
3776 .alg = HASH_ALG_NONE,
3777 .mode = HASH_MODE_NONE,
3778 },
3779 },
3780 {
3781 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3782 .alg.crypto = {
3783 .cra_name = "ofb(aes)",
3784 .cra_driver_name = "ofb-aes-iproc",
3785 .cra_blocksize = AES_BLOCK_SIZE,
3786 .cra_ablkcipher = {
3787 .min_keysize = AES_MIN_KEY_SIZE,
3788 .max_keysize = AES_MAX_KEY_SIZE,
3789 .ivsize = AES_BLOCK_SIZE,
3790 }
3791 },
3792 .cipher_info = {
3793 .alg = CIPHER_ALG_AES,
3794 .mode = CIPHER_MODE_OFB,
3795 },
3796 .auth_info = {
3797 .alg = HASH_ALG_NONE,
3798 .mode = HASH_MODE_NONE,
3799 },
3800 },
3801 {
3802 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3803 .alg.crypto = {
3804 .cra_name = "cbc(aes)",
3805 .cra_driver_name = "cbc-aes-iproc",
3806 .cra_blocksize = AES_BLOCK_SIZE,
3807 .cra_ablkcipher = {
3808 .min_keysize = AES_MIN_KEY_SIZE,
3809 .max_keysize = AES_MAX_KEY_SIZE,
3810 .ivsize = AES_BLOCK_SIZE,
3811 }
3812 },
3813 .cipher_info = {
3814 .alg = CIPHER_ALG_AES,
3815 .mode = CIPHER_MODE_CBC,
3816 },
3817 .auth_info = {
3818 .alg = HASH_ALG_NONE,
3819 .mode = HASH_MODE_NONE,
3820 },
3821 },
3822 {
3823 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3824 .alg.crypto = {
3825 .cra_name = "ecb(aes)",
3826 .cra_driver_name = "ecb-aes-iproc",
3827 .cra_blocksize = AES_BLOCK_SIZE,
3828 .cra_ablkcipher = {
3829 .min_keysize = AES_MIN_KEY_SIZE,
3830 .max_keysize = AES_MAX_KEY_SIZE,
3831 .ivsize = 0,
3832 }
3833 },
3834 .cipher_info = {
3835 .alg = CIPHER_ALG_AES,
3836 .mode = CIPHER_MODE_ECB,
3837 },
3838 .auth_info = {
3839 .alg = HASH_ALG_NONE,
3840 .mode = HASH_MODE_NONE,
3841 },
3842 },
3843 {
3844 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3845 .alg.crypto = {
3846 .cra_name = "ctr(aes)",
3847 .cra_driver_name = "ctr-aes-iproc",
3848 .cra_blocksize = AES_BLOCK_SIZE,
3849 .cra_ablkcipher = {
3850 /* .geniv = "chainiv", */
3851 .min_keysize = AES_MIN_KEY_SIZE,
3852 .max_keysize = AES_MAX_KEY_SIZE,
3853 .ivsize = AES_BLOCK_SIZE,
3854 }
3855 },
3856 .cipher_info = {
3857 .alg = CIPHER_ALG_AES,
3858 .mode = CIPHER_MODE_CTR,
3859 },
3860 .auth_info = {
3861 .alg = HASH_ALG_NONE,
3862 .mode = HASH_MODE_NONE,
3863 },
3864 },
3865 {
3866 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
3867 .alg.crypto = {
3868 .cra_name = "xts(aes)",
3869 .cra_driver_name = "xts-aes-iproc",
3870 .cra_blocksize = AES_BLOCK_SIZE,
3871 .cra_ablkcipher = {
3872 .min_keysize = 2 * AES_MIN_KEY_SIZE,
3873 .max_keysize = 2 * AES_MAX_KEY_SIZE,
3874 .ivsize = AES_BLOCK_SIZE,
3875 }
3876 },
3877 .cipher_info = {
3878 .alg = CIPHER_ALG_AES,
3879 .mode = CIPHER_MODE_XTS,
3880 },
3881 .auth_info = {
3882 .alg = HASH_ALG_NONE,
3883 .mode = HASH_MODE_NONE,
3884 },
3885 },
3886
3887 /* AHASH algorithms. */
3888 {
3889 .type = CRYPTO_ALG_TYPE_AHASH,
3890 .alg.hash = {
3891 .halg.digestsize = MD5_DIGEST_SIZE,
3892 .halg.base = {
3893 .cra_name = "md5",
3894 .cra_driver_name = "md5-iproc",
3895 .cra_blocksize = MD5_BLOCK_WORDS * 4,
3896 .cra_flags = CRYPTO_ALG_TYPE_AHASH |
3897 CRYPTO_ALG_ASYNC,
3898 }
3899 },
3900 .cipher_info = {
3901 .alg = CIPHER_ALG_NONE,
3902 .mode = CIPHER_MODE_NONE,
3903 },
3904 .auth_info = {
3905 .alg = HASH_ALG_MD5,
3906 .mode = HASH_MODE_HASH,
3907 },
3908 },
3909 {
3910 .type = CRYPTO_ALG_TYPE_AHASH,
3911 .alg.hash = {
3912 .halg.digestsize = MD5_DIGEST_SIZE,
3913 .halg.base = {
3914 .cra_name = "hmac(md5)",
3915 .cra_driver_name = "hmac-md5-iproc",
3916 .cra_blocksize = MD5_BLOCK_WORDS * 4,
3917 }
3918 },
3919 .cipher_info = {
3920 .alg = CIPHER_ALG_NONE,
3921 .mode = CIPHER_MODE_NONE,
3922 },
3923 .auth_info = {
3924 .alg = HASH_ALG_MD5,
3925 .mode = HASH_MODE_HMAC,
3926 },
3927 },
3928 {.type = CRYPTO_ALG_TYPE_AHASH,
3929 .alg.hash = {
3930 .halg.digestsize = SHA1_DIGEST_SIZE,
3931 .halg.base = {
3932 .cra_name = "sha1",
3933 .cra_driver_name = "sha1-iproc",
3934 .cra_blocksize = SHA1_BLOCK_SIZE,
3935 }
3936 },
3937 .cipher_info = {
3938 .alg = CIPHER_ALG_NONE,
3939 .mode = CIPHER_MODE_NONE,
3940 },
3941 .auth_info = {
3942 .alg = HASH_ALG_SHA1,
3943 .mode = HASH_MODE_HASH,
3944 },
3945 },
3946 {.type = CRYPTO_ALG_TYPE_AHASH,
3947 .alg.hash = {
3948 .halg.digestsize = SHA1_DIGEST_SIZE,
3949 .halg.base = {
3950 .cra_name = "hmac(sha1)",
3951 .cra_driver_name = "hmac-sha1-iproc",
3952 .cra_blocksize = SHA1_BLOCK_SIZE,
3953 }
3954 },
3955 .cipher_info = {
3956 .alg = CIPHER_ALG_NONE,
3957 .mode = CIPHER_MODE_NONE,
3958 },
3959 .auth_info = {
3960 .alg = HASH_ALG_SHA1,
3961 .mode = HASH_MODE_HMAC,
3962 },
3963 },
3964 {.type = CRYPTO_ALG_TYPE_AHASH,
3965 .alg.hash = {
3966 .halg.digestsize = SHA224_DIGEST_SIZE,
3967 .halg.base = {
3968 .cra_name = "sha224",
3969 .cra_driver_name = "sha224-iproc",
3970 .cra_blocksize = SHA224_BLOCK_SIZE,
3971 }
3972 },
3973 .cipher_info = {
3974 .alg = CIPHER_ALG_NONE,
3975 .mode = CIPHER_MODE_NONE,
3976 },
3977 .auth_info = {
3978 .alg = HASH_ALG_SHA224,
3979 .mode = HASH_MODE_HASH,
3980 },
3981 },
3982 {.type = CRYPTO_ALG_TYPE_AHASH,
3983 .alg.hash = {
3984 .halg.digestsize = SHA224_DIGEST_SIZE,
3985 .halg.base = {
3986 .cra_name = "hmac(sha224)",
3987 .cra_driver_name = "hmac-sha224-iproc",
3988 .cra_blocksize = SHA224_BLOCK_SIZE,
3989 }
3990 },
3991 .cipher_info = {
3992 .alg = CIPHER_ALG_NONE,
3993 .mode = CIPHER_MODE_NONE,
3994 },
3995 .auth_info = {
3996 .alg = HASH_ALG_SHA224,
3997 .mode = HASH_MODE_HMAC,
3998 },
3999 },
4000 {.type = CRYPTO_ALG_TYPE_AHASH,
4001 .alg.hash = {
4002 .halg.digestsize = SHA256_DIGEST_SIZE,
4003 .halg.base = {
4004 .cra_name = "sha256",
4005 .cra_driver_name = "sha256-iproc",
4006 .cra_blocksize = SHA256_BLOCK_SIZE,
4007 }
4008 },
4009 .cipher_info = {
4010 .alg = CIPHER_ALG_NONE,
4011 .mode = CIPHER_MODE_NONE,
4012 },
4013 .auth_info = {
4014 .alg = HASH_ALG_SHA256,
4015 .mode = HASH_MODE_HASH,
4016 },
4017 },
4018 {.type = CRYPTO_ALG_TYPE_AHASH,
4019 .alg.hash = {
4020 .halg.digestsize = SHA256_DIGEST_SIZE,
4021 .halg.base = {
4022 .cra_name = "hmac(sha256)",
4023 .cra_driver_name = "hmac-sha256-iproc",
4024 .cra_blocksize = SHA256_BLOCK_SIZE,
4025 }
4026 },
4027 .cipher_info = {
4028 .alg = CIPHER_ALG_NONE,
4029 .mode = CIPHER_MODE_NONE,
4030 },
4031 .auth_info = {
4032 .alg = HASH_ALG_SHA256,
4033 .mode = HASH_MODE_HMAC,
4034 },
4035 },
4036 {
4037 .type = CRYPTO_ALG_TYPE_AHASH,
4038 .alg.hash = {
4039 .halg.digestsize = SHA384_DIGEST_SIZE,
4040 .halg.base = {
4041 .cra_name = "sha384",
4042 .cra_driver_name = "sha384-iproc",
4043 .cra_blocksize = SHA384_BLOCK_SIZE,
4044 }
4045 },
4046 .cipher_info = {
4047 .alg = CIPHER_ALG_NONE,
4048 .mode = CIPHER_MODE_NONE,
4049 },
4050 .auth_info = {
4051 .alg = HASH_ALG_SHA384,
4052 .mode = HASH_MODE_HASH,
4053 },
4054 },
4055 {
4056 .type = CRYPTO_ALG_TYPE_AHASH,
4057 .alg.hash = {
4058 .halg.digestsize = SHA384_DIGEST_SIZE,
4059 .halg.base = {
4060 .cra_name = "hmac(sha384)",
4061 .cra_driver_name = "hmac-sha384-iproc",
4062 .cra_blocksize = SHA384_BLOCK_SIZE,
4063 }
4064 },
4065 .cipher_info = {
4066 .alg = CIPHER_ALG_NONE,
4067 .mode = CIPHER_MODE_NONE,
4068 },
4069 .auth_info = {
4070 .alg = HASH_ALG_SHA384,
4071 .mode = HASH_MODE_HMAC,
4072 },
4073 },
4074 {
4075 .type = CRYPTO_ALG_TYPE_AHASH,
4076 .alg.hash = {
4077 .halg.digestsize = SHA512_DIGEST_SIZE,
4078 .halg.base = {
4079 .cra_name = "sha512",
4080 .cra_driver_name = "sha512-iproc",
4081 .cra_blocksize = SHA512_BLOCK_SIZE,
4082 }
4083 },
4084 .cipher_info = {
4085 .alg = CIPHER_ALG_NONE,
4086 .mode = CIPHER_MODE_NONE,
4087 },
4088 .auth_info = {
4089 .alg = HASH_ALG_SHA512,
4090 .mode = HASH_MODE_HASH,
4091 },
4092 },
4093 {
4094 .type = CRYPTO_ALG_TYPE_AHASH,
4095 .alg.hash = {
4096 .halg.digestsize = SHA512_DIGEST_SIZE,
4097 .halg.base = {
4098 .cra_name = "hmac(sha512)",
4099 .cra_driver_name = "hmac-sha512-iproc",
4100 .cra_blocksize = SHA512_BLOCK_SIZE,
4101 }
4102 },
4103 .cipher_info = {
4104 .alg = CIPHER_ALG_NONE,
4105 .mode = CIPHER_MODE_NONE,
4106 },
4107 .auth_info = {
4108 .alg = HASH_ALG_SHA512,
4109 .mode = HASH_MODE_HMAC,
4110 },
4111 },
4112 {
4113 .type = CRYPTO_ALG_TYPE_AHASH,
4114 .alg.hash = {
4115 .halg.digestsize = SHA3_224_DIGEST_SIZE,
4116 .halg.base = {
4117 .cra_name = "sha3-224",
4118 .cra_driver_name = "sha3-224-iproc",
4119 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4120 }
4121 },
4122 .cipher_info = {
4123 .alg = CIPHER_ALG_NONE,
4124 .mode = CIPHER_MODE_NONE,
4125 },
4126 .auth_info = {
4127 .alg = HASH_ALG_SHA3_224,
4128 .mode = HASH_MODE_HASH,
4129 },
4130 },
4131 {
4132 .type = CRYPTO_ALG_TYPE_AHASH,
4133 .alg.hash = {
4134 .halg.digestsize = SHA3_224_DIGEST_SIZE,
4135 .halg.base = {
4136 .cra_name = "hmac(sha3-224)",
4137 .cra_driver_name = "hmac-sha3-224-iproc",
4138 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4139 }
4140 },
4141 .cipher_info = {
4142 .alg = CIPHER_ALG_NONE,
4143 .mode = CIPHER_MODE_NONE,
4144 },
4145 .auth_info = {
4146 .alg = HASH_ALG_SHA3_224,
4147 .mode = HASH_MODE_HMAC
4148 },
4149 },
4150 {
4151 .type = CRYPTO_ALG_TYPE_AHASH,
4152 .alg.hash = {
4153 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4154 .halg.base = {
4155 .cra_name = "sha3-256",
4156 .cra_driver_name = "sha3-256-iproc",
4157 .cra_blocksize = SHA3_256_BLOCK_SIZE,
4158 }
4159 },
4160 .cipher_info = {
4161 .alg = CIPHER_ALG_NONE,
4162 .mode = CIPHER_MODE_NONE,
4163 },
4164 .auth_info = {
4165 .alg = HASH_ALG_SHA3_256,
4166 .mode = HASH_MODE_HASH,
4167 },
4168 },
4169 {
4170 .type = CRYPTO_ALG_TYPE_AHASH,
4171 .alg.hash = {
4172 .halg.digestsize = SHA3_256_DIGEST_SIZE,
4173 .halg.base = {
4174 .cra_name = "hmac(sha3-256)",
4175 .cra_driver_name = "hmac-sha3-256-iproc",
4176 .cra_blocksize = SHA3_256_BLOCK_SIZE,
4177 }
4178 },
4179 .cipher_info = {
4180 .alg = CIPHER_ALG_NONE,
4181 .mode = CIPHER_MODE_NONE,
4182 },
4183 .auth_info = {
4184 .alg = HASH_ALG_SHA3_256,
4185 .mode = HASH_MODE_HMAC,
4186 },
4187 },
4188 {
4189 .type = CRYPTO_ALG_TYPE_AHASH,
4190 .alg.hash = {
4191 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4192 .halg.base = {
4193 .cra_name = "sha3-384",
4194 .cra_driver_name = "sha3-384-iproc",
4195 .cra_blocksize = SHA3_224_BLOCK_SIZE,
4196 }
4197 },
4198 .cipher_info = {
4199 .alg = CIPHER_ALG_NONE,
4200 .mode = CIPHER_MODE_NONE,
4201 },
4202 .auth_info = {
4203 .alg = HASH_ALG_SHA3_384,
4204 .mode = HASH_MODE_HASH,
4205 },
4206 },
4207 {
4208 .type = CRYPTO_ALG_TYPE_AHASH,
4209 .alg.hash = {
4210 .halg.digestsize = SHA3_384_DIGEST_SIZE,
4211 .halg.base = {
4212 .cra_name = "hmac(sha3-384)",
4213 .cra_driver_name = "hmac-sha3-384-iproc",
4214 .cra_blocksize = SHA3_384_BLOCK_SIZE,
4215 }
4216 },
4217 .cipher_info = {
4218 .alg = CIPHER_ALG_NONE,
4219 .mode = CIPHER_MODE_NONE,
4220 },
4221 .auth_info = {
4222 .alg = HASH_ALG_SHA3_384,
4223 .mode = HASH_MODE_HMAC,
4224 },
4225 },
4226 {
4227 .type = CRYPTO_ALG_TYPE_AHASH,
4228 .alg.hash = {
4229 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4230 .halg.base = {
4231 .cra_name = "sha3-512",
4232 .cra_driver_name = "sha3-512-iproc",
4233 .cra_blocksize = SHA3_512_BLOCK_SIZE,
4234 }
4235 },
4236 .cipher_info = {
4237 .alg = CIPHER_ALG_NONE,
4238 .mode = CIPHER_MODE_NONE,
4239 },
4240 .auth_info = {
4241 .alg = HASH_ALG_SHA3_512,
4242 .mode = HASH_MODE_HASH,
4243 },
4244 },
4245 {
4246 .type = CRYPTO_ALG_TYPE_AHASH,
4247 .alg.hash = {
4248 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4249 .halg.base = {
4250 .cra_name = "hmac(sha3-512)",
4251 .cra_driver_name = "hmac-sha3-512-iproc",
4252 .cra_blocksize = SHA3_512_BLOCK_SIZE,
4253 }
4254 },
4255 .cipher_info = {
4256 .alg = CIPHER_ALG_NONE,
4257 .mode = CIPHER_MODE_NONE,
4258 },
4259 .auth_info = {
4260 .alg = HASH_ALG_SHA3_512,
4261 .mode = HASH_MODE_HMAC,
4262 },
4263 },
4264 {
4265 .type = CRYPTO_ALG_TYPE_AHASH,
4266 .alg.hash = {
4267 .halg.digestsize = AES_BLOCK_SIZE,
4268 .halg.base = {
4269 .cra_name = "xcbc(aes)",
4270 .cra_driver_name = "xcbc-aes-iproc",
4271 .cra_blocksize = AES_BLOCK_SIZE,
4272 }
4273 },
4274 .cipher_info = {
4275 .alg = CIPHER_ALG_NONE,
4276 .mode = CIPHER_MODE_NONE,
4277 },
4278 .auth_info = {
4279 .alg = HASH_ALG_AES,
4280 .mode = HASH_MODE_XCBC,
4281 },
4282 },
4283 {
4284 .type = CRYPTO_ALG_TYPE_AHASH,
4285 .alg.hash = {
4286 .halg.digestsize = AES_BLOCK_SIZE,
4287 .halg.base = {
4288 .cra_name = "cmac(aes)",
4289 .cra_driver_name = "cmac-aes-iproc",
4290 .cra_blocksize = AES_BLOCK_SIZE,
4291 }
4292 },
4293 .cipher_info = {
4294 .alg = CIPHER_ALG_NONE,
4295 .mode = CIPHER_MODE_NONE,
4296 },
4297 .auth_info = {
4298 .alg = HASH_ALG_AES,
4299 .mode = HASH_MODE_CMAC,
4300 },
4301 },
4302 };
4303
generic_cra_init(struct crypto_tfm * tfm,struct iproc_alg_s * cipher_alg)4304 static int generic_cra_init(struct crypto_tfm *tfm,
4305 struct iproc_alg_s *cipher_alg)
4306 {
4307 struct spu_hw *spu = &iproc_priv.spu;
4308 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4309 unsigned int blocksize = crypto_tfm_alg_blocksize(tfm);
4310
4311 flow_log("%s()\n", __func__);
4312
4313 ctx->alg = cipher_alg;
4314 ctx->cipher = cipher_alg->cipher_info;
4315 ctx->auth = cipher_alg->auth_info;
4316 ctx->auth_first = cipher_alg->auth_first;
4317 ctx->max_payload = spu->spu_ctx_max_payload(ctx->cipher.alg,
4318 ctx->cipher.mode,
4319 blocksize);
4320 ctx->fallback_cipher = NULL;
4321
4322 ctx->enckeylen = 0;
4323 ctx->authkeylen = 0;
4324
4325 atomic_inc(&iproc_priv.stream_count);
4326 atomic_inc(&iproc_priv.session_count);
4327
4328 return 0;
4329 }
4330
ablkcipher_cra_init(struct crypto_tfm * tfm)4331 static int ablkcipher_cra_init(struct crypto_tfm *tfm)
4332 {
4333 struct crypto_alg *alg = tfm->__crt_alg;
4334 struct iproc_alg_s *cipher_alg;
4335
4336 flow_log("%s()\n", __func__);
4337
4338 tfm->crt_ablkcipher.reqsize = sizeof(struct iproc_reqctx_s);
4339
4340 cipher_alg = container_of(alg, struct iproc_alg_s, alg.crypto);
4341 return generic_cra_init(tfm, cipher_alg);
4342 }
4343
ahash_cra_init(struct crypto_tfm * tfm)4344 static int ahash_cra_init(struct crypto_tfm *tfm)
4345 {
4346 int err;
4347 struct crypto_alg *alg = tfm->__crt_alg;
4348 struct iproc_alg_s *cipher_alg;
4349
4350 cipher_alg = container_of(__crypto_ahash_alg(alg), struct iproc_alg_s,
4351 alg.hash);
4352
4353 err = generic_cra_init(tfm, cipher_alg);
4354 flow_log("%s()\n", __func__);
4355
4356 /*
4357 * export state size has to be < 512 bytes. So don't include msg bufs
4358 * in state size.
4359 */
4360 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
4361 sizeof(struct iproc_reqctx_s));
4362
4363 return err;
4364 }
4365
aead_cra_init(struct crypto_aead * aead)4366 static int aead_cra_init(struct crypto_aead *aead)
4367 {
4368 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
4369 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4370 struct crypto_alg *alg = tfm->__crt_alg;
4371 struct aead_alg *aalg = container_of(alg, struct aead_alg, base);
4372 struct iproc_alg_s *cipher_alg = container_of(aalg, struct iproc_alg_s,
4373 alg.aead);
4374
4375 int err = generic_cra_init(tfm, cipher_alg);
4376
4377 flow_log("%s()\n", __func__);
4378
4379 crypto_aead_set_reqsize(aead, sizeof(struct iproc_reqctx_s));
4380 ctx->is_esp = false;
4381 ctx->salt_len = 0;
4382 ctx->salt_offset = 0;
4383
4384 /* random first IV */
4385 get_random_bytes(ctx->iv, MAX_IV_SIZE);
4386 flow_dump(" iv: ", ctx->iv, MAX_IV_SIZE);
4387
4388 if (!err) {
4389 if (alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) {
4390 flow_log("%s() creating fallback cipher\n", __func__);
4391
4392 ctx->fallback_cipher =
4393 crypto_alloc_aead(alg->cra_name, 0,
4394 CRYPTO_ALG_ASYNC |
4395 CRYPTO_ALG_NEED_FALLBACK);
4396 if (IS_ERR(ctx->fallback_cipher)) {
4397 pr_err("%s() Error: failed to allocate fallback for %s\n",
4398 __func__, alg->cra_name);
4399 return PTR_ERR(ctx->fallback_cipher);
4400 }
4401 }
4402 }
4403
4404 return err;
4405 }
4406
generic_cra_exit(struct crypto_tfm * tfm)4407 static void generic_cra_exit(struct crypto_tfm *tfm)
4408 {
4409 atomic_dec(&iproc_priv.session_count);
4410 }
4411
aead_cra_exit(struct crypto_aead * aead)4412 static void aead_cra_exit(struct crypto_aead *aead)
4413 {
4414 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
4415 struct iproc_ctx_s *ctx = crypto_tfm_ctx(tfm);
4416
4417 generic_cra_exit(tfm);
4418
4419 if (ctx->fallback_cipher) {
4420 crypto_free_aead(ctx->fallback_cipher);
4421 ctx->fallback_cipher = NULL;
4422 }
4423 }
4424
4425 /**
4426 * spu_functions_register() - Specify hardware-specific SPU functions based on
4427 * SPU type read from device tree.
4428 * @dev: device structure
4429 * @spu_type: SPU hardware generation
4430 * @spu_subtype: SPU hardware version
4431 */
spu_functions_register(struct device * dev,enum spu_spu_type spu_type,enum spu_spu_subtype spu_subtype)4432 static void spu_functions_register(struct device *dev,
4433 enum spu_spu_type spu_type,
4434 enum spu_spu_subtype spu_subtype)
4435 {
4436 struct spu_hw *spu = &iproc_priv.spu;
4437
4438 if (spu_type == SPU_TYPE_SPUM) {
4439 dev_dbg(dev, "Registering SPUM functions");
4440 spu->spu_dump_msg_hdr = spum_dump_msg_hdr;
4441 spu->spu_payload_length = spum_payload_length;
4442 spu->spu_response_hdr_len = spum_response_hdr_len;
4443 spu->spu_hash_pad_len = spum_hash_pad_len;
4444 spu->spu_gcm_ccm_pad_len = spum_gcm_ccm_pad_len;
4445 spu->spu_assoc_resp_len = spum_assoc_resp_len;
4446 spu->spu_aead_ivlen = spum_aead_ivlen;
4447 spu->spu_hash_type = spum_hash_type;
4448 spu->spu_digest_size = spum_digest_size;
4449 spu->spu_create_request = spum_create_request;
4450 spu->spu_cipher_req_init = spum_cipher_req_init;
4451 spu->spu_cipher_req_finish = spum_cipher_req_finish;
4452 spu->spu_request_pad = spum_request_pad;
4453 spu->spu_tx_status_len = spum_tx_status_len;
4454 spu->spu_rx_status_len = spum_rx_status_len;
4455 spu->spu_status_process = spum_status_process;
4456 spu->spu_xts_tweak_in_payload = spum_xts_tweak_in_payload;
4457 spu->spu_ccm_update_iv = spum_ccm_update_iv;
4458 spu->spu_wordalign_padlen = spum_wordalign_padlen;
4459 if (spu_subtype == SPU_SUBTYPE_SPUM_NS2)
4460 spu->spu_ctx_max_payload = spum_ns2_ctx_max_payload;
4461 else
4462 spu->spu_ctx_max_payload = spum_nsp_ctx_max_payload;
4463 } else {
4464 dev_dbg(dev, "Registering SPU2 functions");
4465 spu->spu_dump_msg_hdr = spu2_dump_msg_hdr;
4466 spu->spu_ctx_max_payload = spu2_ctx_max_payload;
4467 spu->spu_payload_length = spu2_payload_length;
4468 spu->spu_response_hdr_len = spu2_response_hdr_len;
4469 spu->spu_hash_pad_len = spu2_hash_pad_len;
4470 spu->spu_gcm_ccm_pad_len = spu2_gcm_ccm_pad_len;
4471 spu->spu_assoc_resp_len = spu2_assoc_resp_len;
4472 spu->spu_aead_ivlen = spu2_aead_ivlen;
4473 spu->spu_hash_type = spu2_hash_type;
4474 spu->spu_digest_size = spu2_digest_size;
4475 spu->spu_create_request = spu2_create_request;
4476 spu->spu_cipher_req_init = spu2_cipher_req_init;
4477 spu->spu_cipher_req_finish = spu2_cipher_req_finish;
4478 spu->spu_request_pad = spu2_request_pad;
4479 spu->spu_tx_status_len = spu2_tx_status_len;
4480 spu->spu_rx_status_len = spu2_rx_status_len;
4481 spu->spu_status_process = spu2_status_process;
4482 spu->spu_xts_tweak_in_payload = spu2_xts_tweak_in_payload;
4483 spu->spu_ccm_update_iv = spu2_ccm_update_iv;
4484 spu->spu_wordalign_padlen = spu2_wordalign_padlen;
4485 }
4486 }
4487
4488 /**
4489 * spu_mb_init() - Initialize mailbox client. Request ownership of a mailbox
4490 * channel for the SPU being probed.
4491 * @dev: SPU driver device structure
4492 *
4493 * Return: 0 if successful
4494 * < 0 otherwise
4495 */
spu_mb_init(struct device * dev)4496 static int spu_mb_init(struct device *dev)
4497 {
4498 struct mbox_client *mcl = &iproc_priv.mcl;
4499 int err, i;
4500
4501 iproc_priv.mbox = devm_kcalloc(dev, iproc_priv.spu.num_chan,
4502 sizeof(struct mbox_chan *), GFP_KERNEL);
4503 if (!iproc_priv.mbox)
4504 return -ENOMEM;
4505
4506 mcl->dev = dev;
4507 mcl->tx_block = false;
4508 mcl->tx_tout = 0;
4509 mcl->knows_txdone = true;
4510 mcl->rx_callback = spu_rx_callback;
4511 mcl->tx_done = NULL;
4512
4513 for (i = 0; i < iproc_priv.spu.num_chan; i++) {
4514 iproc_priv.mbox[i] = mbox_request_channel(mcl, i);
4515 if (IS_ERR(iproc_priv.mbox[i])) {
4516 err = (int)PTR_ERR(iproc_priv.mbox[i]);
4517 dev_err(dev,
4518 "Mbox channel %d request failed with err %d",
4519 i, err);
4520 iproc_priv.mbox[i] = NULL;
4521 goto free_channels;
4522 }
4523 }
4524
4525 return 0;
4526 free_channels:
4527 for (i = 0; i < iproc_priv.spu.num_chan; i++) {
4528 if (iproc_priv.mbox[i])
4529 mbox_free_channel(iproc_priv.mbox[i]);
4530 }
4531
4532 return err;
4533 }
4534
spu_mb_release(struct platform_device * pdev)4535 static void spu_mb_release(struct platform_device *pdev)
4536 {
4537 int i;
4538
4539 for (i = 0; i < iproc_priv.spu.num_chan; i++)
4540 mbox_free_channel(iproc_priv.mbox[i]);
4541 }
4542
spu_counters_init(void)4543 static void spu_counters_init(void)
4544 {
4545 int i;
4546 int j;
4547
4548 atomic_set(&iproc_priv.session_count, 0);
4549 atomic_set(&iproc_priv.stream_count, 0);
4550 atomic_set(&iproc_priv.next_chan, (int)iproc_priv.spu.num_chan);
4551 atomic64_set(&iproc_priv.bytes_in, 0);
4552 atomic64_set(&iproc_priv.bytes_out, 0);
4553 for (i = 0; i < SPU_OP_NUM; i++) {
4554 atomic_set(&iproc_priv.op_counts[i], 0);
4555 atomic_set(&iproc_priv.setkey_cnt[i], 0);
4556 }
4557 for (i = 0; i < CIPHER_ALG_LAST; i++)
4558 for (j = 0; j < CIPHER_MODE_LAST; j++)
4559 atomic_set(&iproc_priv.cipher_cnt[i][j], 0);
4560
4561 for (i = 0; i < HASH_ALG_LAST; i++) {
4562 atomic_set(&iproc_priv.hash_cnt[i], 0);
4563 atomic_set(&iproc_priv.hmac_cnt[i], 0);
4564 }
4565 for (i = 0; i < AEAD_TYPE_LAST; i++)
4566 atomic_set(&iproc_priv.aead_cnt[i], 0);
4567
4568 atomic_set(&iproc_priv.mb_no_spc, 0);
4569 atomic_set(&iproc_priv.mb_send_fail, 0);
4570 atomic_set(&iproc_priv.bad_icv, 0);
4571 }
4572
spu_register_ablkcipher(struct iproc_alg_s * driver_alg)4573 static int spu_register_ablkcipher(struct iproc_alg_s *driver_alg)
4574 {
4575 struct spu_hw *spu = &iproc_priv.spu;
4576 struct crypto_alg *crypto = &driver_alg->alg.crypto;
4577 int err;
4578
4579 /* SPU2 does not support RC4 */
4580 if ((driver_alg->cipher_info.alg == CIPHER_ALG_RC4) &&
4581 (spu->spu_type == SPU_TYPE_SPU2))
4582 return 0;
4583
4584 crypto->cra_module = THIS_MODULE;
4585 crypto->cra_priority = cipher_pri;
4586 crypto->cra_alignmask = 0;
4587 crypto->cra_ctxsize = sizeof(struct iproc_ctx_s);
4588 INIT_LIST_HEAD(&crypto->cra_list);
4589
4590 crypto->cra_init = ablkcipher_cra_init;
4591 crypto->cra_exit = generic_cra_exit;
4592 crypto->cra_type = &crypto_ablkcipher_type;
4593 crypto->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
4594 CRYPTO_ALG_KERN_DRIVER_ONLY;
4595
4596 crypto->cra_ablkcipher.setkey = ablkcipher_setkey;
4597 crypto->cra_ablkcipher.encrypt = ablkcipher_encrypt;
4598 crypto->cra_ablkcipher.decrypt = ablkcipher_decrypt;
4599
4600 err = crypto_register_alg(crypto);
4601 /* Mark alg as having been registered, if successful */
4602 if (err == 0)
4603 driver_alg->registered = true;
4604 pr_debug(" registered ablkcipher %s\n", crypto->cra_driver_name);
4605 return err;
4606 }
4607
spu_register_ahash(struct iproc_alg_s * driver_alg)4608 static int spu_register_ahash(struct iproc_alg_s *driver_alg)
4609 {
4610 struct spu_hw *spu = &iproc_priv.spu;
4611 struct ahash_alg *hash = &driver_alg->alg.hash;
4612 int err;
4613
4614 /* AES-XCBC is the only AES hash type currently supported on SPU-M */
4615 if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
4616 (driver_alg->auth_info.mode != HASH_MODE_XCBC) &&
4617 (spu->spu_type == SPU_TYPE_SPUM))
4618 return 0;
4619
4620 /* SHA3 algorithm variants are not registered for SPU-M or SPU2. */
4621 if ((driver_alg->auth_info.alg >= HASH_ALG_SHA3_224) &&
4622 (spu->spu_subtype != SPU_SUBTYPE_SPU2_V2))
4623 return 0;
4624
4625 hash->halg.base.cra_module = THIS_MODULE;
4626 hash->halg.base.cra_priority = hash_pri;
4627 hash->halg.base.cra_alignmask = 0;
4628 hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s);
4629 hash->halg.base.cra_init = ahash_cra_init;
4630 hash->halg.base.cra_exit = generic_cra_exit;
4631 hash->halg.base.cra_type = &crypto_ahash_type;
4632 hash->halg.base.cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC;
4633 hash->halg.statesize = sizeof(struct spu_hash_export_s);
4634
4635 if (driver_alg->auth_info.mode != HASH_MODE_HMAC) {
4636 hash->init = ahash_init;
4637 hash->update = ahash_update;
4638 hash->final = ahash_final;
4639 hash->finup = ahash_finup;
4640 hash->digest = ahash_digest;
4641 if ((driver_alg->auth_info.alg == HASH_ALG_AES) &&
4642 ((driver_alg->auth_info.mode == HASH_MODE_XCBC) ||
4643 (driver_alg->auth_info.mode == HASH_MODE_CMAC))) {
4644 hash->setkey = ahash_setkey;
4645 }
4646 } else {
4647 hash->setkey = ahash_hmac_setkey;
4648 hash->init = ahash_hmac_init;
4649 hash->update = ahash_hmac_update;
4650 hash->final = ahash_hmac_final;
4651 hash->finup = ahash_hmac_finup;
4652 hash->digest = ahash_hmac_digest;
4653 }
4654 hash->export = ahash_export;
4655 hash->import = ahash_import;
4656
4657 err = crypto_register_ahash(hash);
4658 /* Mark alg as having been registered, if successful */
4659 if (err == 0)
4660 driver_alg->registered = true;
4661 pr_debug(" registered ahash %s\n",
4662 hash->halg.base.cra_driver_name);
4663 return err;
4664 }
4665
spu_register_aead(struct iproc_alg_s * driver_alg)4666 static int spu_register_aead(struct iproc_alg_s *driver_alg)
4667 {
4668 struct aead_alg *aead = &driver_alg->alg.aead;
4669 int err;
4670
4671 aead->base.cra_module = THIS_MODULE;
4672 aead->base.cra_priority = aead_pri;
4673 aead->base.cra_alignmask = 0;
4674 aead->base.cra_ctxsize = sizeof(struct iproc_ctx_s);
4675 INIT_LIST_HEAD(&aead->base.cra_list);
4676
4677 aead->base.cra_flags |= CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;
4678 /* setkey set in alg initialization */
4679 aead->setauthsize = aead_setauthsize;
4680 aead->encrypt = aead_encrypt;
4681 aead->decrypt = aead_decrypt;
4682 aead->init = aead_cra_init;
4683 aead->exit = aead_cra_exit;
4684
4685 err = crypto_register_aead(aead);
4686 /* Mark alg as having been registered, if successful */
4687 if (err == 0)
4688 driver_alg->registered = true;
4689 pr_debug(" registered aead %s\n", aead->base.cra_driver_name);
4690 return err;
4691 }
4692
4693 /* register crypto algorithms the device supports */
spu_algs_register(struct device * dev)4694 static int spu_algs_register(struct device *dev)
4695 {
4696 int i, j;
4697 int err;
4698
4699 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
4700 switch (driver_algs[i].type) {
4701 case CRYPTO_ALG_TYPE_ABLKCIPHER:
4702 err = spu_register_ablkcipher(&driver_algs[i]);
4703 break;
4704 case CRYPTO_ALG_TYPE_AHASH:
4705 err = spu_register_ahash(&driver_algs[i]);
4706 break;
4707 case CRYPTO_ALG_TYPE_AEAD:
4708 err = spu_register_aead(&driver_algs[i]);
4709 break;
4710 default:
4711 dev_err(dev,
4712 "iproc-crypto: unknown alg type: %d",
4713 driver_algs[i].type);
4714 err = -EINVAL;
4715 }
4716
4717 if (err) {
4718 dev_err(dev, "alg registration failed with error %d\n",
4719 err);
4720 goto err_algs;
4721 }
4722 }
4723
4724 return 0;
4725
4726 err_algs:
4727 for (j = 0; j < i; j++) {
4728 /* Skip any algorithm not registered */
4729 if (!driver_algs[j].registered)
4730 continue;
4731 switch (driver_algs[j].type) {
4732 case CRYPTO_ALG_TYPE_ABLKCIPHER:
4733 crypto_unregister_alg(&driver_algs[j].alg.crypto);
4734 driver_algs[j].registered = false;
4735 break;
4736 case CRYPTO_ALG_TYPE_AHASH:
4737 crypto_unregister_ahash(&driver_algs[j].alg.hash);
4738 driver_algs[j].registered = false;
4739 break;
4740 case CRYPTO_ALG_TYPE_AEAD:
4741 crypto_unregister_aead(&driver_algs[j].alg.aead);
4742 driver_algs[j].registered = false;
4743 break;
4744 }
4745 }
4746 return err;
4747 }
4748
4749 /* ==================== Kernel Platform API ==================== */
4750
4751 static struct spu_type_subtype spum_ns2_types = {
4752 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NS2
4753 };
4754
4755 static struct spu_type_subtype spum_nsp_types = {
4756 SPU_TYPE_SPUM, SPU_SUBTYPE_SPUM_NSP
4757 };
4758
4759 static struct spu_type_subtype spu2_types = {
4760 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V1
4761 };
4762
4763 static struct spu_type_subtype spu2_v2_types = {
4764 SPU_TYPE_SPU2, SPU_SUBTYPE_SPU2_V2
4765 };
4766
4767 static const struct of_device_id bcm_spu_dt_ids[] = {
4768 {
4769 .compatible = "brcm,spum-crypto",
4770 .data = &spum_ns2_types,
4771 },
4772 {
4773 .compatible = "brcm,spum-nsp-crypto",
4774 .data = &spum_nsp_types,
4775 },
4776 {
4777 .compatible = "brcm,spu2-crypto",
4778 .data = &spu2_types,
4779 },
4780 {
4781 .compatible = "brcm,spu2-v2-crypto",
4782 .data = &spu2_v2_types,
4783 },
4784 { /* sentinel */ }
4785 };
4786
4787 MODULE_DEVICE_TABLE(of, bcm_spu_dt_ids);
4788
spu_dt_read(struct platform_device * pdev)4789 static int spu_dt_read(struct platform_device *pdev)
4790 {
4791 struct device *dev = &pdev->dev;
4792 struct spu_hw *spu = &iproc_priv.spu;
4793 struct resource *spu_ctrl_regs;
4794 const struct of_device_id *match;
4795 const struct spu_type_subtype *matched_spu_type;
4796 struct device_node *dn = pdev->dev.of_node;
4797 int err, i;
4798
4799 /* Count number of mailbox channels */
4800 spu->num_chan = of_count_phandle_with_args(dn, "mboxes", "#mbox-cells");
4801
4802 match = of_match_device(of_match_ptr(bcm_spu_dt_ids), dev);
4803 if (!match) {
4804 dev_err(&pdev->dev, "Failed to match device\n");
4805 return -ENODEV;
4806 }
4807
4808 matched_spu_type = match->data;
4809
4810 spu->spu_type = matched_spu_type->type;
4811 spu->spu_subtype = matched_spu_type->subtype;
4812
4813 i = 0;
4814 for (i = 0; (i < MAX_SPUS) && ((spu_ctrl_regs =
4815 platform_get_resource(pdev, IORESOURCE_MEM, i)) != NULL); i++) {
4816
4817 spu->reg_vbase[i] = devm_ioremap_resource(dev, spu_ctrl_regs);
4818 if (IS_ERR(spu->reg_vbase[i])) {
4819 err = PTR_ERR(spu->reg_vbase[i]);
4820 dev_err(&pdev->dev, "Failed to map registers: %d\n",
4821 err);
4822 spu->reg_vbase[i] = NULL;
4823 return err;
4824 }
4825 }
4826 spu->num_spu = i;
4827 dev_dbg(dev, "Device has %d SPUs", spu->num_spu);
4828
4829 return 0;
4830 }
4831
bcm_spu_probe(struct platform_device * pdev)4832 int bcm_spu_probe(struct platform_device *pdev)
4833 {
4834 struct device *dev = &pdev->dev;
4835 struct spu_hw *spu = &iproc_priv.spu;
4836 int err = 0;
4837
4838 iproc_priv.pdev = pdev;
4839 platform_set_drvdata(iproc_priv.pdev,
4840 &iproc_priv);
4841
4842 err = spu_dt_read(pdev);
4843 if (err < 0)
4844 goto failure;
4845
4846 err = spu_mb_init(&pdev->dev);
4847 if (err < 0)
4848 goto failure;
4849
4850 if (spu->spu_type == SPU_TYPE_SPUM)
4851 iproc_priv.bcm_hdr_len = 8;
4852 else if (spu->spu_type == SPU_TYPE_SPU2)
4853 iproc_priv.bcm_hdr_len = 0;
4854
4855 spu_functions_register(&pdev->dev, spu->spu_type, spu->spu_subtype);
4856
4857 spu_counters_init();
4858
4859 spu_setup_debugfs();
4860
4861 err = spu_algs_register(dev);
4862 if (err < 0)
4863 goto fail_reg;
4864
4865 return 0;
4866
4867 fail_reg:
4868 spu_free_debugfs();
4869 failure:
4870 spu_mb_release(pdev);
4871 dev_err(dev, "%s failed with error %d.\n", __func__, err);
4872
4873 return err;
4874 }
4875
bcm_spu_remove(struct platform_device * pdev)4876 int bcm_spu_remove(struct platform_device *pdev)
4877 {
4878 int i;
4879 struct device *dev = &pdev->dev;
4880 char *cdn;
4881
4882 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
4883 /*
4884 * Not all algorithms were registered, depending on whether
4885 * hardware is SPU or SPU2. So here we make sure to skip
4886 * those algorithms that were not previously registered.
4887 */
4888 if (!driver_algs[i].registered)
4889 continue;
4890
4891 switch (driver_algs[i].type) {
4892 case CRYPTO_ALG_TYPE_ABLKCIPHER:
4893 crypto_unregister_alg(&driver_algs[i].alg.crypto);
4894 dev_dbg(dev, " unregistered cipher %s\n",
4895 driver_algs[i].alg.crypto.cra_driver_name);
4896 driver_algs[i].registered = false;
4897 break;
4898 case CRYPTO_ALG_TYPE_AHASH:
4899 crypto_unregister_ahash(&driver_algs[i].alg.hash);
4900 cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name;
4901 dev_dbg(dev, " unregistered hash %s\n", cdn);
4902 driver_algs[i].registered = false;
4903 break;
4904 case CRYPTO_ALG_TYPE_AEAD:
4905 crypto_unregister_aead(&driver_algs[i].alg.aead);
4906 dev_dbg(dev, " unregistered aead %s\n",
4907 driver_algs[i].alg.aead.base.cra_driver_name);
4908 driver_algs[i].registered = false;
4909 break;
4910 }
4911 }
4912 spu_free_debugfs();
4913 spu_mb_release(pdev);
4914 return 0;
4915 }
4916
4917 /* ===== Kernel Module API ===== */
4918
4919 static struct platform_driver bcm_spu_pdriver = {
4920 .driver = {
4921 .name = "brcm-spu-crypto",
4922 .of_match_table = of_match_ptr(bcm_spu_dt_ids),
4923 },
4924 .probe = bcm_spu_probe,
4925 .remove = bcm_spu_remove,
4926 };
4927 module_platform_driver(bcm_spu_pdriver);
4928
4929 MODULE_AUTHOR("Rob Rice <rob.rice@broadcom.com>");
4930 MODULE_DESCRIPTION("Broadcom symmetric crypto offload driver");
4931 MODULE_LICENSE("GPL v2");
4932