1 /*
2 * Copyright 2009 VMware, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Michel Dänzer
23 */
24 #include <drm/drmP.h>
25 #include <drm/amdgpu_drm.h>
26 #include "amdgpu.h"
27 #include "amdgpu_uvd.h"
28 #include "amdgpu_vce.h"
29
30 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
amdgpu_do_test_moves(struct amdgpu_device * adev)31 static void amdgpu_do_test_moves(struct amdgpu_device *adev)
32 {
33 struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
34 struct amdgpu_bo *vram_obj = NULL;
35 struct amdgpu_bo **gtt_obj = NULL;
36 uint64_t gart_addr, vram_addr;
37 unsigned n, size;
38 int i, r;
39
40 size = 1024 * 1024;
41
42 /* Number of tests =
43 * (Total GTT - IB pool - writeback page - ring buffers) / test size
44 */
45 n = adev->mc.gart_size - AMDGPU_IB_POOL_SIZE*64*1024;
46 for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
47 if (adev->rings[i])
48 n -= adev->rings[i]->ring_size;
49 if (adev->wb.wb_obj)
50 n -= AMDGPU_GPU_PAGE_SIZE;
51 if (adev->irq.ih.ring_obj)
52 n -= adev->irq.ih.ring_size;
53 n /= size;
54
55 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
56 if (!gtt_obj) {
57 DRM_ERROR("Failed to allocate %d pointers\n", n);
58 r = 1;
59 goto out_cleanup;
60 }
61
62 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
63 AMDGPU_GEM_DOMAIN_VRAM, 0,
64 NULL, NULL, 0, &vram_obj);
65 if (r) {
66 DRM_ERROR("Failed to create VRAM object\n");
67 goto out_cleanup;
68 }
69 r = amdgpu_bo_reserve(vram_obj, false);
70 if (unlikely(r != 0))
71 goto out_unref;
72 r = amdgpu_bo_pin(vram_obj, AMDGPU_GEM_DOMAIN_VRAM, &vram_addr);
73 if (r) {
74 DRM_ERROR("Failed to pin VRAM object\n");
75 goto out_unres;
76 }
77 for (i = 0; i < n; i++) {
78 void *gtt_map, *vram_map;
79 void **gart_start, **gart_end;
80 void **vram_start, **vram_end;
81 struct dma_fence *fence = NULL;
82
83 r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
84 AMDGPU_GEM_DOMAIN_GTT, 0, NULL,
85 NULL, 0, gtt_obj + i);
86 if (r) {
87 DRM_ERROR("Failed to create GTT object %d\n", i);
88 goto out_lclean;
89 }
90
91 r = amdgpu_bo_reserve(gtt_obj[i], false);
92 if (unlikely(r != 0))
93 goto out_lclean_unref;
94 r = amdgpu_bo_pin(gtt_obj[i], AMDGPU_GEM_DOMAIN_GTT, &gart_addr);
95 if (r) {
96 DRM_ERROR("Failed to pin GTT object %d\n", i);
97 goto out_lclean_unres;
98 }
99
100 r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
101 if (r) {
102 DRM_ERROR("Failed to map GTT object %d\n", i);
103 goto out_lclean_unpin;
104 }
105
106 for (gart_start = gtt_map, gart_end = gtt_map + size;
107 gart_start < gart_end;
108 gart_start++)
109 *gart_start = gart_start;
110
111 amdgpu_bo_kunmap(gtt_obj[i]);
112
113 r = amdgpu_copy_buffer(ring, gart_addr, vram_addr,
114 size, NULL, &fence, false, false);
115
116 if (r) {
117 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
118 goto out_lclean_unpin;
119 }
120
121 r = dma_fence_wait(fence, false);
122 if (r) {
123 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
124 goto out_lclean_unpin;
125 }
126
127 dma_fence_put(fence);
128 fence = NULL;
129
130 r = amdgpu_bo_kmap(vram_obj, &vram_map);
131 if (r) {
132 DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
133 goto out_lclean_unpin;
134 }
135
136 for (gart_start = gtt_map, gart_end = gtt_map + size,
137 vram_start = vram_map, vram_end = vram_map + size;
138 vram_start < vram_end;
139 gart_start++, vram_start++) {
140 if (*vram_start != gart_start) {
141 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
142 "expected 0x%p (GTT/VRAM offset "
143 "0x%16llx/0x%16llx)\n",
144 i, *vram_start, gart_start,
145 (unsigned long long)
146 (gart_addr - adev->mc.gart_start +
147 (void*)gart_start - gtt_map),
148 (unsigned long long)
149 (vram_addr - adev->mc.vram_start +
150 (void*)gart_start - gtt_map));
151 amdgpu_bo_kunmap(vram_obj);
152 goto out_lclean_unpin;
153 }
154 *vram_start = vram_start;
155 }
156
157 amdgpu_bo_kunmap(vram_obj);
158
159 r = amdgpu_copy_buffer(ring, vram_addr, gart_addr,
160 size, NULL, &fence, false, false);
161
162 if (r) {
163 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
164 goto out_lclean_unpin;
165 }
166
167 r = dma_fence_wait(fence, false);
168 if (r) {
169 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
170 goto out_lclean_unpin;
171 }
172
173 dma_fence_put(fence);
174 fence = NULL;
175
176 r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
177 if (r) {
178 DRM_ERROR("Failed to map GTT object after copy %d\n", i);
179 goto out_lclean_unpin;
180 }
181
182 for (gart_start = gtt_map, gart_end = gtt_map + size,
183 vram_start = vram_map, vram_end = vram_map + size;
184 gart_start < gart_end;
185 gart_start++, vram_start++) {
186 if (*gart_start != vram_start) {
187 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
188 "expected 0x%p (VRAM/GTT offset "
189 "0x%16llx/0x%16llx)\n",
190 i, *gart_start, vram_start,
191 (unsigned long long)
192 (vram_addr - adev->mc.vram_start +
193 (void*)vram_start - vram_map),
194 (unsigned long long)
195 (gart_addr - adev->mc.gart_start +
196 (void*)vram_start - vram_map));
197 amdgpu_bo_kunmap(gtt_obj[i]);
198 goto out_lclean_unpin;
199 }
200 }
201
202 amdgpu_bo_kunmap(gtt_obj[i]);
203
204 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
205 gart_addr - adev->mc.gart_start);
206 continue;
207
208 out_lclean_unpin:
209 amdgpu_bo_unpin(gtt_obj[i]);
210 out_lclean_unres:
211 amdgpu_bo_unreserve(gtt_obj[i]);
212 out_lclean_unref:
213 amdgpu_bo_unref(>t_obj[i]);
214 out_lclean:
215 for (--i; i >= 0; --i) {
216 amdgpu_bo_unpin(gtt_obj[i]);
217 amdgpu_bo_unreserve(gtt_obj[i]);
218 amdgpu_bo_unref(>t_obj[i]);
219 }
220 if (fence)
221 dma_fence_put(fence);
222 break;
223 }
224
225 amdgpu_bo_unpin(vram_obj);
226 out_unres:
227 amdgpu_bo_unreserve(vram_obj);
228 out_unref:
229 amdgpu_bo_unref(&vram_obj);
230 out_cleanup:
231 kfree(gtt_obj);
232 if (r) {
233 pr_warn("Error while testing BO move\n");
234 }
235 }
236
amdgpu_test_moves(struct amdgpu_device * adev)237 void amdgpu_test_moves(struct amdgpu_device *adev)
238 {
239 if (adev->mman.buffer_funcs)
240 amdgpu_do_test_moves(adev);
241 }
242