1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) 3 #define _AMDGPU_TRACE_H_ 4 5 #include <linux/stringify.h> 6 #include <linux/types.h> 7 #include <linux/tracepoint.h> 8 9 #include <drm/drmP.h> 10 11 #undef TRACE_SYSTEM 12 #define TRACE_SYSTEM amdgpu 13 #define TRACE_INCLUDE_FILE amdgpu_trace 14 15 #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \ 16 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished) 17 18 TRACE_EVENT(amdgpu_ttm_tt_populate, 19 TP_PROTO(struct amdgpu_device *adev, uint64_t dma_address, uint64_t phys_address), 20 TP_ARGS(adev, dma_address, phys_address), 21 TP_STRUCT__entry( 22 __field(uint16_t, domain) 23 __field(uint8_t, bus) 24 __field(uint8_t, slot) 25 __field(uint8_t, func) 26 __field(uint64_t, dma) 27 __field(uint64_t, phys) 28 ), 29 TP_fast_assign( 30 __entry->domain = pci_domain_nr(adev->pdev->bus); 31 __entry->bus = adev->pdev->bus->number; 32 __entry->slot = PCI_SLOT(adev->pdev->devfn); 33 __entry->func = PCI_FUNC(adev->pdev->devfn); 34 __entry->dma = dma_address; 35 __entry->phys = phys_address; 36 ), 37 TP_printk("%04x:%02x:%02x.%x: 0x%llx => 0x%llx", 38 (unsigned)__entry->domain, 39 (unsigned)__entry->bus, 40 (unsigned)__entry->slot, 41 (unsigned)__entry->func, 42 (unsigned long long)__entry->dma, 43 (unsigned long long)__entry->phys) 44 ); 45 46 TRACE_EVENT(amdgpu_ttm_tt_unpopulate, 47 TP_PROTO(struct amdgpu_device *adev, uint64_t dma_address, uint64_t phys_address), 48 TP_ARGS(adev, dma_address, phys_address), 49 TP_STRUCT__entry( 50 __field(uint16_t, domain) 51 __field(uint8_t, bus) 52 __field(uint8_t, slot) 53 __field(uint8_t, func) 54 __field(uint64_t, dma) 55 __field(uint64_t, phys) 56 ), 57 TP_fast_assign( 58 __entry->domain = pci_domain_nr(adev->pdev->bus); 59 __entry->bus = adev->pdev->bus->number; 60 __entry->slot = PCI_SLOT(adev->pdev->devfn); 61 __entry->func = PCI_FUNC(adev->pdev->devfn); 62 __entry->dma = dma_address; 63 __entry->phys = phys_address; 64 ), 65 TP_printk("%04x:%02x:%02x.%x: 0x%llx => 0x%llx", 66 (unsigned)__entry->domain, 67 (unsigned)__entry->bus, 68 (unsigned)__entry->slot, 69 (unsigned)__entry->func, 70 (unsigned long long)__entry->dma, 71 (unsigned long long)__entry->phys) 72 ); 73 74 TRACE_EVENT(amdgpu_mm_rreg, 75 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 76 TP_ARGS(did, reg, value), 77 TP_STRUCT__entry( 78 __field(unsigned, did) 79 __field(uint32_t, reg) 80 __field(uint32_t, value) 81 ), 82 TP_fast_assign( 83 __entry->did = did; 84 __entry->reg = reg; 85 __entry->value = value; 86 ), 87 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 88 (unsigned long)__entry->did, 89 (unsigned long)__entry->reg, 90 (unsigned long)__entry->value) 91 ); 92 93 TRACE_EVENT(amdgpu_mm_wreg, 94 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 95 TP_ARGS(did, reg, value), 96 TP_STRUCT__entry( 97 __field(unsigned, did) 98 __field(uint32_t, reg) 99 __field(uint32_t, value) 100 ), 101 TP_fast_assign( 102 __entry->did = did; 103 __entry->reg = reg; 104 __entry->value = value; 105 ), 106 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 107 (unsigned long)__entry->did, 108 (unsigned long)__entry->reg, 109 (unsigned long)__entry->value) 110 ); 111 112 TRACE_EVENT(amdgpu_iv, 113 TP_PROTO(struct amdgpu_iv_entry *iv), 114 TP_ARGS(iv), 115 TP_STRUCT__entry( 116 __field(unsigned, client_id) 117 __field(unsigned, src_id) 118 __field(unsigned, ring_id) 119 __field(unsigned, vm_id) 120 __field(unsigned, vm_id_src) 121 __field(uint64_t, timestamp) 122 __field(unsigned, timestamp_src) 123 __field(unsigned, pas_id) 124 __array(unsigned, src_data, 4) 125 ), 126 TP_fast_assign( 127 __entry->client_id = iv->client_id; 128 __entry->src_id = iv->src_id; 129 __entry->ring_id = iv->ring_id; 130 __entry->vm_id = iv->vm_id; 131 __entry->vm_id_src = iv->vm_id_src; 132 __entry->timestamp = iv->timestamp; 133 __entry->timestamp_src = iv->timestamp_src; 134 __entry->pas_id = iv->pas_id; 135 __entry->src_data[0] = iv->src_data[0]; 136 __entry->src_data[1] = iv->src_data[1]; 137 __entry->src_data[2] = iv->src_data[2]; 138 __entry->src_data[3] = iv->src_data[3]; 139 ), 140 TP_printk("client_id:%u src_id:%u ring:%u vm_id:%u timestamp: %llu pas_id:%u src_data: %08x %08x %08x %08x\n", 141 __entry->client_id, __entry->src_id, 142 __entry->ring_id, __entry->vm_id, 143 __entry->timestamp, __entry->pas_id, 144 __entry->src_data[0], __entry->src_data[1], 145 __entry->src_data[2], __entry->src_data[3]) 146 ); 147 148 149 TRACE_EVENT(amdgpu_bo_create, 150 TP_PROTO(struct amdgpu_bo *bo), 151 TP_ARGS(bo), 152 TP_STRUCT__entry( 153 __field(struct amdgpu_bo *, bo) 154 __field(u32, pages) 155 __field(u32, type) 156 __field(u32, prefer) 157 __field(u32, allow) 158 __field(u32, visible) 159 ), 160 161 TP_fast_assign( 162 __entry->bo = bo; 163 __entry->pages = bo->tbo.num_pages; 164 __entry->type = bo->tbo.mem.mem_type; 165 __entry->prefer = bo->preferred_domains; 166 __entry->allow = bo->allowed_domains; 167 __entry->visible = bo->flags; 168 ), 169 170 TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d", 171 __entry->bo, __entry->pages, __entry->type, 172 __entry->prefer, __entry->allow, __entry->visible) 173 ); 174 175 TRACE_EVENT(amdgpu_cs, 176 TP_PROTO(struct amdgpu_cs_parser *p, int i), 177 TP_ARGS(p, i), 178 TP_STRUCT__entry( 179 __field(struct amdgpu_bo_list *, bo_list) 180 __field(u32, ring) 181 __field(u32, dw) 182 __field(u32, fences) 183 ), 184 185 TP_fast_assign( 186 __entry->bo_list = p->bo_list; 187 __entry->ring = p->job->ring->idx; 188 __entry->dw = p->job->ibs[i].length_dw; 189 __entry->fences = amdgpu_fence_count_emitted( 190 p->job->ring); 191 ), 192 TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u", 193 __entry->bo_list, __entry->ring, __entry->dw, 194 __entry->fences) 195 ); 196 197 TRACE_EVENT(amdgpu_cs_ioctl, 198 TP_PROTO(struct amdgpu_job *job), 199 TP_ARGS(job), 200 TP_STRUCT__entry( 201 __field(uint64_t, sched_job_id) 202 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 203 __field(unsigned int, context) 204 __field(unsigned int, seqno) 205 __field(struct dma_fence *, fence) 206 __field(char *, ring_name) 207 __field(u32, num_ibs) 208 ), 209 210 TP_fast_assign( 211 __entry->sched_job_id = job->base.id; 212 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 213 __entry->context = job->base.s_fence->finished.context; 214 __entry->seqno = job->base.s_fence->finished.seqno; 215 __entry->ring_name = job->ring->name; 216 __entry->num_ibs = job->num_ibs; 217 ), 218 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u", 219 __entry->sched_job_id, __get_str(timeline), __entry->context, 220 __entry->seqno, __entry->ring_name, __entry->num_ibs) 221 ); 222 223 TRACE_EVENT(amdgpu_sched_run_job, 224 TP_PROTO(struct amdgpu_job *job), 225 TP_ARGS(job), 226 TP_STRUCT__entry( 227 __field(uint64_t, sched_job_id) 228 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 229 __field(unsigned int, context) 230 __field(unsigned int, seqno) 231 __field(char *, ring_name) 232 __field(u32, num_ibs) 233 ), 234 235 TP_fast_assign( 236 __entry->sched_job_id = job->base.id; 237 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 238 __entry->context = job->base.s_fence->finished.context; 239 __entry->seqno = job->base.s_fence->finished.seqno; 240 __entry->ring_name = job->ring->name; 241 __entry->num_ibs = job->num_ibs; 242 ), 243 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u", 244 __entry->sched_job_id, __get_str(timeline), __entry->context, 245 __entry->seqno, __entry->ring_name, __entry->num_ibs) 246 ); 247 248 249 TRACE_EVENT(amdgpu_vm_grab_id, 250 TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring, 251 struct amdgpu_job *job), 252 TP_ARGS(vm, ring, job), 253 TP_STRUCT__entry( 254 __field(struct amdgpu_vm *, vm) 255 __field(u32, ring) 256 __field(u32, vm_id) 257 __field(u32, vm_hub) 258 __field(u64, pd_addr) 259 __field(u32, needs_flush) 260 ), 261 262 TP_fast_assign( 263 __entry->vm = vm; 264 __entry->ring = ring->idx; 265 __entry->vm_id = job->vm_id; 266 __entry->vm_hub = ring->funcs->vmhub, 267 __entry->pd_addr = job->vm_pd_addr; 268 __entry->needs_flush = job->vm_needs_flush; 269 ), 270 TP_printk("vm=%p, ring=%u, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u", 271 __entry->vm, __entry->ring, __entry->vm_id, 272 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush) 273 ); 274 275 TRACE_EVENT(amdgpu_vm_bo_map, 276 TP_PROTO(struct amdgpu_bo_va *bo_va, 277 struct amdgpu_bo_va_mapping *mapping), 278 TP_ARGS(bo_va, mapping), 279 TP_STRUCT__entry( 280 __field(struct amdgpu_bo *, bo) 281 __field(long, start) 282 __field(long, last) 283 __field(u64, offset) 284 __field(u64, flags) 285 ), 286 287 TP_fast_assign( 288 __entry->bo = bo_va ? bo_va->base.bo : NULL; 289 __entry->start = mapping->start; 290 __entry->last = mapping->last; 291 __entry->offset = mapping->offset; 292 __entry->flags = mapping->flags; 293 ), 294 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 295 __entry->bo, __entry->start, __entry->last, 296 __entry->offset, __entry->flags) 297 ); 298 299 TRACE_EVENT(amdgpu_vm_bo_unmap, 300 TP_PROTO(struct amdgpu_bo_va *bo_va, 301 struct amdgpu_bo_va_mapping *mapping), 302 TP_ARGS(bo_va, mapping), 303 TP_STRUCT__entry( 304 __field(struct amdgpu_bo *, bo) 305 __field(long, start) 306 __field(long, last) 307 __field(u64, offset) 308 __field(u64, flags) 309 ), 310 311 TP_fast_assign( 312 __entry->bo = bo_va->base.bo; 313 __entry->start = mapping->start; 314 __entry->last = mapping->last; 315 __entry->offset = mapping->offset; 316 __entry->flags = mapping->flags; 317 ), 318 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 319 __entry->bo, __entry->start, __entry->last, 320 __entry->offset, __entry->flags) 321 ); 322 323 DECLARE_EVENT_CLASS(amdgpu_vm_mapping, 324 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 325 TP_ARGS(mapping), 326 TP_STRUCT__entry( 327 __field(u64, soffset) 328 __field(u64, eoffset) 329 __field(u64, flags) 330 ), 331 332 TP_fast_assign( 333 __entry->soffset = mapping->start; 334 __entry->eoffset = mapping->last + 1; 335 __entry->flags = mapping->flags; 336 ), 337 TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx", 338 __entry->soffset, __entry->eoffset, __entry->flags) 339 ); 340 341 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update, 342 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 343 TP_ARGS(mapping) 344 ); 345 346 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping, 347 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 348 TP_ARGS(mapping) 349 ); 350 351 TRACE_EVENT(amdgpu_vm_set_ptes, 352 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, 353 uint32_t incr, uint64_t flags), 354 TP_ARGS(pe, addr, count, incr, flags), 355 TP_STRUCT__entry( 356 __field(u64, pe) 357 __field(u64, addr) 358 __field(u32, count) 359 __field(u32, incr) 360 __field(u64, flags) 361 ), 362 363 TP_fast_assign( 364 __entry->pe = pe; 365 __entry->addr = addr; 366 __entry->count = count; 367 __entry->incr = incr; 368 __entry->flags = flags; 369 ), 370 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u", 371 __entry->pe, __entry->addr, __entry->incr, 372 __entry->flags, __entry->count) 373 ); 374 375 TRACE_EVENT(amdgpu_vm_copy_ptes, 376 TP_PROTO(uint64_t pe, uint64_t src, unsigned count), 377 TP_ARGS(pe, src, count), 378 TP_STRUCT__entry( 379 __field(u64, pe) 380 __field(u64, src) 381 __field(u32, count) 382 ), 383 384 TP_fast_assign( 385 __entry->pe = pe; 386 __entry->src = src; 387 __entry->count = count; 388 ), 389 TP_printk("pe=%010Lx, src=%010Lx, count=%u", 390 __entry->pe, __entry->src, __entry->count) 391 ); 392 393 TRACE_EVENT(amdgpu_vm_flush, 394 TP_PROTO(struct amdgpu_ring *ring, unsigned vm_id, 395 uint64_t pd_addr), 396 TP_ARGS(ring, vm_id, pd_addr), 397 TP_STRUCT__entry( 398 __field(u32, ring) 399 __field(u32, vm_id) 400 __field(u32, vm_hub) 401 __field(u64, pd_addr) 402 ), 403 404 TP_fast_assign( 405 __entry->ring = ring->idx; 406 __entry->vm_id = vm_id; 407 __entry->vm_hub = ring->funcs->vmhub; 408 __entry->pd_addr = pd_addr; 409 ), 410 TP_printk("ring=%u, id=%u, hub=%u, pd_addr=%010Lx", 411 __entry->ring, __entry->vm_id, 412 __entry->vm_hub,__entry->pd_addr) 413 ); 414 415 TRACE_EVENT(amdgpu_bo_list_set, 416 TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo), 417 TP_ARGS(list, bo), 418 TP_STRUCT__entry( 419 __field(struct amdgpu_bo_list *, list) 420 __field(struct amdgpu_bo *, bo) 421 __field(u64, bo_size) 422 ), 423 424 TP_fast_assign( 425 __entry->list = list; 426 __entry->bo = bo; 427 __entry->bo_size = amdgpu_bo_size(bo); 428 ), 429 TP_printk("list=%p, bo=%p, bo_size=%Ld", 430 __entry->list, 431 __entry->bo, 432 __entry->bo_size) 433 ); 434 435 TRACE_EVENT(amdgpu_cs_bo_status, 436 TP_PROTO(uint64_t total_bo, uint64_t total_size), 437 TP_ARGS(total_bo, total_size), 438 TP_STRUCT__entry( 439 __field(u64, total_bo) 440 __field(u64, total_size) 441 ), 442 443 TP_fast_assign( 444 __entry->total_bo = total_bo; 445 __entry->total_size = total_size; 446 ), 447 TP_printk("total_bo_size=%Ld, total_bo_count=%Ld", 448 __entry->total_bo, __entry->total_size) 449 ); 450 451 TRACE_EVENT(amdgpu_ttm_bo_move, 452 TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement), 453 TP_ARGS(bo, new_placement, old_placement), 454 TP_STRUCT__entry( 455 __field(struct amdgpu_bo *, bo) 456 __field(u64, bo_size) 457 __field(u32, new_placement) 458 __field(u32, old_placement) 459 ), 460 461 TP_fast_assign( 462 __entry->bo = bo; 463 __entry->bo_size = amdgpu_bo_size(bo); 464 __entry->new_placement = new_placement; 465 __entry->old_placement = old_placement; 466 ), 467 TP_printk("bo=%p, from=%d, to=%d, size=%Ld", 468 __entry->bo, __entry->old_placement, 469 __entry->new_placement, __entry->bo_size) 470 ); 471 472 #undef AMDGPU_JOB_GET_TIMELINE_NAME 473 #endif 474 475 /* This part must be outside protection */ 476 #undef TRACE_INCLUDE_PATH 477 #define TRACE_INCLUDE_PATH . 478 #include <trace/define_trace.h> 479