1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _EVENTMGR_H_ 25 #define _EVENTMGR_H_ 26 27 #include <linux/mutex.h> 28 #include "pp_instance.h" 29 #include "hardwaremanager.h" 30 #include "eventmanager.h" 31 #include "pp_feature.h" 32 #include "pp_power_source.h" 33 #include "power_state.h" 34 35 typedef int (*pem_event_action)(struct pp_eventmgr *eventmgr, 36 struct pem_event_data *event_data); 37 38 struct action_chain { 39 const char *description; /* action chain description for debugging purpose */ 40 const pem_event_action * const *action_chain; /* pointer to chain of event actions */ 41 }; 42 43 struct pem_power_source_ui_state_info { 44 enum PP_StateUILabel current_ui_label; 45 enum PP_StateUILabel default_ui_lable; 46 unsigned long configurable_ui_mapping; 47 }; 48 49 struct pp_clock_range { 50 uint32_t min_sclk_khz; 51 uint32_t max_sclk_khz; 52 53 uint32_t min_mclk_khz; 54 uint32_t max_mclk_khz; 55 56 uint32_t min_vclk_khz; 57 uint32_t max_vclk_khz; 58 59 uint32_t min_dclk_khz; 60 uint32_t max_dclk_khz; 61 62 uint32_t min_aclk_khz; 63 uint32_t max_aclk_khz; 64 65 uint32_t min_eclk_khz; 66 uint32_t max_eclk_khz; 67 }; 68 69 enum pp_state { 70 UNINITIALIZED, 71 INACTIVE, 72 ACTIVE 73 }; 74 75 enum pp_ring_index { 76 PP_RING_TYPE_GFX_INDEX = 0, 77 PP_RING_TYPE_DMA_INDEX, 78 PP_RING_TYPE_DMA1_INDEX, 79 PP_RING_TYPE_UVD_INDEX, 80 PP_RING_TYPE_VCE0_INDEX, 81 PP_RING_TYPE_VCE1_INDEX, 82 PP_RING_TYPE_CP1_INDEX, 83 PP_RING_TYPE_CP2_INDEX, 84 PP_NUM_RINGS, 85 }; 86 87 struct pp_request { 88 uint32_t flags; 89 uint32_t sclk; 90 uint32_t sclk_throttle; 91 uint32_t mclk; 92 uint32_t vclk; 93 uint32_t dclk; 94 uint32_t eclk; 95 uint32_t aclk; 96 uint32_t iclk; 97 uint32_t vp8clk; 98 uint32_t rsv[32]; 99 }; 100 101 struct pp_eventmgr { 102 struct pp_hwmgr *hwmgr; 103 struct pp_smumgr *smumgr; 104 105 struct pp_feature_info features[PP_Feature_Max]; 106 const struct action_chain *event_chain[AMD_PP_EVENT_MAX]; 107 struct phm_platform_descriptor *platform_descriptor; 108 struct pp_clock_range clock_range; 109 enum pp_power_source current_power_source; 110 struct pem_power_source_ui_state_info ui_state_info[PP_PowerSource_Max]; 111 enum pp_state states[PP_NUM_RINGS]; 112 struct pp_request hi_req; 113 struct list_head context_list; 114 struct mutex lock; 115 bool block_adjust_power_state; 116 bool enable_cg; 117 bool enable_gfx_cgpg; 118 int (*pp_eventmgr_init)(struct pp_eventmgr *eventmgr); 119 void (*pp_eventmgr_fini)(struct pp_eventmgr *eventmgr); 120 }; 121 122 int eventmgr_early_init(struct pp_instance *handle); 123 124 #endif /* _EVENTMGR_H_ */ 125