1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _SMU7_SMUMANAGER_H 25 #define _SMU7_SMUMANAGER_H 26 27 28 #include <pp_endian.h> 29 30 #define SMC_RAM_END 0x40000 31 32 struct smu7_buffer_entry { 33 uint32_t data_size; 34 uint32_t mc_addr_low; 35 uint32_t mc_addr_high; 36 void *kaddr; 37 unsigned long handle; 38 }; 39 40 struct smu7_avfs { 41 enum AVFS_BTC_STATUS avfs_btc_status; 42 uint32_t avfs_btc_param; 43 }; 44 45 struct smu7_smumgr { 46 uint8_t *header; 47 uint8_t *mec_image; 48 struct smu7_buffer_entry smu_buffer; 49 struct smu7_buffer_entry header_buffer; 50 51 uint32_t soft_regs_start; 52 uint32_t dpm_table_start; 53 uint32_t mc_reg_table_start; 54 uint32_t fan_table_start; 55 uint32_t arb_table_start; 56 uint32_t ulv_setting_starts; 57 uint8_t security_hard_key; 58 uint32_t acpi_optimization; 59 struct smu7_avfs avfs; 60 }; 61 62 63 int smu7_copy_bytes_from_smc(struct pp_smumgr *smumgr, uint32_t smc_start_address, 64 uint32_t *dest, uint32_t byte_count, uint32_t limit); 65 int smu7_copy_bytes_to_smc(struct pp_smumgr *smumgr, uint32_t smc_start_address, 66 const uint8_t *src, uint32_t byte_count, uint32_t limit); 67 int smu7_program_jump_on_start(struct pp_smumgr *smumgr); 68 bool smu7_is_smc_ram_running(struct pp_smumgr *smumgr); 69 int smu7_send_msg_to_smc(struct pp_smumgr *smumgr, uint16_t msg); 70 int smu7_send_msg_to_smc_without_waiting(struct pp_smumgr *smumgr, uint16_t msg); 71 int smu7_send_msg_to_smc_with_parameter(struct pp_smumgr *smumgr, uint16_t msg, 72 uint32_t parameter); 73 int smu7_send_msg_to_smc_with_parameter_without_waiting(struct pp_smumgr *smumgr, 74 uint16_t msg, uint32_t parameter); 75 int smu7_send_msg_to_smc_offset(struct pp_smumgr *smumgr); 76 int smu7_wait_for_smc_inactive(struct pp_smumgr *smumgr); 77 78 enum cgs_ucode_id smu7_convert_fw_type_to_cgs(uint32_t fw_type); 79 int smu7_read_smc_sram_dword(struct pp_smumgr *smumgr, uint32_t smc_addr, 80 uint32_t *value, uint32_t limit); 81 int smu7_write_smc_sram_dword(struct pp_smumgr *smumgr, uint32_t smc_addr, 82 uint32_t value, uint32_t limit); 83 84 int smu7_request_smu_load_fw(struct pp_smumgr *smumgr); 85 int smu7_check_fw_load_finish(struct pp_smumgr *smumgr, uint32_t fw_type); 86 int smu7_reload_firmware(struct pp_smumgr *smumgr); 87 int smu7_upload_smu_firmware_image(struct pp_smumgr *smumgr); 88 int smu7_init(struct pp_smumgr *smumgr); 89 int smu7_smu_fini(struct pp_smumgr *smumgr); 90 91 #endif