1 /*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 /* For debugging crashes, userspace can:
19 *
20 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
21 *
22 * To log the cmdstream in a format that is understood by freedreno/cffdump
23 * utility. By comparing the last successfully completed fence #, to the
24 * cmdstream for the next fence, you can narrow down which process and submit
25 * caused the gpu crash/lockup.
26 *
27 * This bypasses drm_debugfs_create_files() mainly because we need to use
28 * our own fops for a bit more control. In particular, we don't want to
29 * do anything if userspace doesn't have the debugfs file open.
30 *
31 * The module-param "rd_full", which defaults to false, enables snapshotting
32 * all (non-written) buffers in the submit, rather than just cmdstream bo's.
33 * This is useful to capture the contents of (for example) vbo's or textures,
34 * or shader programs (if not emitted inline in cmdstream).
35 */
36
37 #ifdef CONFIG_DEBUG_FS
38
39 #include <linux/kfifo.h>
40 #include <linux/debugfs.h>
41 #include <linux/circ_buf.h>
42 #include <linux/wait.h>
43
44 #include "msm_drv.h"
45 #include "msm_gpu.h"
46 #include "msm_gem.h"
47
48 static bool rd_full = false;
49 MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents");
50 module_param_named(rd_full, rd_full, bool, 0600);
51
52 enum rd_sect_type {
53 RD_NONE,
54 RD_TEST, /* ascii text */
55 RD_CMD, /* ascii text */
56 RD_GPUADDR, /* u32 gpuaddr, u32 size */
57 RD_CONTEXT, /* raw dump */
58 RD_CMDSTREAM, /* raw dump */
59 RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */
60 RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */
61 RD_FLUSH, /* empty, clear previous params */
62 RD_PROGRAM, /* shader program, raw dump */
63 RD_VERT_SHADER,
64 RD_FRAG_SHADER,
65 RD_BUFFER_CONTENTS,
66 RD_GPU_ID,
67 };
68
69 #define BUF_SZ 512 /* should be power of 2 */
70
71 /* space used: */
72 #define circ_count(circ) \
73 (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
74 #define circ_count_to_end(circ) \
75 (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
76 /* space available: */
77 #define circ_space(circ) \
78 (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
79 #define circ_space_to_end(circ) \
80 (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))
81
82 struct msm_rd_state {
83 struct drm_device *dev;
84
85 bool open;
86
87 /* current submit to read out: */
88 struct msm_gem_submit *submit;
89
90 /* fifo access is synchronized on the producer side by
91 * struct_mutex held by submit code (otherwise we could
92 * end up w/ cmds logged in different order than they
93 * were executed). And read_lock synchronizes the reads
94 */
95 struct mutex read_lock;
96
97 wait_queue_head_t fifo_event;
98 struct circ_buf fifo;
99
100 char buf[BUF_SZ];
101 };
102
rd_write(struct msm_rd_state * rd,const void * buf,int sz)103 static void rd_write(struct msm_rd_state *rd, const void *buf, int sz)
104 {
105 struct circ_buf *fifo = &rd->fifo;
106 const char *ptr = buf;
107
108 while (sz > 0) {
109 char *fptr = &fifo->buf[fifo->head];
110 int n;
111
112 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0 || !rd->open);
113 if (!rd->open)
114 return;
115
116 /* Note that smp_load_acquire() is not strictly required
117 * as CIRC_SPACE_TO_END() does not access the tail more
118 * than once.
119 */
120 n = min(sz, circ_space_to_end(&rd->fifo));
121 memcpy(fptr, ptr, n);
122
123 smp_store_release(&fifo->head, (fifo->head + n) & (BUF_SZ - 1));
124 sz -= n;
125 ptr += n;
126
127 wake_up_all(&rd->fifo_event);
128 }
129 }
130
rd_write_section(struct msm_rd_state * rd,enum rd_sect_type type,const void * buf,int sz)131 static void rd_write_section(struct msm_rd_state *rd,
132 enum rd_sect_type type, const void *buf, int sz)
133 {
134 rd_write(rd, &type, 4);
135 rd_write(rd, &sz, 4);
136 rd_write(rd, buf, sz);
137 }
138
rd_read(struct file * file,char __user * buf,size_t sz,loff_t * ppos)139 static ssize_t rd_read(struct file *file, char __user *buf,
140 size_t sz, loff_t *ppos)
141 {
142 struct msm_rd_state *rd = file->private_data;
143 struct circ_buf *fifo = &rd->fifo;
144 const char *fptr = &fifo->buf[fifo->tail];
145 int n = 0, ret = 0;
146
147 mutex_lock(&rd->read_lock);
148
149 ret = wait_event_interruptible(rd->fifo_event,
150 circ_count(&rd->fifo) > 0);
151 if (ret)
152 goto out;
153
154 /* Note that smp_load_acquire() is not strictly required
155 * as CIRC_CNT_TO_END() does not access the head more than
156 * once.
157 */
158 n = min_t(int, sz, circ_count_to_end(&rd->fifo));
159 if (copy_to_user(buf, fptr, n)) {
160 ret = -EFAULT;
161 goto out;
162 }
163
164 smp_store_release(&fifo->tail, (fifo->tail + n) & (BUF_SZ - 1));
165 *ppos += n;
166
167 wake_up_all(&rd->fifo_event);
168
169 out:
170 mutex_unlock(&rd->read_lock);
171 if (ret)
172 return ret;
173 return n;
174 }
175
rd_open(struct inode * inode,struct file * file)176 static int rd_open(struct inode *inode, struct file *file)
177 {
178 struct msm_rd_state *rd = inode->i_private;
179 struct drm_device *dev = rd->dev;
180 struct msm_drm_private *priv = dev->dev_private;
181 struct msm_gpu *gpu = priv->gpu;
182 uint64_t val;
183 uint32_t gpu_id;
184 int ret = 0;
185
186 mutex_lock(&dev->struct_mutex);
187
188 if (rd->open || !gpu) {
189 ret = -EBUSY;
190 goto out;
191 }
192
193 file->private_data = rd;
194 rd->open = true;
195
196 /* the parsing tools need to know gpu-id to know which
197 * register database to load.
198 */
199 gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val);
200 gpu_id = val;
201
202 rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id));
203
204 out:
205 mutex_unlock(&dev->struct_mutex);
206 return ret;
207 }
208
rd_release(struct inode * inode,struct file * file)209 static int rd_release(struct inode *inode, struct file *file)
210 {
211 struct msm_rd_state *rd = inode->i_private;
212
213 rd->open = false;
214 wake_up_all(&rd->fifo_event);
215
216 return 0;
217 }
218
219
220 static const struct file_operations rd_debugfs_fops = {
221 .owner = THIS_MODULE,
222 .open = rd_open,
223 .read = rd_read,
224 .llseek = no_llseek,
225 .release = rd_release,
226 };
227
msm_rd_debugfs_init(struct drm_minor * minor)228 int msm_rd_debugfs_init(struct drm_minor *minor)
229 {
230 struct msm_drm_private *priv = minor->dev->dev_private;
231 struct msm_rd_state *rd;
232 struct dentry *ent;
233
234 /* only create on first minor: */
235 if (priv->rd)
236 return 0;
237
238 rd = kzalloc(sizeof(*rd), GFP_KERNEL);
239 if (!rd)
240 return -ENOMEM;
241
242 rd->dev = minor->dev;
243 rd->fifo.buf = rd->buf;
244
245 mutex_init(&rd->read_lock);
246 priv->rd = rd;
247
248 init_waitqueue_head(&rd->fifo_event);
249
250 ent = debugfs_create_file("rd", S_IFREG | S_IRUGO,
251 minor->debugfs_root, rd, &rd_debugfs_fops);
252 if (!ent) {
253 DRM_ERROR("Cannot create /sys/kernel/debug/dri/%pd/rd\n",
254 minor->debugfs_root);
255 goto fail;
256 }
257
258 return 0;
259
260 fail:
261 msm_rd_debugfs_cleanup(priv);
262 return -1;
263 }
264
msm_rd_debugfs_cleanup(struct msm_drm_private * priv)265 void msm_rd_debugfs_cleanup(struct msm_drm_private *priv)
266 {
267 struct msm_rd_state *rd = priv->rd;
268
269 if (!rd)
270 return;
271
272 priv->rd = NULL;
273 mutex_destroy(&rd->read_lock);
274 kfree(rd);
275 }
276
snapshot_buf(struct msm_rd_state * rd,struct msm_gem_submit * submit,int idx,uint64_t iova,uint32_t size)277 static void snapshot_buf(struct msm_rd_state *rd,
278 struct msm_gem_submit *submit, int idx,
279 uint64_t iova, uint32_t size)
280 {
281 struct msm_gem_object *obj = submit->bos[idx].obj;
282 const char *buf;
283
284 buf = msm_gem_get_vaddr(&obj->base);
285 if (IS_ERR(buf))
286 return;
287
288 if (iova) {
289 buf += iova - submit->bos[idx].iova;
290 } else {
291 iova = submit->bos[idx].iova;
292 size = obj->base.size;
293 }
294
295 rd_write_section(rd, RD_GPUADDR,
296 (uint32_t[3]){ iova, size, iova >> 32 }, 12);
297 rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);
298
299 msm_gem_put_vaddr(&obj->base);
300 }
301
302 /* called under struct_mutex */
msm_rd_dump_submit(struct msm_gem_submit * submit)303 void msm_rd_dump_submit(struct msm_gem_submit *submit)
304 {
305 struct drm_device *dev = submit->dev;
306 struct msm_drm_private *priv = dev->dev_private;
307 struct msm_rd_state *rd = priv->rd;
308 char msg[128];
309 int i, n;
310
311 if (!rd->open)
312 return;
313
314 /* writing into fifo is serialized by caller, and
315 * rd->read_lock is used to serialize the reads
316 */
317 WARN_ON(!mutex_is_locked(&dev->struct_mutex));
318
319 n = snprintf(msg, sizeof(msg), "%.*s/%d: fence=%u",
320 TASK_COMM_LEN, current->comm, task_pid_nr(current),
321 submit->fence->seqno);
322
323 rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
324
325 if (rd_full) {
326 for (i = 0; i < submit->nr_bos; i++) {
327 /* buffers that are written to probably don't start out
328 * with anything interesting:
329 */
330 if (submit->bos[i].flags & MSM_SUBMIT_BO_WRITE)
331 continue;
332
333 snapshot_buf(rd, submit, i, 0, 0);
334 }
335 }
336
337 for (i = 0; i < submit->nr_cmds; i++) {
338 uint64_t iova = submit->cmd[i].iova;
339 uint32_t szd = submit->cmd[i].size; /* in dwords */
340
341 /* snapshot cmdstream bo's (if we haven't already): */
342 if (!rd_full) {
343 snapshot_buf(rd, submit, submit->cmd[i].idx,
344 submit->cmd[i].iova, szd * 4);
345 }
346
347 switch (submit->cmd[i].type) {
348 case MSM_SUBMIT_CMD_IB_TARGET_BUF:
349 /* ignore IB-targets, we've logged the buffer, the
350 * parser tool will follow the IB based on the logged
351 * buffer/gpuaddr, so nothing more to do.
352 */
353 break;
354 case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
355 case MSM_SUBMIT_CMD_BUF:
356 rd_write_section(rd, RD_CMDSTREAM_ADDR,
357 (uint32_t[3]){ iova, szd, iova >> 32 }, 12);
358 break;
359 }
360 }
361 }
362 #endif
363