1 /*
2 * Synopsys DesignWare I2C adapter driver.
3 *
4 * Based on the TI DAVINCI I2C adapter driver.
5 *
6 * Copyright (C) 2006 Texas Instruments.
7 * Copyright (C) 2007 MontaVista Software Inc.
8 * Copyright (C) 2009 Provigent Ltd.
9 *
10 * ----------------------------------------------------------------------------
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 * ----------------------------------------------------------------------------
22 *
23 */
24 #include <linux/acpi.h>
25 #include <linux/clk-provider.h>
26 #include <linux/clk.h>
27 #include <linux/delay.h>
28 #include <linux/dmi.h>
29 #include <linux/err.h>
30 #include <linux/errno.h>
31 #include <linux/i2c.h>
32 #include <linux/interrupt.h>
33 #include <linux/io.h>
34 #include <linux/kernel.h>
35 #include <linux/module.h>
36 #include <linux/of.h>
37 #include <linux/platform_data/i2c-designware.h>
38 #include <linux/platform_device.h>
39 #include <linux/pm.h>
40 #include <linux/pm_runtime.h>
41 #include <linux/property.h>
42 #include <linux/reset.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45
46 #include "i2c-designware-core.h"
47
i2c_dw_get_clk_rate_khz(struct dw_i2c_dev * dev)48 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
49 {
50 return clk_get_rate(dev->clk)/1000;
51 }
52
53 #ifdef CONFIG_ACPI
54 /*
55 * The HCNT/LCNT information coming from ACPI should be the most accurate
56 * for given platform. However, some systems get it wrong. On such systems
57 * we get better results by calculating those based on the input clock.
58 */
59 static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
60 {
61 .ident = "Dell Inspiron 7348",
62 .matches = {
63 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
64 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
65 },
66 },
67 { }
68 };
69
dw_i2c_acpi_params(struct platform_device * pdev,char method[],u16 * hcnt,u16 * lcnt,u32 * sda_hold)70 static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
71 u16 *hcnt, u16 *lcnt, u32 *sda_hold)
72 {
73 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
74 acpi_handle handle = ACPI_HANDLE(&pdev->dev);
75 union acpi_object *obj;
76
77 if (dmi_check_system(dw_i2c_no_acpi_params))
78 return;
79
80 if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
81 return;
82
83 obj = (union acpi_object *)buf.pointer;
84 if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
85 const union acpi_object *objs = obj->package.elements;
86
87 *hcnt = (u16)objs[0].integer.value;
88 *lcnt = (u16)objs[1].integer.value;
89 *sda_hold = (u32)objs[2].integer.value;
90 }
91
92 kfree(buf.pointer);
93 }
94
dw_i2c_acpi_configure(struct platform_device * pdev)95 static int dw_i2c_acpi_configure(struct platform_device *pdev)
96 {
97 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
98 u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
99 acpi_handle handle = ACPI_HANDLE(&pdev->dev);
100 const struct acpi_device_id *id;
101 struct acpi_device *adev;
102 const char *uid;
103
104 dev->adapter.nr = -1;
105 dev->tx_fifo_depth = 32;
106 dev->rx_fifo_depth = 32;
107
108 /*
109 * Try to get SDA hold time and *CNT values from an ACPI method for
110 * selected speed modes.
111 */
112 dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
113 dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
114 dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
115 dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
116
117 switch (dev->clk_freq) {
118 case 100000:
119 dev->sda_hold_time = ss_ht;
120 break;
121 case 1000000:
122 dev->sda_hold_time = fp_ht;
123 break;
124 case 3400000:
125 dev->sda_hold_time = hs_ht;
126 break;
127 case 400000:
128 default:
129 dev->sda_hold_time = fs_ht;
130 break;
131 }
132
133 id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
134 if (id && id->driver_data)
135 dev->flags |= (u32)id->driver_data;
136
137 if (acpi_bus_get_device(handle, &adev))
138 return -ENODEV;
139
140 /*
141 * Cherrytrail I2C7 gets used for the PMIC which gets accessed
142 * through ACPI opregions during late suspend / early resume
143 * disable pm for it.
144 */
145 uid = adev->pnp.unique_id;
146 if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
147 dev->pm_disabled = true;
148
149 return 0;
150 }
151
152 static const struct acpi_device_id dw_i2c_acpi_match[] = {
153 { "INT33C2", 0 },
154 { "INT33C3", 0 },
155 { "INT3432", 0 },
156 { "INT3433", 0 },
157 { "80860F41", 0 },
158 { "808622C1", MODEL_CHERRYTRAIL },
159 { "AMD0010", ACCESS_INTR_MASK },
160 { "AMDI0010", ACCESS_INTR_MASK },
161 { "AMDI0510", 0 },
162 { "APMC0D0F", 0 },
163 { "HISI02A1", 0 },
164 { "HISI02A2", 0 },
165 { }
166 };
167 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
168 #else
dw_i2c_acpi_configure(struct platform_device * pdev)169 static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
170 {
171 return -ENODEV;
172 }
173 #endif
174
i2c_dw_configure_master(struct dw_i2c_dev * dev)175 static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
176 {
177 dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
178
179 dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
180 DW_IC_CON_RESTART_EN;
181
182 dev->mode = DW_IC_MASTER;
183
184 switch (dev->clk_freq) {
185 case 100000:
186 dev->master_cfg |= DW_IC_CON_SPEED_STD;
187 break;
188 case 3400000:
189 dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
190 break;
191 default:
192 dev->master_cfg |= DW_IC_CON_SPEED_FAST;
193 }
194 }
195
i2c_dw_configure_slave(struct dw_i2c_dev * dev)196 static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
197 {
198 dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
199
200 dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
201 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
202
203 dev->mode = DW_IC_SLAVE;
204
205 switch (dev->clk_freq) {
206 case 100000:
207 dev->slave_cfg |= DW_IC_CON_SPEED_STD;
208 break;
209 case 3400000:
210 dev->slave_cfg |= DW_IC_CON_SPEED_HIGH;
211 break;
212 default:
213 dev->slave_cfg |= DW_IC_CON_SPEED_FAST;
214 }
215 }
216
i2c_dw_plat_prepare_clk(struct dw_i2c_dev * i_dev,bool prepare)217 static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
218 {
219 if (IS_ERR(i_dev->clk))
220 return PTR_ERR(i_dev->clk);
221
222 if (prepare)
223 return clk_prepare_enable(i_dev->clk);
224
225 clk_disable_unprepare(i_dev->clk);
226 return 0;
227 }
228
dw_i2c_set_fifo_size(struct dw_i2c_dev * dev,int id)229 static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
230 {
231 u32 param, tx_fifo_depth, rx_fifo_depth;
232
233 /*
234 * Try to detect the FIFO depth if not set by interface driver,
235 * the depth could be from 2 to 256 from HW spec.
236 */
237 param = i2c_dw_read_comp_param(dev);
238 tx_fifo_depth = ((param >> 16) & 0xff) + 1;
239 rx_fifo_depth = ((param >> 8) & 0xff) + 1;
240 if (!dev->tx_fifo_depth) {
241 dev->tx_fifo_depth = tx_fifo_depth;
242 dev->rx_fifo_depth = rx_fifo_depth;
243 dev->adapter.nr = id;
244 } else if (tx_fifo_depth >= 2) {
245 dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
246 tx_fifo_depth);
247 dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
248 rx_fifo_depth);
249 }
250 }
251
dw_i2c_plat_probe(struct platform_device * pdev)252 static int dw_i2c_plat_probe(struct platform_device *pdev)
253 {
254 struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
255 struct i2c_adapter *adap;
256 struct dw_i2c_dev *dev;
257 u32 acpi_speed, ht = 0;
258 struct resource *mem;
259 int i, irq, ret;
260 const int supported_speeds[] = { 0, 100000, 400000, 1000000, 3400000 };
261
262 irq = platform_get_irq(pdev, 0);
263 if (irq < 0)
264 return irq;
265
266 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
267 if (!dev)
268 return -ENOMEM;
269
270 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
271 dev->base = devm_ioremap_resource(&pdev->dev, mem);
272 if (IS_ERR(dev->base))
273 return PTR_ERR(dev->base);
274
275 dev->dev = &pdev->dev;
276 dev->irq = irq;
277 platform_set_drvdata(pdev, dev);
278
279 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
280 if (IS_ERR(dev->rst)) {
281 if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
282 return -EPROBE_DEFER;
283 } else {
284 reset_control_deassert(dev->rst);
285 }
286
287 if (pdata) {
288 dev->clk_freq = pdata->i2c_scl_freq;
289 } else {
290 device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
291 &ht);
292 device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
293 &dev->sda_falling_time);
294 device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
295 &dev->scl_falling_time);
296 device_property_read_u32(&pdev->dev, "clock-frequency",
297 &dev->clk_freq);
298 }
299
300 acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
301 /*
302 * Some DSTDs use a non standard speed, round down to the lowest
303 * standard speed.
304 */
305 for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
306 if (acpi_speed < supported_speeds[i])
307 break;
308 }
309 acpi_speed = supported_speeds[i - 1];
310
311 /*
312 * Find bus speed from the "clock-frequency" device property, ACPI
313 * or by using fast mode if neither is set.
314 */
315 if (acpi_speed && dev->clk_freq)
316 dev->clk_freq = min(dev->clk_freq, acpi_speed);
317 else if (acpi_speed || dev->clk_freq)
318 dev->clk_freq = max(dev->clk_freq, acpi_speed);
319 else
320 dev->clk_freq = 400000;
321
322 if (has_acpi_companion(&pdev->dev))
323 dw_i2c_acpi_configure(pdev);
324
325 /*
326 * Only standard mode at 100kHz, fast mode at 400kHz,
327 * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
328 */
329 if (dev->clk_freq != 100000 && dev->clk_freq != 400000
330 && dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
331 dev_err(&pdev->dev,
332 "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
333 dev->clk_freq);
334 ret = -EINVAL;
335 goto exit_reset;
336 }
337
338 ret = i2c_dw_probe_lock_support(dev);
339 if (ret)
340 goto exit_reset;
341
342 if (i2c_detect_slave_mode(&pdev->dev))
343 i2c_dw_configure_slave(dev);
344 else
345 i2c_dw_configure_master(dev);
346
347 dev->clk = devm_clk_get(&pdev->dev, NULL);
348 if (!i2c_dw_plat_prepare_clk(dev, true)) {
349 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
350
351 if (!dev->sda_hold_time && ht)
352 dev->sda_hold_time = div_u64(
353 (u64)dev->get_clk_rate_khz(dev) * ht + 500000,
354 1000000);
355 }
356
357 dw_i2c_set_fifo_size(dev, pdev->id);
358
359 adap = &dev->adapter;
360 adap->owner = THIS_MODULE;
361 adap->class = I2C_CLASS_DEPRECATED;
362 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
363 adap->dev.of_node = pdev->dev.of_node;
364
365 if (dev->pm_disabled) {
366 pm_runtime_forbid(&pdev->dev);
367 } else {
368 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
369 pm_runtime_use_autosuspend(&pdev->dev);
370 pm_runtime_set_active(&pdev->dev);
371 pm_runtime_enable(&pdev->dev);
372 }
373
374 if (dev->mode == DW_IC_SLAVE)
375 ret = i2c_dw_probe_slave(dev);
376 else
377 ret = i2c_dw_probe(dev);
378
379 if (ret)
380 goto exit_probe;
381
382 return ret;
383
384 exit_probe:
385 if (!dev->pm_disabled)
386 pm_runtime_disable(&pdev->dev);
387 exit_reset:
388 if (!IS_ERR_OR_NULL(dev->rst))
389 reset_control_assert(dev->rst);
390 return ret;
391 }
392
dw_i2c_plat_remove(struct platform_device * pdev)393 static int dw_i2c_plat_remove(struct platform_device *pdev)
394 {
395 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
396
397 pm_runtime_get_sync(&pdev->dev);
398
399 i2c_del_adapter(&dev->adapter);
400
401 dev->disable(dev);
402
403 pm_runtime_dont_use_autosuspend(&pdev->dev);
404 pm_runtime_put_sync(&pdev->dev);
405 if (!dev->pm_disabled)
406 pm_runtime_disable(&pdev->dev);
407 if (!IS_ERR_OR_NULL(dev->rst))
408 reset_control_assert(dev->rst);
409
410 i2c_dw_remove_lock_support(dev);
411
412 return 0;
413 }
414
415 #ifdef CONFIG_OF
416 static const struct of_device_id dw_i2c_of_match[] = {
417 { .compatible = "snps,designware-i2c", },
418 {},
419 };
420 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
421 #endif
422
423 #ifdef CONFIG_PM_SLEEP
dw_i2c_plat_prepare(struct device * dev)424 static int dw_i2c_plat_prepare(struct device *dev)
425 {
426 return pm_runtime_suspended(dev);
427 }
428
dw_i2c_plat_complete(struct device * dev)429 static void dw_i2c_plat_complete(struct device *dev)
430 {
431 if (dev->power.direct_complete)
432 pm_request_resume(dev);
433 }
434 #else
435 #define dw_i2c_plat_prepare NULL
436 #define dw_i2c_plat_complete NULL
437 #endif
438
439 #ifdef CONFIG_PM
dw_i2c_plat_runtime_suspend(struct device * dev)440 static int dw_i2c_plat_runtime_suspend(struct device *dev)
441 {
442 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
443
444 i_dev->disable(i_dev);
445 i2c_dw_plat_prepare_clk(i_dev, false);
446
447 return 0;
448 }
449
dw_i2c_plat_resume(struct device * dev)450 static int dw_i2c_plat_resume(struct device *dev)
451 {
452 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
453
454 i2c_dw_plat_prepare_clk(i_dev, true);
455 i_dev->init(i_dev);
456
457 return 0;
458 }
459
460 #ifdef CONFIG_PM_SLEEP
dw_i2c_plat_suspend(struct device * dev)461 static int dw_i2c_plat_suspend(struct device *dev)
462 {
463 pm_runtime_resume(dev);
464 return dw_i2c_plat_runtime_suspend(dev);
465 }
466 #endif
467
468 static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
469 .prepare = dw_i2c_plat_prepare,
470 .complete = dw_i2c_plat_complete,
471 SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
472 SET_RUNTIME_PM_OPS(dw_i2c_plat_runtime_suspend,
473 dw_i2c_plat_resume,
474 NULL)
475 };
476
477 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
478 #else
479 #define DW_I2C_DEV_PMOPS NULL
480 #endif
481
482 /* Work with hotplug and coldplug */
483 MODULE_ALIAS("platform:i2c_designware");
484
485 static struct platform_driver dw_i2c_driver = {
486 .probe = dw_i2c_plat_probe,
487 .remove = dw_i2c_plat_remove,
488 .driver = {
489 .name = "i2c_designware",
490 .of_match_table = of_match_ptr(dw_i2c_of_match),
491 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
492 .pm = DW_I2C_DEV_PMOPS,
493 },
494 };
495
dw_i2c_init_driver(void)496 static int __init dw_i2c_init_driver(void)
497 {
498 return platform_driver_register(&dw_i2c_driver);
499 }
500 subsys_initcall(dw_i2c_init_driver);
501
dw_i2c_exit_driver(void)502 static void __exit dw_i2c_exit_driver(void)
503 {
504 platform_driver_unregister(&dw_i2c_driver);
505 }
506 module_exit(dw_i2c_exit_driver);
507
508 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
509 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
510 MODULE_LICENSE("GPL");
511