1 /*
2 * Driver for the OV5645 camera sensor.
3 *
4 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
5 * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
6 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
7 *
8 * Based on:
9 * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
10 * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
11 * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
12 * - the OV5640 driver posted on linux-media:
13 * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
14 */
15
16 /*
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 */
27
28 #include <linux/bitops.h>
29 #include <linux/clk.h>
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/gpio/consumer.h>
33 #include <linux/i2c.h>
34 #include <linux/init.h>
35 #include <linux/module.h>
36 #include <linux/of.h>
37 #include <linux/of_graph.h>
38 #include <linux/regulator/consumer.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
41 #include <media/v4l2-ctrls.h>
42 #include <media/v4l2-fwnode.h>
43 #include <media/v4l2-subdev.h>
44
45 #define OV5645_VOLTAGE_ANALOG 2800000
46 #define OV5645_VOLTAGE_DIGITAL_CORE 1500000
47 #define OV5645_VOLTAGE_DIGITAL_IO 1800000
48
49 #define OV5645_SYSTEM_CTRL0 0x3008
50 #define OV5645_SYSTEM_CTRL0_START 0x02
51 #define OV5645_SYSTEM_CTRL0_STOP 0x42
52 #define OV5645_CHIP_ID_HIGH 0x300a
53 #define OV5645_CHIP_ID_HIGH_BYTE 0x56
54 #define OV5645_CHIP_ID_LOW 0x300b
55 #define OV5645_CHIP_ID_LOW_BYTE 0x45
56 #define OV5645_IO_MIPI_CTRL00 0x300e
57 #define OV5645_PAD_OUTPUT00 0x3019
58 #define OV5645_AWB_MANUAL_CONTROL 0x3406
59 #define OV5645_AWB_MANUAL_ENABLE BIT(0)
60 #define OV5645_AEC_PK_MANUAL 0x3503
61 #define OV5645_AEC_MANUAL_ENABLE BIT(0)
62 #define OV5645_AGC_MANUAL_ENABLE BIT(1)
63 #define OV5645_TIMING_TC_REG20 0x3820
64 #define OV5645_SENSOR_VFLIP BIT(1)
65 #define OV5645_ISP_VFLIP BIT(2)
66 #define OV5645_TIMING_TC_REG21 0x3821
67 #define OV5645_SENSOR_MIRROR BIT(1)
68 #define OV5645_MIPI_CTRL00 0x4800
69 #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
70 #define OV5645_TEST_PATTERN_MASK 0x3
71 #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
72 #define OV5645_TEST_PATTERN_ENABLE BIT(7)
73 #define OV5645_SDE_SAT_U 0x5583
74 #define OV5645_SDE_SAT_V 0x5584
75
76 struct reg_value {
77 u16 reg;
78 u8 val;
79 };
80
81 struct ov5645_mode_info {
82 u32 width;
83 u32 height;
84 const struct reg_value *data;
85 u32 data_size;
86 u32 pixel_clock;
87 u32 link_freq;
88 };
89
90 struct ov5645 {
91 struct i2c_client *i2c_client;
92 struct device *dev;
93 struct v4l2_subdev sd;
94 struct media_pad pad;
95 struct v4l2_fwnode_endpoint ep;
96 struct v4l2_mbus_framefmt fmt;
97 struct v4l2_rect crop;
98 struct clk *xclk;
99
100 struct regulator *io_regulator;
101 struct regulator *core_regulator;
102 struct regulator *analog_regulator;
103
104 const struct ov5645_mode_info *current_mode;
105
106 struct v4l2_ctrl_handler ctrls;
107 struct v4l2_ctrl *pixel_clock;
108 struct v4l2_ctrl *link_freq;
109
110 /* Cached register values */
111 u8 aec_pk_manual;
112 u8 timing_tc_reg20;
113 u8 timing_tc_reg21;
114
115 struct mutex power_lock; /* lock to protect power state */
116 int power_count;
117
118 struct gpio_desc *enable_gpio;
119 struct gpio_desc *rst_gpio;
120 };
121
to_ov5645(struct v4l2_subdev * sd)122 static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
123 {
124 return container_of(sd, struct ov5645, sd);
125 }
126
127 static const struct reg_value ov5645_global_init_setting[] = {
128 { 0x3103, 0x11 },
129 { 0x3008, 0x82 },
130 { 0x3008, 0x42 },
131 { 0x3103, 0x03 },
132 { 0x3503, 0x07 },
133 { 0x3002, 0x1c },
134 { 0x3006, 0xc3 },
135 { 0x3017, 0x00 },
136 { 0x3018, 0x00 },
137 { 0x302e, 0x0b },
138 { 0x3037, 0x13 },
139 { 0x3108, 0x01 },
140 { 0x3611, 0x06 },
141 { 0x3500, 0x00 },
142 { 0x3501, 0x01 },
143 { 0x3502, 0x00 },
144 { 0x350a, 0x00 },
145 { 0x350b, 0x3f },
146 { 0x3620, 0x33 },
147 { 0x3621, 0xe0 },
148 { 0x3622, 0x01 },
149 { 0x3630, 0x2e },
150 { 0x3631, 0x00 },
151 { 0x3632, 0x32 },
152 { 0x3633, 0x52 },
153 { 0x3634, 0x70 },
154 { 0x3635, 0x13 },
155 { 0x3636, 0x03 },
156 { 0x3703, 0x5a },
157 { 0x3704, 0xa0 },
158 { 0x3705, 0x1a },
159 { 0x3709, 0x12 },
160 { 0x370b, 0x61 },
161 { 0x370f, 0x10 },
162 { 0x3715, 0x78 },
163 { 0x3717, 0x01 },
164 { 0x371b, 0x20 },
165 { 0x3731, 0x12 },
166 { 0x3901, 0x0a },
167 { 0x3905, 0x02 },
168 { 0x3906, 0x10 },
169 { 0x3719, 0x86 },
170 { 0x3810, 0x00 },
171 { 0x3811, 0x10 },
172 { 0x3812, 0x00 },
173 { 0x3821, 0x01 },
174 { 0x3824, 0x01 },
175 { 0x3826, 0x03 },
176 { 0x3828, 0x08 },
177 { 0x3a19, 0xf8 },
178 { 0x3c01, 0x34 },
179 { 0x3c04, 0x28 },
180 { 0x3c05, 0x98 },
181 { 0x3c07, 0x07 },
182 { 0x3c09, 0xc2 },
183 { 0x3c0a, 0x9c },
184 { 0x3c0b, 0x40 },
185 { 0x3c01, 0x34 },
186 { 0x4001, 0x02 },
187 { 0x4514, 0x00 },
188 { 0x4520, 0xb0 },
189 { 0x460b, 0x37 },
190 { 0x460c, 0x20 },
191 { 0x4818, 0x01 },
192 { 0x481d, 0xf0 },
193 { 0x481f, 0x50 },
194 { 0x4823, 0x70 },
195 { 0x4831, 0x14 },
196 { 0x5000, 0xa7 },
197 { 0x5001, 0x83 },
198 { 0x501d, 0x00 },
199 { 0x501f, 0x00 },
200 { 0x503d, 0x00 },
201 { 0x505c, 0x30 },
202 { 0x5181, 0x59 },
203 { 0x5183, 0x00 },
204 { 0x5191, 0xf0 },
205 { 0x5192, 0x03 },
206 { 0x5684, 0x10 },
207 { 0x5685, 0xa0 },
208 { 0x5686, 0x0c },
209 { 0x5687, 0x78 },
210 { 0x5a00, 0x08 },
211 { 0x5a21, 0x00 },
212 { 0x5a24, 0x00 },
213 { 0x3008, 0x02 },
214 { 0x3503, 0x00 },
215 { 0x5180, 0xff },
216 { 0x5181, 0xf2 },
217 { 0x5182, 0x00 },
218 { 0x5183, 0x14 },
219 { 0x5184, 0x25 },
220 { 0x5185, 0x24 },
221 { 0x5186, 0x09 },
222 { 0x5187, 0x09 },
223 { 0x5188, 0x0a },
224 { 0x5189, 0x75 },
225 { 0x518a, 0x52 },
226 { 0x518b, 0xea },
227 { 0x518c, 0xa8 },
228 { 0x518d, 0x42 },
229 { 0x518e, 0x38 },
230 { 0x518f, 0x56 },
231 { 0x5190, 0x42 },
232 { 0x5191, 0xf8 },
233 { 0x5192, 0x04 },
234 { 0x5193, 0x70 },
235 { 0x5194, 0xf0 },
236 { 0x5195, 0xf0 },
237 { 0x5196, 0x03 },
238 { 0x5197, 0x01 },
239 { 0x5198, 0x04 },
240 { 0x5199, 0x12 },
241 { 0x519a, 0x04 },
242 { 0x519b, 0x00 },
243 { 0x519c, 0x06 },
244 { 0x519d, 0x82 },
245 { 0x519e, 0x38 },
246 { 0x5381, 0x1e },
247 { 0x5382, 0x5b },
248 { 0x5383, 0x08 },
249 { 0x5384, 0x0a },
250 { 0x5385, 0x7e },
251 { 0x5386, 0x88 },
252 { 0x5387, 0x7c },
253 { 0x5388, 0x6c },
254 { 0x5389, 0x10 },
255 { 0x538a, 0x01 },
256 { 0x538b, 0x98 },
257 { 0x5300, 0x08 },
258 { 0x5301, 0x30 },
259 { 0x5302, 0x10 },
260 { 0x5303, 0x00 },
261 { 0x5304, 0x08 },
262 { 0x5305, 0x30 },
263 { 0x5306, 0x08 },
264 { 0x5307, 0x16 },
265 { 0x5309, 0x08 },
266 { 0x530a, 0x30 },
267 { 0x530b, 0x04 },
268 { 0x530c, 0x06 },
269 { 0x5480, 0x01 },
270 { 0x5481, 0x08 },
271 { 0x5482, 0x14 },
272 { 0x5483, 0x28 },
273 { 0x5484, 0x51 },
274 { 0x5485, 0x65 },
275 { 0x5486, 0x71 },
276 { 0x5487, 0x7d },
277 { 0x5488, 0x87 },
278 { 0x5489, 0x91 },
279 { 0x548a, 0x9a },
280 { 0x548b, 0xaa },
281 { 0x548c, 0xb8 },
282 { 0x548d, 0xcd },
283 { 0x548e, 0xdd },
284 { 0x548f, 0xea },
285 { 0x5490, 0x1d },
286 { 0x5580, 0x02 },
287 { 0x5583, 0x40 },
288 { 0x5584, 0x10 },
289 { 0x5589, 0x10 },
290 { 0x558a, 0x00 },
291 { 0x558b, 0xf8 },
292 { 0x5800, 0x3f },
293 { 0x5801, 0x16 },
294 { 0x5802, 0x0e },
295 { 0x5803, 0x0d },
296 { 0x5804, 0x17 },
297 { 0x5805, 0x3f },
298 { 0x5806, 0x0b },
299 { 0x5807, 0x06 },
300 { 0x5808, 0x04 },
301 { 0x5809, 0x04 },
302 { 0x580a, 0x06 },
303 { 0x580b, 0x0b },
304 { 0x580c, 0x09 },
305 { 0x580d, 0x03 },
306 { 0x580e, 0x00 },
307 { 0x580f, 0x00 },
308 { 0x5810, 0x03 },
309 { 0x5811, 0x08 },
310 { 0x5812, 0x0a },
311 { 0x5813, 0x03 },
312 { 0x5814, 0x00 },
313 { 0x5815, 0x00 },
314 { 0x5816, 0x04 },
315 { 0x5817, 0x09 },
316 { 0x5818, 0x0f },
317 { 0x5819, 0x08 },
318 { 0x581a, 0x06 },
319 { 0x581b, 0x06 },
320 { 0x581c, 0x08 },
321 { 0x581d, 0x0c },
322 { 0x581e, 0x3f },
323 { 0x581f, 0x1e },
324 { 0x5820, 0x12 },
325 { 0x5821, 0x13 },
326 { 0x5822, 0x21 },
327 { 0x5823, 0x3f },
328 { 0x5824, 0x68 },
329 { 0x5825, 0x28 },
330 { 0x5826, 0x2c },
331 { 0x5827, 0x28 },
332 { 0x5828, 0x08 },
333 { 0x5829, 0x48 },
334 { 0x582a, 0x64 },
335 { 0x582b, 0x62 },
336 { 0x582c, 0x64 },
337 { 0x582d, 0x28 },
338 { 0x582e, 0x46 },
339 { 0x582f, 0x62 },
340 { 0x5830, 0x60 },
341 { 0x5831, 0x62 },
342 { 0x5832, 0x26 },
343 { 0x5833, 0x48 },
344 { 0x5834, 0x66 },
345 { 0x5835, 0x44 },
346 { 0x5836, 0x64 },
347 { 0x5837, 0x28 },
348 { 0x5838, 0x66 },
349 { 0x5839, 0x48 },
350 { 0x583a, 0x2c },
351 { 0x583b, 0x28 },
352 { 0x583c, 0x26 },
353 { 0x583d, 0xae },
354 { 0x5025, 0x00 },
355 { 0x3a0f, 0x30 },
356 { 0x3a10, 0x28 },
357 { 0x3a1b, 0x30 },
358 { 0x3a1e, 0x26 },
359 { 0x3a11, 0x60 },
360 { 0x3a1f, 0x14 },
361 { 0x0601, 0x02 },
362 { 0x3008, 0x42 },
363 { 0x3008, 0x02 },
364 { OV5645_IO_MIPI_CTRL00, 0x40 },
365 { OV5645_MIPI_CTRL00, 0x24 },
366 { OV5645_PAD_OUTPUT00, 0x70 }
367 };
368
369 static const struct reg_value ov5645_setting_sxga[] = {
370 { 0x3612, 0xa9 },
371 { 0x3614, 0x50 },
372 { 0x3618, 0x00 },
373 { 0x3034, 0x18 },
374 { 0x3035, 0x21 },
375 { 0x3036, 0x70 },
376 { 0x3600, 0x09 },
377 { 0x3601, 0x43 },
378 { 0x3708, 0x66 },
379 { 0x370c, 0xc3 },
380 { 0x3800, 0x00 },
381 { 0x3801, 0x00 },
382 { 0x3802, 0x00 },
383 { 0x3803, 0x06 },
384 { 0x3804, 0x0a },
385 { 0x3805, 0x3f },
386 { 0x3806, 0x07 },
387 { 0x3807, 0x9d },
388 { 0x3808, 0x05 },
389 { 0x3809, 0x00 },
390 { 0x380a, 0x03 },
391 { 0x380b, 0xc0 },
392 { 0x380c, 0x07 },
393 { 0x380d, 0x68 },
394 { 0x380e, 0x03 },
395 { 0x380f, 0xd8 },
396 { 0x3813, 0x06 },
397 { 0x3814, 0x31 },
398 { 0x3815, 0x31 },
399 { 0x3820, 0x47 },
400 { 0x3a02, 0x03 },
401 { 0x3a03, 0xd8 },
402 { 0x3a08, 0x01 },
403 { 0x3a09, 0xf8 },
404 { 0x3a0a, 0x01 },
405 { 0x3a0b, 0xa4 },
406 { 0x3a0e, 0x02 },
407 { 0x3a0d, 0x02 },
408 { 0x3a14, 0x03 },
409 { 0x3a15, 0xd8 },
410 { 0x3a18, 0x00 },
411 { 0x4004, 0x02 },
412 { 0x4005, 0x18 },
413 { 0x4300, 0x32 },
414 { 0x4202, 0x00 }
415 };
416
417 static const struct reg_value ov5645_setting_1080p[] = {
418 { 0x3612, 0xab },
419 { 0x3614, 0x50 },
420 { 0x3618, 0x04 },
421 { 0x3034, 0x18 },
422 { 0x3035, 0x11 },
423 { 0x3036, 0x54 },
424 { 0x3600, 0x08 },
425 { 0x3601, 0x33 },
426 { 0x3708, 0x63 },
427 { 0x370c, 0xc0 },
428 { 0x3800, 0x01 },
429 { 0x3801, 0x50 },
430 { 0x3802, 0x01 },
431 { 0x3803, 0xb2 },
432 { 0x3804, 0x08 },
433 { 0x3805, 0xef },
434 { 0x3806, 0x05 },
435 { 0x3807, 0xf1 },
436 { 0x3808, 0x07 },
437 { 0x3809, 0x80 },
438 { 0x380a, 0x04 },
439 { 0x380b, 0x38 },
440 { 0x380c, 0x09 },
441 { 0x380d, 0xc4 },
442 { 0x380e, 0x04 },
443 { 0x380f, 0x60 },
444 { 0x3813, 0x04 },
445 { 0x3814, 0x11 },
446 { 0x3815, 0x11 },
447 { 0x3820, 0x47 },
448 { 0x4514, 0x88 },
449 { 0x3a02, 0x04 },
450 { 0x3a03, 0x60 },
451 { 0x3a08, 0x01 },
452 { 0x3a09, 0x50 },
453 { 0x3a0a, 0x01 },
454 { 0x3a0b, 0x18 },
455 { 0x3a0e, 0x03 },
456 { 0x3a0d, 0x04 },
457 { 0x3a14, 0x04 },
458 { 0x3a15, 0x60 },
459 { 0x3a18, 0x00 },
460 { 0x4004, 0x06 },
461 { 0x4005, 0x18 },
462 { 0x4300, 0x32 },
463 { 0x4202, 0x00 },
464 { 0x4837, 0x0b }
465 };
466
467 static const struct reg_value ov5645_setting_full[] = {
468 { 0x3612, 0xab },
469 { 0x3614, 0x50 },
470 { 0x3618, 0x04 },
471 { 0x3034, 0x18 },
472 { 0x3035, 0x11 },
473 { 0x3036, 0x54 },
474 { 0x3600, 0x08 },
475 { 0x3601, 0x33 },
476 { 0x3708, 0x63 },
477 { 0x370c, 0xc0 },
478 { 0x3800, 0x00 },
479 { 0x3801, 0x00 },
480 { 0x3802, 0x00 },
481 { 0x3803, 0x00 },
482 { 0x3804, 0x0a },
483 { 0x3805, 0x3f },
484 { 0x3806, 0x07 },
485 { 0x3807, 0x9f },
486 { 0x3808, 0x0a },
487 { 0x3809, 0x20 },
488 { 0x380a, 0x07 },
489 { 0x380b, 0x98 },
490 { 0x380c, 0x0b },
491 { 0x380d, 0x1c },
492 { 0x380e, 0x07 },
493 { 0x380f, 0xb0 },
494 { 0x3813, 0x06 },
495 { 0x3814, 0x11 },
496 { 0x3815, 0x11 },
497 { 0x3820, 0x47 },
498 { 0x4514, 0x88 },
499 { 0x3a02, 0x07 },
500 { 0x3a03, 0xb0 },
501 { 0x3a08, 0x01 },
502 { 0x3a09, 0x27 },
503 { 0x3a0a, 0x00 },
504 { 0x3a0b, 0xf6 },
505 { 0x3a0e, 0x06 },
506 { 0x3a0d, 0x08 },
507 { 0x3a14, 0x07 },
508 { 0x3a15, 0xb0 },
509 { 0x3a18, 0x01 },
510 { 0x4004, 0x06 },
511 { 0x4005, 0x18 },
512 { 0x4300, 0x32 },
513 { 0x4837, 0x0b },
514 { 0x4202, 0x00 }
515 };
516
517 static const s64 link_freq[] = {
518 224000000,
519 336000000
520 };
521
522 static const struct ov5645_mode_info ov5645_mode_info_data[] = {
523 {
524 .width = 1280,
525 .height = 960,
526 .data = ov5645_setting_sxga,
527 .data_size = ARRAY_SIZE(ov5645_setting_sxga),
528 .pixel_clock = 112000000,
529 .link_freq = 0 /* an index in link_freq[] */
530 },
531 {
532 .width = 1920,
533 .height = 1080,
534 .data = ov5645_setting_1080p,
535 .data_size = ARRAY_SIZE(ov5645_setting_1080p),
536 .pixel_clock = 168000000,
537 .link_freq = 1 /* an index in link_freq[] */
538 },
539 {
540 .width = 2592,
541 .height = 1944,
542 .data = ov5645_setting_full,
543 .data_size = ARRAY_SIZE(ov5645_setting_full),
544 .pixel_clock = 168000000,
545 .link_freq = 1 /* an index in link_freq[] */
546 },
547 };
548
ov5645_regulators_enable(struct ov5645 * ov5645)549 static int ov5645_regulators_enable(struct ov5645 *ov5645)
550 {
551 int ret;
552
553 ret = regulator_enable(ov5645->io_regulator);
554 if (ret < 0) {
555 dev_err(ov5645->dev, "set io voltage failed\n");
556 return ret;
557 }
558
559 ret = regulator_enable(ov5645->analog_regulator);
560 if (ret) {
561 dev_err(ov5645->dev, "set analog voltage failed\n");
562 goto err_disable_io;
563 }
564
565 ret = regulator_enable(ov5645->core_regulator);
566 if (ret) {
567 dev_err(ov5645->dev, "set core voltage failed\n");
568 goto err_disable_analog;
569 }
570
571 return 0;
572
573 err_disable_analog:
574 regulator_disable(ov5645->analog_regulator);
575 err_disable_io:
576 regulator_disable(ov5645->io_regulator);
577
578 return ret;
579 }
580
ov5645_regulators_disable(struct ov5645 * ov5645)581 static void ov5645_regulators_disable(struct ov5645 *ov5645)
582 {
583 int ret;
584
585 ret = regulator_disable(ov5645->core_regulator);
586 if (ret < 0)
587 dev_err(ov5645->dev, "core regulator disable failed\n");
588
589 ret = regulator_disable(ov5645->analog_regulator);
590 if (ret < 0)
591 dev_err(ov5645->dev, "analog regulator disable failed\n");
592
593 ret = regulator_disable(ov5645->io_regulator);
594 if (ret < 0)
595 dev_err(ov5645->dev, "io regulator disable failed\n");
596 }
597
ov5645_write_reg(struct ov5645 * ov5645,u16 reg,u8 val)598 static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
599 {
600 u8 regbuf[3];
601 int ret;
602
603 regbuf[0] = reg >> 8;
604 regbuf[1] = reg & 0xff;
605 regbuf[2] = val;
606
607 ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
608 if (ret < 0)
609 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
610 __func__, ret, reg, val);
611
612 return ret;
613 }
614
ov5645_read_reg(struct ov5645 * ov5645,u16 reg,u8 * val)615 static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
616 {
617 u8 regbuf[2];
618 int ret;
619
620 regbuf[0] = reg >> 8;
621 regbuf[1] = reg & 0xff;
622
623 ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
624 if (ret < 0) {
625 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
626 __func__, ret, reg);
627 return ret;
628 }
629
630 ret = i2c_master_recv(ov5645->i2c_client, val, 1);
631 if (ret < 0) {
632 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
633 __func__, ret, reg);
634 return ret;
635 }
636
637 return 0;
638 }
639
ov5645_set_aec_mode(struct ov5645 * ov5645,u32 mode)640 static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
641 {
642 u8 val = ov5645->aec_pk_manual;
643 int ret;
644
645 if (mode == V4L2_EXPOSURE_AUTO)
646 val &= ~OV5645_AEC_MANUAL_ENABLE;
647 else /* V4L2_EXPOSURE_MANUAL */
648 val |= OV5645_AEC_MANUAL_ENABLE;
649
650 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
651 if (!ret)
652 ov5645->aec_pk_manual = val;
653
654 return ret;
655 }
656
ov5645_set_agc_mode(struct ov5645 * ov5645,u32 enable)657 static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
658 {
659 u8 val = ov5645->aec_pk_manual;
660 int ret;
661
662 if (enable)
663 val &= ~OV5645_AGC_MANUAL_ENABLE;
664 else
665 val |= OV5645_AGC_MANUAL_ENABLE;
666
667 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
668 if (!ret)
669 ov5645->aec_pk_manual = val;
670
671 return ret;
672 }
673
ov5645_set_register_array(struct ov5645 * ov5645,const struct reg_value * settings,unsigned int num_settings)674 static int ov5645_set_register_array(struct ov5645 *ov5645,
675 const struct reg_value *settings,
676 unsigned int num_settings)
677 {
678 unsigned int i;
679 int ret;
680
681 for (i = 0; i < num_settings; ++i, ++settings) {
682 ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
683 if (ret < 0)
684 return ret;
685 }
686
687 return 0;
688 }
689
ov5645_set_power_on(struct ov5645 * ov5645)690 static int ov5645_set_power_on(struct ov5645 *ov5645)
691 {
692 int ret;
693
694 ret = ov5645_regulators_enable(ov5645);
695 if (ret < 0) {
696 return ret;
697 }
698
699 ret = clk_prepare_enable(ov5645->xclk);
700 if (ret < 0) {
701 dev_err(ov5645->dev, "clk prepare enable failed\n");
702 ov5645_regulators_disable(ov5645);
703 return ret;
704 }
705
706 usleep_range(5000, 15000);
707 gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
708
709 usleep_range(1000, 2000);
710 gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
711
712 msleep(20);
713
714 return 0;
715 }
716
ov5645_set_power_off(struct ov5645 * ov5645)717 static void ov5645_set_power_off(struct ov5645 *ov5645)
718 {
719 gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
720 gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
721 clk_disable_unprepare(ov5645->xclk);
722 ov5645_regulators_disable(ov5645);
723 }
724
ov5645_s_power(struct v4l2_subdev * sd,int on)725 static int ov5645_s_power(struct v4l2_subdev *sd, int on)
726 {
727 struct ov5645 *ov5645 = to_ov5645(sd);
728 int ret = 0;
729
730 mutex_lock(&ov5645->power_lock);
731
732 /* If the power count is modified from 0 to != 0 or from != 0 to 0,
733 * update the power state.
734 */
735 if (ov5645->power_count == !on) {
736 if (on) {
737 ret = ov5645_set_power_on(ov5645);
738 if (ret < 0)
739 goto exit;
740
741 ret = ov5645_set_register_array(ov5645,
742 ov5645_global_init_setting,
743 ARRAY_SIZE(ov5645_global_init_setting));
744 if (ret < 0) {
745 dev_err(ov5645->dev,
746 "could not set init registers\n");
747 ov5645_set_power_off(ov5645);
748 goto exit;
749 }
750
751 usleep_range(500, 1000);
752 } else {
753 ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
754 ov5645_set_power_off(ov5645);
755 }
756 }
757
758 /* Update the power count. */
759 ov5645->power_count += on ? 1 : -1;
760 WARN_ON(ov5645->power_count < 0);
761
762 exit:
763 mutex_unlock(&ov5645->power_lock);
764
765 return ret;
766 }
767
ov5645_set_saturation(struct ov5645 * ov5645,s32 value)768 static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
769 {
770 u32 reg_value = (value * 0x10) + 0x40;
771 int ret;
772
773 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
774 if (ret < 0)
775 return ret;
776
777 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
778 }
779
ov5645_set_hflip(struct ov5645 * ov5645,s32 value)780 static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
781 {
782 u8 val = ov5645->timing_tc_reg21;
783 int ret;
784
785 if (value == 0)
786 val &= ~(OV5645_SENSOR_MIRROR);
787 else
788 val |= (OV5645_SENSOR_MIRROR);
789
790 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
791 if (!ret)
792 ov5645->timing_tc_reg21 = val;
793
794 return ret;
795 }
796
ov5645_set_vflip(struct ov5645 * ov5645,s32 value)797 static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
798 {
799 u8 val = ov5645->timing_tc_reg20;
800 int ret;
801
802 if (value == 0)
803 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
804 else
805 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
806
807 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
808 if (!ret)
809 ov5645->timing_tc_reg20 = val;
810
811 return ret;
812 }
813
ov5645_set_test_pattern(struct ov5645 * ov5645,s32 value)814 static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
815 {
816 u8 val = 0;
817
818 if (value) {
819 val = OV5645_SET_TEST_PATTERN(value - 1);
820 val |= OV5645_TEST_PATTERN_ENABLE;
821 }
822
823 return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
824 }
825
826 static const char * const ov5645_test_pattern_menu[] = {
827 "Disabled",
828 "Vertical Color Bars",
829 "Pseudo-Random Data",
830 "Color Square",
831 "Black Image",
832 };
833
ov5645_set_awb(struct ov5645 * ov5645,s32 enable_auto)834 static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
835 {
836 u8 val = 0;
837
838 if (!enable_auto)
839 val = OV5645_AWB_MANUAL_ENABLE;
840
841 return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
842 }
843
ov5645_s_ctrl(struct v4l2_ctrl * ctrl)844 static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
845 {
846 struct ov5645 *ov5645 = container_of(ctrl->handler,
847 struct ov5645, ctrls);
848 int ret;
849
850 mutex_lock(&ov5645->power_lock);
851 if (!ov5645->power_count) {
852 mutex_unlock(&ov5645->power_lock);
853 return 0;
854 }
855
856 switch (ctrl->id) {
857 case V4L2_CID_SATURATION:
858 ret = ov5645_set_saturation(ov5645, ctrl->val);
859 break;
860 case V4L2_CID_AUTO_WHITE_BALANCE:
861 ret = ov5645_set_awb(ov5645, ctrl->val);
862 break;
863 case V4L2_CID_AUTOGAIN:
864 ret = ov5645_set_agc_mode(ov5645, ctrl->val);
865 break;
866 case V4L2_CID_EXPOSURE_AUTO:
867 ret = ov5645_set_aec_mode(ov5645, ctrl->val);
868 break;
869 case V4L2_CID_TEST_PATTERN:
870 ret = ov5645_set_test_pattern(ov5645, ctrl->val);
871 break;
872 case V4L2_CID_HFLIP:
873 ret = ov5645_set_hflip(ov5645, ctrl->val);
874 break;
875 case V4L2_CID_VFLIP:
876 ret = ov5645_set_vflip(ov5645, ctrl->val);
877 break;
878 default:
879 ret = -EINVAL;
880 break;
881 }
882
883 mutex_unlock(&ov5645->power_lock);
884
885 return ret;
886 }
887
888 static struct v4l2_ctrl_ops ov5645_ctrl_ops = {
889 .s_ctrl = ov5645_s_ctrl,
890 };
891
ov5645_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)892 static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
893 struct v4l2_subdev_pad_config *cfg,
894 struct v4l2_subdev_mbus_code_enum *code)
895 {
896 if (code->index > 0)
897 return -EINVAL;
898
899 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
900
901 return 0;
902 }
903
ov5645_enum_frame_size(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)904 static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
905 struct v4l2_subdev_pad_config *cfg,
906 struct v4l2_subdev_frame_size_enum *fse)
907 {
908 if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
909 return -EINVAL;
910
911 if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
912 return -EINVAL;
913
914 fse->min_width = ov5645_mode_info_data[fse->index].width;
915 fse->max_width = ov5645_mode_info_data[fse->index].width;
916 fse->min_height = ov5645_mode_info_data[fse->index].height;
917 fse->max_height = ov5645_mode_info_data[fse->index].height;
918
919 return 0;
920 }
921
922 static struct v4l2_mbus_framefmt *
__ov5645_get_pad_format(struct ov5645 * ov5645,struct v4l2_subdev_pad_config * cfg,unsigned int pad,enum v4l2_subdev_format_whence which)923 __ov5645_get_pad_format(struct ov5645 *ov5645,
924 struct v4l2_subdev_pad_config *cfg,
925 unsigned int pad,
926 enum v4l2_subdev_format_whence which)
927 {
928 switch (which) {
929 case V4L2_SUBDEV_FORMAT_TRY:
930 return v4l2_subdev_get_try_format(&ov5645->sd, cfg, pad);
931 case V4L2_SUBDEV_FORMAT_ACTIVE:
932 return &ov5645->fmt;
933 default:
934 return NULL;
935 }
936 }
937
ov5645_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)938 static int ov5645_get_format(struct v4l2_subdev *sd,
939 struct v4l2_subdev_pad_config *cfg,
940 struct v4l2_subdev_format *format)
941 {
942 struct ov5645 *ov5645 = to_ov5645(sd);
943
944 format->format = *__ov5645_get_pad_format(ov5645, cfg, format->pad,
945 format->which);
946 return 0;
947 }
948
949 static struct v4l2_rect *
__ov5645_get_pad_crop(struct ov5645 * ov5645,struct v4l2_subdev_pad_config * cfg,unsigned int pad,enum v4l2_subdev_format_whence which)950 __ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg,
951 unsigned int pad, enum v4l2_subdev_format_whence which)
952 {
953 switch (which) {
954 case V4L2_SUBDEV_FORMAT_TRY:
955 return v4l2_subdev_get_try_crop(&ov5645->sd, cfg, pad);
956 case V4L2_SUBDEV_FORMAT_ACTIVE:
957 return &ov5645->crop;
958 default:
959 return NULL;
960 }
961 }
962
963 static const struct ov5645_mode_info *
ov5645_find_nearest_mode(unsigned int width,unsigned int height)964 ov5645_find_nearest_mode(unsigned int width, unsigned int height)
965 {
966 int i;
967
968 for (i = ARRAY_SIZE(ov5645_mode_info_data) - 1; i >= 0; i--) {
969 if (ov5645_mode_info_data[i].width <= width &&
970 ov5645_mode_info_data[i].height <= height)
971 break;
972 }
973
974 if (i < 0)
975 i = 0;
976
977 return &ov5645_mode_info_data[i];
978 }
979
ov5645_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)980 static int ov5645_set_format(struct v4l2_subdev *sd,
981 struct v4l2_subdev_pad_config *cfg,
982 struct v4l2_subdev_format *format)
983 {
984 struct ov5645 *ov5645 = to_ov5645(sd);
985 struct v4l2_mbus_framefmt *__format;
986 struct v4l2_rect *__crop;
987 const struct ov5645_mode_info *new_mode;
988 int ret;
989
990 __crop = __ov5645_get_pad_crop(ov5645, cfg, format->pad,
991 format->which);
992
993 new_mode = ov5645_find_nearest_mode(format->format.width,
994 format->format.height);
995 __crop->width = new_mode->width;
996 __crop->height = new_mode->height;
997
998 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
999 ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
1000 new_mode->pixel_clock);
1001 if (ret < 0)
1002 return ret;
1003
1004 ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
1005 new_mode->link_freq);
1006 if (ret < 0)
1007 return ret;
1008
1009 ov5645->current_mode = new_mode;
1010 }
1011
1012 __format = __ov5645_get_pad_format(ov5645, cfg, format->pad,
1013 format->which);
1014 __format->width = __crop->width;
1015 __format->height = __crop->height;
1016 __format->code = MEDIA_BUS_FMT_UYVY8_2X8;
1017 __format->field = V4L2_FIELD_NONE;
1018 __format->colorspace = V4L2_COLORSPACE_SRGB;
1019
1020 format->format = *__format;
1021
1022 return 0;
1023 }
1024
ov5645_entity_init_cfg(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg)1025 static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
1026 struct v4l2_subdev_pad_config *cfg)
1027 {
1028 struct v4l2_subdev_format fmt = { 0 };
1029
1030 fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
1031 fmt.format.width = 1920;
1032 fmt.format.height = 1080;
1033
1034 ov5645_set_format(subdev, cfg, &fmt);
1035
1036 return 0;
1037 }
1038
ov5645_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1039 static int ov5645_get_selection(struct v4l2_subdev *sd,
1040 struct v4l2_subdev_pad_config *cfg,
1041 struct v4l2_subdev_selection *sel)
1042 {
1043 struct ov5645 *ov5645 = to_ov5645(sd);
1044
1045 if (sel->target != V4L2_SEL_TGT_CROP)
1046 return -EINVAL;
1047
1048 sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad,
1049 sel->which);
1050 return 0;
1051 }
1052
ov5645_s_stream(struct v4l2_subdev * subdev,int enable)1053 static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
1054 {
1055 struct ov5645 *ov5645 = to_ov5645(subdev);
1056 int ret;
1057
1058 if (enable) {
1059 ret = ov5645_set_register_array(ov5645,
1060 ov5645->current_mode->data,
1061 ov5645->current_mode->data_size);
1062 if (ret < 0) {
1063 dev_err(ov5645->dev, "could not set mode %dx%d\n",
1064 ov5645->current_mode->width,
1065 ov5645->current_mode->height);
1066 return ret;
1067 }
1068 ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
1069 if (ret < 0) {
1070 dev_err(ov5645->dev, "could not sync v4l2 controls\n");
1071 return ret;
1072 }
1073
1074 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
1075 if (ret < 0)
1076 return ret;
1077
1078 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1079 OV5645_SYSTEM_CTRL0_START);
1080 if (ret < 0)
1081 return ret;
1082 } else {
1083 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
1084 if (ret < 0)
1085 return ret;
1086
1087 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1088 OV5645_SYSTEM_CTRL0_STOP);
1089 if (ret < 0)
1090 return ret;
1091 }
1092
1093 return 0;
1094 }
1095
1096 static const struct v4l2_subdev_core_ops ov5645_core_ops = {
1097 .s_power = ov5645_s_power,
1098 };
1099
1100 static const struct v4l2_subdev_video_ops ov5645_video_ops = {
1101 .s_stream = ov5645_s_stream,
1102 };
1103
1104 static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
1105 .init_cfg = ov5645_entity_init_cfg,
1106 .enum_mbus_code = ov5645_enum_mbus_code,
1107 .enum_frame_size = ov5645_enum_frame_size,
1108 .get_fmt = ov5645_get_format,
1109 .set_fmt = ov5645_set_format,
1110 .get_selection = ov5645_get_selection,
1111 };
1112
1113 static const struct v4l2_subdev_ops ov5645_subdev_ops = {
1114 .core = &ov5645_core_ops,
1115 .video = &ov5645_video_ops,
1116 .pad = &ov5645_subdev_pad_ops,
1117 };
1118
ov5645_probe(struct i2c_client * client,const struct i2c_device_id * id)1119 static int ov5645_probe(struct i2c_client *client,
1120 const struct i2c_device_id *id)
1121 {
1122 struct device *dev = &client->dev;
1123 struct device_node *endpoint;
1124 struct ov5645 *ov5645;
1125 u8 chip_id_high, chip_id_low;
1126 u32 xclk_freq;
1127 int ret;
1128
1129 ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
1130 if (!ov5645)
1131 return -ENOMEM;
1132
1133 ov5645->i2c_client = client;
1134 ov5645->dev = dev;
1135
1136 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1137 if (!endpoint) {
1138 dev_err(dev, "endpoint node not found\n");
1139 return -EINVAL;
1140 }
1141
1142 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1143 &ov5645->ep);
1144
1145 of_node_put(endpoint);
1146
1147 if (ret < 0) {
1148 dev_err(dev, "parsing endpoint node failed\n");
1149 return ret;
1150 }
1151
1152 if (ov5645->ep.bus_type != V4L2_MBUS_CSI2) {
1153 dev_err(dev, "invalid bus type, must be CSI2\n");
1154 return -EINVAL;
1155 }
1156
1157 /* get system clock (xclk) */
1158 ov5645->xclk = devm_clk_get(dev, "xclk");
1159 if (IS_ERR(ov5645->xclk)) {
1160 dev_err(dev, "could not get xclk");
1161 return PTR_ERR(ov5645->xclk);
1162 }
1163
1164 ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
1165 if (ret) {
1166 dev_err(dev, "could not get xclk frequency\n");
1167 return ret;
1168 }
1169
1170 /* external clock must be 24MHz, allow 1% tolerance */
1171 if (xclk_freq < 23760000 || xclk_freq > 24240000) {
1172 dev_err(dev, "external clock frequency %u is not supported\n",
1173 xclk_freq);
1174 return -EINVAL;
1175 }
1176
1177 ret = clk_set_rate(ov5645->xclk, xclk_freq);
1178 if (ret) {
1179 dev_err(dev, "could not set xclk frequency\n");
1180 return ret;
1181 }
1182
1183 ov5645->io_regulator = devm_regulator_get(dev, "vdddo");
1184 if (IS_ERR(ov5645->io_regulator)) {
1185 dev_err(dev, "cannot get io regulator\n");
1186 return PTR_ERR(ov5645->io_regulator);
1187 }
1188
1189 ret = regulator_set_voltage(ov5645->io_regulator,
1190 OV5645_VOLTAGE_DIGITAL_IO,
1191 OV5645_VOLTAGE_DIGITAL_IO);
1192 if (ret < 0) {
1193 dev_err(dev, "cannot set io voltage\n");
1194 return ret;
1195 }
1196
1197 ov5645->core_regulator = devm_regulator_get(dev, "vddd");
1198 if (IS_ERR(ov5645->core_regulator)) {
1199 dev_err(dev, "cannot get core regulator\n");
1200 return PTR_ERR(ov5645->core_regulator);
1201 }
1202
1203 ret = regulator_set_voltage(ov5645->core_regulator,
1204 OV5645_VOLTAGE_DIGITAL_CORE,
1205 OV5645_VOLTAGE_DIGITAL_CORE);
1206 if (ret < 0) {
1207 dev_err(dev, "cannot set core voltage\n");
1208 return ret;
1209 }
1210
1211 ov5645->analog_regulator = devm_regulator_get(dev, "vdda");
1212 if (IS_ERR(ov5645->analog_regulator)) {
1213 dev_err(dev, "cannot get analog regulator\n");
1214 return PTR_ERR(ov5645->analog_regulator);
1215 }
1216
1217 ret = regulator_set_voltage(ov5645->analog_regulator,
1218 OV5645_VOLTAGE_ANALOG,
1219 OV5645_VOLTAGE_ANALOG);
1220 if (ret < 0) {
1221 dev_err(dev, "cannot set analog voltage\n");
1222 return ret;
1223 }
1224
1225 ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
1226 if (IS_ERR(ov5645->enable_gpio)) {
1227 dev_err(dev, "cannot get enable gpio\n");
1228 return PTR_ERR(ov5645->enable_gpio);
1229 }
1230
1231 ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1232 if (IS_ERR(ov5645->rst_gpio)) {
1233 dev_err(dev, "cannot get reset gpio\n");
1234 return PTR_ERR(ov5645->rst_gpio);
1235 }
1236
1237 mutex_init(&ov5645->power_lock);
1238
1239 v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
1240 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1241 V4L2_CID_SATURATION, -4, 4, 1, 0);
1242 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1243 V4L2_CID_HFLIP, 0, 1, 1, 0);
1244 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1245 V4L2_CID_VFLIP, 0, 1, 1, 0);
1246 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1247 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1248 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1249 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1250 v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
1251 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
1252 0, V4L2_EXPOSURE_AUTO);
1253 v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
1254 V4L2_CID_TEST_PATTERN,
1255 ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
1256 0, 0, ov5645_test_pattern_menu);
1257 ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
1258 &ov5645_ctrl_ops,
1259 V4L2_CID_PIXEL_RATE,
1260 1, INT_MAX, 1, 1);
1261 ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
1262 &ov5645_ctrl_ops,
1263 V4L2_CID_LINK_FREQ,
1264 ARRAY_SIZE(link_freq) - 1,
1265 0, link_freq);
1266 if (ov5645->link_freq)
1267 ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1268
1269 ov5645->sd.ctrl_handler = &ov5645->ctrls;
1270
1271 if (ov5645->ctrls.error) {
1272 dev_err(dev, "%s: control initialization error %d\n",
1273 __func__, ov5645->ctrls.error);
1274 ret = ov5645->ctrls.error;
1275 goto free_ctrl;
1276 }
1277
1278 v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
1279 ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1280 ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
1281 ov5645->sd.dev = &client->dev;
1282 ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1283
1284 ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
1285 if (ret < 0) {
1286 dev_err(dev, "could not register media entity\n");
1287 goto free_ctrl;
1288 }
1289
1290 ret = ov5645_s_power(&ov5645->sd, true);
1291 if (ret < 0) {
1292 dev_err(dev, "could not power up OV5645\n");
1293 goto free_entity;
1294 }
1295
1296 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
1297 if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
1298 dev_err(dev, "could not read ID high\n");
1299 ret = -ENODEV;
1300 goto power_down;
1301 }
1302 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
1303 if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
1304 dev_err(dev, "could not read ID low\n");
1305 ret = -ENODEV;
1306 goto power_down;
1307 }
1308
1309 dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
1310
1311 ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
1312 &ov5645->aec_pk_manual);
1313 if (ret < 0) {
1314 dev_err(dev, "could not read AEC/AGC mode\n");
1315 ret = -ENODEV;
1316 goto power_down;
1317 }
1318
1319 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
1320 &ov5645->timing_tc_reg20);
1321 if (ret < 0) {
1322 dev_err(dev, "could not read vflip value\n");
1323 ret = -ENODEV;
1324 goto power_down;
1325 }
1326
1327 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
1328 &ov5645->timing_tc_reg21);
1329 if (ret < 0) {
1330 dev_err(dev, "could not read hflip value\n");
1331 ret = -ENODEV;
1332 goto power_down;
1333 }
1334
1335 ov5645_s_power(&ov5645->sd, false);
1336
1337 ret = v4l2_async_register_subdev(&ov5645->sd);
1338 if (ret < 0) {
1339 dev_err(dev, "could not register v4l2 device\n");
1340 goto free_entity;
1341 }
1342
1343 ov5645_entity_init_cfg(&ov5645->sd, NULL);
1344
1345 return 0;
1346
1347 power_down:
1348 ov5645_s_power(&ov5645->sd, false);
1349 free_entity:
1350 media_entity_cleanup(&ov5645->sd.entity);
1351 free_ctrl:
1352 v4l2_ctrl_handler_free(&ov5645->ctrls);
1353 mutex_destroy(&ov5645->power_lock);
1354
1355 return ret;
1356 }
1357
ov5645_remove(struct i2c_client * client)1358 static int ov5645_remove(struct i2c_client *client)
1359 {
1360 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1361 struct ov5645 *ov5645 = to_ov5645(sd);
1362
1363 v4l2_async_unregister_subdev(&ov5645->sd);
1364 media_entity_cleanup(&ov5645->sd.entity);
1365 v4l2_ctrl_handler_free(&ov5645->ctrls);
1366 mutex_destroy(&ov5645->power_lock);
1367
1368 return 0;
1369 }
1370
1371 static const struct i2c_device_id ov5645_id[] = {
1372 { "ov5645", 0 },
1373 {}
1374 };
1375 MODULE_DEVICE_TABLE(i2c, ov5645_id);
1376
1377 static const struct of_device_id ov5645_of_match[] = {
1378 { .compatible = "ovti,ov5645" },
1379 { /* sentinel */ }
1380 };
1381 MODULE_DEVICE_TABLE(of, ov5645_of_match);
1382
1383 static struct i2c_driver ov5645_i2c_driver = {
1384 .driver = {
1385 .of_match_table = of_match_ptr(ov5645_of_match),
1386 .name = "ov5645",
1387 },
1388 .probe = ov5645_probe,
1389 .remove = ov5645_remove,
1390 .id_table = ov5645_id,
1391 };
1392
1393 module_i2c_driver(ov5645_i2c_driver);
1394
1395 MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
1396 MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
1397 MODULE_LICENSE("GPL v2");
1398